From: Mickaël Salaün
Factor out the blacklist hash creation with the get_raw_hash() helper.
This also centralize the "tbs" and "bin" prefixes and make them private,
which help to manage them consistently.
Cc: David Howells
Cc: David S. Miller
Cc: David Woodhouse
Cc: Eric Snowberg
Cc: Herbert
This new patch series is a rebase on David Howells's keys-misc branch.
This mainly fixes UEFI DBX and the new Eric Snowberg's feature to import
asymmetric keys to the blacklist keyring.
I successfully tested this patch series with the 186 entries from
https://uefi.org/sites/default/files/resources/
On 2/8/21 3:39 PM, James Clark wrote:
On 22/01/2021 18:18, Alexandre Truong wrote:
+}
+
+static int add_entry(struct unwind_entry *entry, void *arg)
+{
+struct entries *entries = arg;
+
+entries->stack[entries->i++] = entry->ip;
+return 0;
+}
+
+u64 get_leaf_frame_caller_aarch6
From: Mickaël Salaün
Add a kernel option SYSTEM_BLACKLIST_AUTH_UPDATE to enable the root user
to dynamically add new keys to the blacklist keyring. This enables to
invalidate new certificates, either from being loaded in a keyring, or
from being trusted in a PKCS#7 certificate chain. This also
On Tue, 9 Feb 2021 at 15:01, Yann Gautier wrote:
>
> On 2/8/21 4:03 PM, Ulf Hansson wrote:
> > On Mon, 8 Feb 2021 at 13:16, Yann GAUTIER wrote:
> >>
> >> On 2/5/21 1:19 PM, Yann GAUTIER wrote:
> >>> On 2/5/21 10:53 AM, Ulf Hansson wrote:
> - trimmed cc-list
>
> On Thu, 4 Feb 2021 a
From: Mickaël Salaün
Before exposing this new key type to user space, make sure that only
meaningful blacklisted hashes are accepted. This is also checked for
builtin blacklisted hashes, but a following commit make sure that the
user will notice (at built time) and will fix the configuration if
On Wed, 10 Feb 2021, Dan Carpenter wrote:
> Smatch complains that:
>
> kernel/module.c:4472 module_kallsyms_on_each_symbol()
> error: uninitialized symbol 'ret'.
>
> This warning looks like it could be correct if the &modules list is
> empty.
>
> Fixes: 013c1667cf78 ("kallsyms: re
On Wed, Feb 10, 2021 at 02:38:28PM +0530, karthek wrote:
> On Wed, Feb 10, 2021, 2:31 PM Dan Carpenter
> wrote:
>
> > On Wed, Feb 10, 2021 at 02:28:31PM +0530, karthek wrote:
> > > On Wed, Feb 10, 2021 at 1:37 PM Dan Carpenter
> > wrote:
> > > > > @@ -789,7 +759,7 @@ static void phy_PostSetBwMod
Remove CHECK: Lines should not end with a '('
Signed-off-by: Aakash Hemadri
---
drivers/staging/ralink-gdma/ralink-gdma.c | 28 ---
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/ralink-gdma/ralink-gdma.c
b/drivers/staging/ralink-gdma/ralink
Hi Xiang,
On 2021/2/9 21:06, Gao Xiang via Linux-erofs wrote:
From: Gao Xiang
Currently, although set_bit() & test_bit() pairs are used as a fast-
path for initialized configurations. However, these atomic ops are
actually relaxed forms. Instead, load-acquire & store-release form is
needed to
On Wed, Feb 10, 2021 at 05:33:48PM +0530, Aakash Hemadri wrote:
> Remove CHECK: Lines should not end with a '('
>
> Signed-off-by: Aakash Hemadri
> ---
>
> drivers/staging/ralink-gdma/ralink-gdma.c | 28 ---
> 1 file changed, 15 insertions(+), 13 deletions(-)
>
> diff --git
Hi Gerogi,
On 10-02-21, 13:30, Georgi Djakov wrote:
> > +#define SM8350_MASTER_LLCC_DISP1000
> > +#define SM8350_MASTER_MNOC_HF_MEM_NOC_DISP 1001
> > +#define SM8350_MASTER_MNOC_SF_MEM_NOC_DISP 1002
> > +#define SM8350_MASTER_MDP0_DISP
We're working on a user space control plane for the BPF sk_lookup
hook [1]. The hook attaches to a network namespace and allows
control over which socket receives a new connection / packet.
Roughly, applications can give a socket to our user space component
to participate in custom bind semantics.
We need to distinguish which network namespace a socket belongs to.
BPF has the useful bpf_get_netns_cookie helper for this, but accessing
it from user space isn't possible. Add a read-only socket option that
returns the netns cookie, similar to SO_COOKIE. If network namespaces
are disabled, SO_NET
Am 2021-02-10 12:54, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 12:20:02PM +0100, Michael Walle wrote:
Am 2021-02-09 17:38, schrieb Michael Walle:
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -308,7 +308,7 @@ void phy_ethtool_ksettings_get(struct phy_dev
Check that NS_GET_COOKIE returns a non-zero value, and that distinct
network namespaces have different cookies.
Signed-off-by: Lorenz Bauer
---
tools/testing/selftests/nsfs/.gitignore | 1 +
tools/testing/selftests/nsfs/Makefile | 2 +-
tools/testing/selftests/nsfs/netns.c| 57 ++
Network namespaces have a globally unique non-zero identifier aka a
cookie, in line with socket cookies. Add an ioctl to retrieve the
cookie from user space without going via BPF.
Cc: linux-...@vger.kernel.org
Signed-off-by: Lorenz Bauer
---
fs/nsfs.c | 9 +
include/ne
On 10-02-21, 13:40, Georgi Djakov wrote:
> Hi Vinod,
>
> On 2/10/21 12:47, Vinod Koul wrote:
> > Add driver for the Qualcomm interconnect buses found in SM8i350 based
>
> SM8i350?
fumble fingers :(
>
> > platforms. The topology consists of several NoCs that are controlled by
> > a remote proce
On 10/02/2021 14:01, Vladimir Oltean wrote:
> On Wed, Feb 10, 2021 at 01:05:57PM +0200, Nikolay Aleksandrov wrote:
>> On 10/02/2021 13:01, Vladimir Oltean wrote:
>>> On Wed, Feb 10, 2021 at 12:52:33PM +0200, Nikolay Aleksandrov wrote:
On 10/02/2021 12:45, Vladimir Oltean wrote:
> Hi Nikola
On Wed, 10 Feb 2021, Daniel Thompson wrote:
> > Wrapping the relevant parts of this file into #ifdef MIPS_FP_SUPPORT
> > would be as easy though and would qualify as a proper fix given that we
> > have no XML description support for the MIPS target (so we need to supply
> > the inexistent regi
On Wed, Feb 10, 2021 at 12:51:43PM +0100, Stefan Ursella wrote:
> Without this quirk starting a video capture from the device often fails with
>
> kernel: uvcvideo: Failed to set UVC probe control : -110 (exp. 34).
>
> Signed-off-by: Stefan Ursella
> ---
> drivers/usb/core/quirks.c | 3 +++
> 1
On 09/02/2021 22:53, Mickaël Salaün wrote:
>
> On 09/02/2021 00:05, Eric Snowberg wrote:
>>
>>> On Feb 6, 2021, at 11:30 AM, Mickaël Salaün wrote:
>>>
>>> On 06/02/2021 02:14, Eric Snowberg wrote:
>>>
I have done some additional testing, I am seeing a regression. The
blacklist
Make sure that SO_NETNS_COOKIE returns a non-zero value, and
that sockets from different namespaces have a distinct cookie
value.
Signed-off-by: Lorenz Bauer
---
tools/testing/selftests/net/.gitignore| 1 +
tools/testing/selftests/net/Makefile | 2 +-
tools/testing/selftests/n
Adding Tinh Nguyen to CC:
On Tue, Feb 09, 2021 at 09:02:00PM +0100, Michael Grzeschik wrote:
Hi Manish,
On Tue, Feb 09, 2021 at 06:01:58AM +, Manish Narani wrote:
Hi Michael,
-Original Message-
From: Michael Grzeschik
Sent: Tuesday, February 9, 2021 5:26 AM
To: Manish Narani
Cc
On 09.02.2021 20:46, Yang Shi wrote:
> The shrinker_info is dereferenced in a couple of places via
> rcu_dereference_protected
> with different calling conventions, for example, using mem_cgroup_nodeinfo
> helper
> or dereferencing memcg->nodeinfo[nid]->shrinker_info. And the later patch
> will
On 2/9/21 6:50 PM, Minchan Kim wrote:
> __alloc_contig_migrate_range already has lru_add_drain_all call
> via migrate_prep. It's necessary to move LRU taget pages into
> LRU list to be able to isolated. However, lru_add_drain_all call
> after __alloc_contig_migrate_range is called is pointless.
>
On Wed, Feb 10, 2021 at 12:17:19PM +0800, Jason Wang wrote:
>
> On 2021/2/9 下午5:00, Stefano Garzarella wrote:
> > On Tue, Feb 09, 2021 at 07:43:02AM +0200, Eli Cohen wrote:
> > > On Mon, Feb 08, 2021 at 05:17:41PM +0100, Stefano Garzarella wrote:
> > > > It's legal to have 'offset + len' equal to
On 09/02/2021 15:48, Enric Balletbo Serra wrote:
> Hi Hsin-Yi,
>
> Thank you for your patch.
>
> Missatge de Hsin-Yi Wang del dia dv., 29 de gen.
> 2021 a les 10:23:
>>
>> From: Yongqiang Niu
>>
>> Add mtk mutex support for MT8183 SoC.
>>
>> Signed-off-by: Yongqiang Niu
>> Signed-off-by: Hs
The 02/10/2021 10:08, Vladimir Oltean wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Horatiu,
>
> On Tue, Feb 09, 2021 at 09:21:07PM +0100, Horatiu Vultur wrote:
> > This patch series extends MRP switchdev to allow the SW to have a be
On 2/9/21 8:03 PM, Oscar Salvador wrote:
> On Tue, Feb 09, 2021 at 07:17:59PM +0100, David Hildenbrand wrote:
>> I was expecting some magical reason why this is still required but I am not
>> able to find a compelling one. Maybe this is really some historical
>> artifact.
>>
>> Let's see if other
Am 2021-02-10 12:48, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 12:14:35PM +0100, Michael Walle wrote:
Am 2021-02-10 11:49, schrieb Russell King - ARM Linux admin:
The PHY doesn't support fiber and register 0..15 are always available
regardless of the selected page for the I
On Wed, Feb 10, 2021 at 02:01:06PM +0200, Vladimir Oltean wrote:
> On Wed, Feb 10, 2021 at 01:05:57PM +0200, Nikolay Aleksandrov wrote:
> > On 10/02/2021 13:01, Vladimir Oltean wrote:
> > > On Wed, Feb 10, 2021 at 12:52:33PM +0200, Nikolay Aleksandrov wrote:
> > >> On 10/02/2021 12:45, Vladimir Olt
Hi Jessica,
On Wed, 10 Feb 2021 09:06:48 +0100 Jessica Yu wrote:
>
> Sorry, by "feature" I meant CONFIG_TRIM_UNUSED_KSYMS. This config
> option was introduced around v4.7. If simply enabling it produces
> these compilation errors I was wondering if it ever built properly on
> powerpc.
Ah, of co
On Wed, Feb 10, 2021 at 02:52:01PM +0800, Anand Jain wrote:
> On 10/02/2021 04:30, Michal Rostecki wrote:
> > From: Michal Rostecki
> >
> > This patch series adds a new raid1 read policy - roundrobin. For each
> > request, it selects the mirror which has lower load than queue depth.
> > Load is d
On 22/12/2020 14:09, Weiyi Lu wrote:
> This patch adds the new binding documentation of imp i2c wrapper controller
> for Mediatek MT8192.
The wrapper controller has only clock parts, or are the clock register mapped
into the i2c wrapper block. In that case we might want to probe the clock drive
On Wed, Feb 10, 2021 at 05:33:48PM +0530, Aakash Hemadri wrote:
> Remove CHECK: Lines should not end with a '('
>
> Signed-off-by: Aakash Hemadri
> ---
>
> drivers/staging/ralink-gdma/ralink-gdma.c | 28 ---
> 1 file changed, 15 insertions(+), 13 deletions(-)
>
> diff --git
The following commit has been merged into the x86/paravirt branch of tip:
Commit-ID: ab234a260b1f625b26cbefa93ca365b0ae66df33
Gitweb:
https://git.kernel.org/tip/ab234a260b1f625b26cbefa93ca365b0ae66df33
Author:Juergen Gross
AuthorDate:Wed, 20 Jan 2021 14:55:46 +01:00
Commit
The following commit has been merged into the x86/paravirt branch of tip:
Commit-ID: 5b4c6d65019bff65757f61adbbad5e45a333b800
Gitweb:
https://git.kernel.org/tip/5b4c6d65019bff65757f61adbbad5e45a333b800
Author:Juergen Gross
AuthorDate:Wed, 20 Jan 2021 14:55:43 +01:00
Commit
The following commit has been merged into the x86/paravirt branch of tip:
Commit-ID: c3d7fa6684b5b3a07a48fc379d27bfb8a96661d9
Gitweb:
https://git.kernel.org/tip/c3d7fa6684b5b3a07a48fc379d27bfb8a96661d9
Author:Juergen Gross
AuthorDate:Wed, 20 Jan 2021 14:55:42 +01:00
Commit
The following commit has been merged into the x86/paravirt branch of tip:
Commit-ID: 53c9d9240944088274aadbbbafc6138ca462db4f
Gitweb:
https://git.kernel.org/tip/53c9d9240944088274aadbbbafc6138ca462db4f
Author:Juergen Gross
AuthorDate:Wed, 20 Jan 2021 14:55:44 +01:00
Commit
The following commit has been merged into the x86/paravirt branch of tip:
Commit-ID: afd30525a659ac0ae0904f0cb4a2ca75522c3123
Gitweb:
https://git.kernel.org/tip/afd30525a659ac0ae0904f0cb4a2ca75522c3123
Author:Juergen Gross
AuthorDate:Wed, 20 Jan 2021 14:55:45 +01:00
Commit
On Wed 10-02-21 13:17:33, Vlastimil Babka wrote:
> On 2/9/21 8:03 PM, Oscar Salvador wrote:
> > On Tue, Feb 09, 2021 at 07:17:59PM +0100, David Hildenbrand wrote:
> >> I was expecting some magical reason why this is still required but I am not
> >> able to find a compelling one. Maybe this is reall
On Wed, 2021-02-10 at 12:44 +0100, Christian König wrote:
> Please try to add a "return NULL" at the beginning of ttm_pool_type_take().
>
> That should effectively disable using the pool.
That did away with the yield looping, but it doesn't take long for the
display to freeze. I ssh'd in from lap
Hi Will, I'm pulling you in at Marc's suggestion. Do you have an opinion
on what the better solution to this problem is?
The executive summary is that Apple SoCs require nGnRnE memory mappings
for MMIO, except for PCI space which uses nGnRE. ARM64 currently uses
nGnRE everywhere. Solutions dis
Hi Hector,
On Wed, 10 Feb 2021 at 20:49, Hector Martin wrote:
> > Yeah, just don't use an imaginary dummy index for the reg. Use a real
> > register offset from a clock controller instance base, and a register
> > bit offset too if needed.
>
> I mean for fixed input clocks without any particular
From: Paolo Abeni
Date: Wed, 10 Feb 2021 11:21:06 +0100
> Hello,
Hi!
> I'm sorry for the late feedback, I could not step-in before.
>
> Also adding Jesper for awareness, as he introduced the bulk free
> infrastructure.
>
> On Tue, 2021-02-09 at 20:48 +, Alexander Lobakin wrote:
> > @@ -2
Hi!
> commit 83404d581471775f37f85e5261ec0d09407d8bed upstream.
>
> This function will be needed by the next patch where the driver
> calculates the BW based on driver specific parameters, so export it.
>
> At the same time sanitize the function params, passing the more natural
> link rate inste
On 10.02.2021 13:17, Michael Walle wrote:
> Am 2021-02-10 12:48, schrieb Russell King - ARM Linux admin:
>> On Wed, Feb 10, 2021 at 12:14:35PM +0100, Michael Walle wrote:
>>> Am 2021-02-10 11:49, schrieb Russell King - ARM Linux admin:
>>> The PHY doesn't support fiber and register 0..15 are always
On Wed, Feb 10, 2021 at 9:41 AM Sakari Ailus
wrote:
>
> On Tue, Feb 09, 2021 at 05:58:12PM +0100, Rafael J. Wysocki wrote:
> > On Tue, Feb 9, 2021 at 5:54 PM Sakari Ailus
> > wrote:
> > >
> > > On Tue, Feb 09, 2021 at 05:42:45PM +0100, Rafael J. Wysocki wrote:
> > > > On Tue, Feb 9, 2021 at 5:23
> -Original Message-
> From: Peter Zijlstra [mailto:pet...@infradead.org]
> Sent: Thursday, February 11, 2021 12:22 AM
> To: Song Bao Hua (Barry Song)
> Cc: valentin.schnei...@arm.com; vincent.guit...@linaro.org; mgor...@suse.de;
> mi...@kernel.org; dietmar.eggem...@arm.com; morten.rasm
On Wed, Feb 10, 2021 at 05:24:28AM +0100, Michał Mirosław wrote:
> On Tue, Feb 09, 2021 at 09:30:40PM +0100, Michal Rostecki wrote:
> [...]
> > For the array with 3 HDDs, not adding any penalty resulted in 409MiB/s
> > (429MB/s) performance. Adding the penalty value 1 resulted in a
> > performance
On Wed, Feb 10, 2021 at 01:11:28PM +0100, Maciej W. Rozycki wrote:
> On Wed, 10 Feb 2021, Daniel Thompson wrote:
>
> > > Wrapping the relevant parts of this file into #ifdef MIPS_FP_SUPPORT
> > > would be as easy though and would qualify as a proper fix given that we
> > > have no XML descripti
On Mon, Feb 08, 2021 at 05:20:11PM -0800, Si-Wei Liu wrote:
>
>
> On 2/7/2021 9:35 PM, Eli Cohen wrote:
> > On Sat, Feb 06, 2021 at 04:29:23AM -0800, Si-Wei Liu wrote:
> > > The mlx_features denotes the capability for which
> > > set of virtio features is supported by device. In
> > > principle,
On Mon, Feb 8, 2021 at 1:55 PM Balbir Singh wrote:
>
> On Fri, Feb 05, 2021 at 10:43:02AM +0800, Weiping Zhang wrote:
> > On Fri, Feb 5, 2021 at 8:08 AM Balbir Singh wrote:
> > >
> > > On Thu, Feb 04, 2021 at 10:37:20PM +0800, Weiping Zhang wrote:
> > > > On Thu, Feb 4, 2021 at 6:20 PM Balbir Sin
On Wed, Feb 10, 2021 at 02:21:05PM +0200, Ido Schimmel wrote:
> On Wed, Feb 10, 2021 at 02:01:06PM +0200, Vladimir Oltean wrote:
> > On Wed, Feb 10, 2021 at 01:05:57PM +0200, Nikolay Aleksandrov wrote:
> > > On 10/02/2021 13:01, Vladimir Oltean wrote:
> > > > On Wed, Feb 10, 2021 at 12:52:33PM +020
The 02/10/2021 10:18, Vladimir Oltean wrote:
Hi Vladimir,
>
> Would you mind adding the switchdev MRP support for the DSA driver too,
> and move the code to the common ocelot library? I would like to give it
> a run. I think that's only fair, since I have to keep in sync the
> vsc7514 driver too
Without this quirk starting a video capture from the device often fails with
kernel: uvcvideo: Failed to set UVC probe control : -110 (exp. 34).
Signed-off-by: Stefan Ursella
---
drivers/usb/core/quirks.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/core/quirks.c b/drivers
Hi Rob
On 2/9/21 7:00 PM, Rob Herring wrote:
On Wed, Jan 27, 2021 at 02:25:30PM +0530, Anshuman Khandual wrote:
From: Suzuki K Poulose
Document the device tree bindings for Embedded Trace Extensions.
ETE can be connected to legacy coresight components and thus
could optionally contain a conne
On Wed, Feb 10, 2021 at 12:44:03PM +0800, Jason Wang wrote:
>
> On 2021/2/9 下午10:20, Michael S. Tsirkin wrote:
> > On Mon, Jan 04, 2021 at 02:55:00PM +0800, Jason Wang wrote:
> > > Signed-off-by: Jason Wang
> > > ---
> > > drivers/virtio/Kconfig | 10 +-
> > > drivers/virtio/M
On 21/02/10 03:19PM, Dan Carpenter wrote:
> On Wed, Feb 10, 2021 at 05:33:48PM +0530, Aakash Hemadri wrote:
> > Remove CHECK: Lines should not end with a '('
> >
> > Signed-off-by: Aakash Hemadri
> > ---
> >
> > drivers/staging/ralink-gdma/ralink-gdma.c | 28 ---
> > 1 file ch
On Wed, 2021-02-10 at 12:18 +0200, Andy Shevchenko wrote:
> On Wed, Feb 10, 2021 at 10:30 AM Joe Perches wrote:
> > On Tue, 2021-02-09 at 23:49 -0800, Drew Fustini wrote:
>
> > > - debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
> > > + debugfs_create_file("pinctrl-devices", 040
On Wed, Feb 10, 2021 at 12:51 PM Andy Shevchenko
wrote:
>
> We allow to read the single value as a first element in the array.
> Unfortunately the counting doesn't work in this case and we can't
> call fwnode_property_count_*() API without getting an error.
It would be good to mention what the sy
Hi!
Am 14.01.21 um 19:07 schrieb Helen Koike:
Add normalization to pixelformats, so we can fallback to it when using
Ext API, and eliminating the handling of two variantes (M and non-M
formats).
Signed-off-by: Helen Koike
---
Changes in v6:
- New patch
---
drivers/media/v4l2-core/v4l2-commo
From: Lai Jiangshan
In x86_64, tss.sp1 is reused as cpu_current_top_of_stack. We'd better
directly use percpu since CR3 and gs_base is correct when it is used.
In x86_32, tss.sp1 is resued as thread.sp0 in three places in entry
code. We have the correct CR3 and %fs at two of the places. The l
From: Lai Jiangshan
In x86_64, cpu_current_top_of_stack is an alias of cpu_tss_rw.x86_tss.sp1.
When the CPU has meltdown vulnerability(X86_BUG_CPU_MELTDOWN), it would
become a coveted fruit even if kernel pagetable isolation is enabled since
CPU TSS must also be in the user CR3. An attacker can
On Wed, Feb 10, 2021 at 02:29:36PM +0200, Vladimir Oltean wrote:
> On Wed, Feb 10, 2021 at 02:21:05PM +0200, Ido Schimmel wrote:
> > On Wed, Feb 10, 2021 at 02:01:06PM +0200, Vladimir Oltean wrote:
> > > On Wed, Feb 10, 2021 at 01:05:57PM +0200, Nikolay Aleksandrov wrote:
> > > > On 10/02/2021 13:0
From: Lai Jiangshan
Like the way x86_64 uses the entry stack when switching to the task stack,
entry_SYSENTER_32 can also save the entry stack pointer to a register and
then switch to the task stack. So that it doesn't need to empty the entry
stack by poping contents to registers and it has more
From: Lai Jiangshan
TSS_entry2task_stack is used to refer to tss.sp1 which is a copy of
thread.sp0.
When TSS_entry2task_stack is used in SWITCH_TO_KERNEL_STACK, the CR3 is
already kernel CR3 and the kernel segments are loaded.
So it directly uses percpu to get tss.sp1(thread.sp0) instead of
the
From: Lai Jiangshan
entry_SYSENTER_32 saves the user %fs in the entry stack and restores the
kernel %fs before loading the task stack for stack switching, so that it
can use percpu before switching stack in the next patch.
Signed-off-by: Lai Jiangshan
---
arch/x86/entry/entry_32.S | 22 +++
From: Lai Jiangshan
TSS sp1 is not used by hardware and is used as a copy of thread.sp0.
It should just use a percpu variable instead, so we introduce
cpu_current_thread_sp0 for it.
And we remove the unneeded TSS_sp1.
Signed-off-by: Lai Jiangshan
---
arch/x86/entry/entry_32.S| 6 +++-
From: Lai Jiangshan
TSS_entry2task_stack is used to refer to tss.sp1 which is a copy of
thread.sp0.
When TSS_entry2task_stack is used in entry_SYSENTER_32, the CR3 is
already kernel CR3 and the kernel %fs is loaded.
So it directly uses percpu instead of offset-calculation via
TSS_entry2task_sta
Hi Chao,
On Wed, Feb 10, 2021 at 08:09:22PM +0800, Chao Yu wrote:
> Hi Xiang,
>
> On 2021/2/9 21:06, Gao Xiang via Linux-erofs wrote:
> > From: Gao Xiang
> >
> > Currently, although set_bit() & test_bit() pairs are used as a fast-
> > path for initialized configurations. However, these atomic o
On Wed, 2021-02-10 at 09:52 +0100, Sebastian Andrzej Siewior wrote:
> mutex_trylock_recursive() has been removed from the tree, there is no
> need to check for it.
>
> Remove traces of mutex_trylock_recursive()'s existence.
Yay. Assuming patch 1 is applied, thanks.
>
> Signed-off-by: Sebastian
Hi,
On Wed, Feb 10, 2021 at 01:25:17PM +0100, Pavel Machek wrote:
> Hi!
>
> > commit 83404d581471775f37f85e5261ec0d09407d8bed upstream.
> >
> > This function will be needed by the next patch where the driver
> > calculates the BW based on driver specific parameters, so export it.
> >
> > At the
On 22/12/2020 14:09, Weiyi Lu wrote:
> Add MT8192 basic clock providers, include topckgen, apmixedsys,
> infracfg and pericfg.
>
> Signed-off-by: Weiyi Lu
> ---
> drivers/clk/mediatek/Kconfig |8 +
> drivers/clk/mediatek/Makefile |1 +
> drivers/clk/mediatek/clk-mt8192.c | 13
From: Colin Ian King
Here are some of the more common spelling mistakes and typos that I've
found while fixing up spelling mistakes in the kernel since September 2020
Signed-off-by: Colin Ian King
---
scripts/spelling.txt | 26 ++
1 file changed, 26 insertions(+)
diff
On Feb 04 2021, Palmer Dabbelt wrote:
> From: Palmer Dabbelt
>
> VSC8541 phys need a special reset sequence, which the driver doesn't
> currentlny support. As a result enabling the reset via GPIO essentially
> guarnteees that the device won't work correctly.
>
> This reverts commit a0fa9d727043d
On Wed, Feb 10, 2021 at 05:08:05AM +0100, Michał Mirosław wrote:
> On Tue, Feb 09, 2021 at 09:30:38PM +0100, Michal Rostecki wrote:
> > From: Michal Rostecki
> >
> > Add the btrfs_check_mixed() function which checks if the filesystem has
> > the mixed type of devices (non-rotational and rotationa
Because of u32 type being used to store pixel clock rate, expression used
to calculate pipeline clocks (pixel_clock * bpp) produces wrong value due
to integer overflow. This patch changes data type used to store, pass and
retrieve pixel_clock from u32 to u64 to make this mistake less likely to
be r
Em Mon, Feb 08, 2021 at 09:08:59PM +0100, Jiri Olsa escreveu:
> +
> + if (!pollfd.revents & POLLIN) {
> + pr_err("failed: did not received an ack\n");
> + goto out;
> + }
> +
Fixed up this, pointed out by clang on many build containers, including
fedora:34:
Committ
On Wed, 2021-02-10 at 12:25 +, Alexander Lobakin wrote:
> Paolo Abeni on Wed, 10 Feb 2021 11:21:06 +0100 wrote:
> > Perhaps giving the device drivers the ability to opt-in on this infra
> > via a new helper - as done back then with napi_consume_skb() - would
> > make this change safer?
>
> Th
On Tue, 9 Feb 2021 15:46:20 +0100, Nadeem Athani wrote:
> Cadence controller will not initiate autonomous speed change if strapped
> as Gen2. The Retrain Link bit is set as quirk to enable this speed change.
> Adding a quirk flag for defective IP. In future IP revisions this will not
> be applicabl
On Wed 2021-02-10 00:21:37, Yafang Shao wrote:
> On Tue, Feb 9, 2021 at 9:53 PM Petr Mladek wrote:
> >
> > On Tue 2021-02-09 18:56:13, Yafang Shao wrote:
> > > Currently the pGp only shows the names of page flags, rather than
> > > the full information including section, node, zone, last cpupid an
Looks good,
Reviewed-by: Christoph Hellwig
Looks good,
Reviewed-by: Christoph Hellwig
Looks good,
Reviewed-by: Christoph Hellwig
* Daniel Palmer [210210 12:24]:
> Hi Hector,
>
> On Wed, 10 Feb 2021 at 20:49, Hector Martin wrote:
>
> > > Yeah, just don't use an imaginary dummy index for the reg. Use a real
> > > register offset from a clock controller instance base, and a register
> > > bit offset too if needed.
> >
> > I
On Wed, Feb 10, 2021 at 02:38:23PM +0200, Ido Schimmel wrote:
> On Wed, Feb 10, 2021 at 02:29:36PM +0200, Vladimir Oltean wrote:
> > On Wed, Feb 10, 2021 at 02:21:05PM +0200, Ido Schimmel wrote:
> > > On Wed, Feb 10, 2021 at 02:01:06PM +0200, Vladimir Oltean wrote:
> > > > On Wed, Feb 10, 2021 at 0
On Tue, Feb 09, 2021 at 10:22:17PM -0800, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> Add VM_BUG_ON bounds checks to ensure the newly lifted and created page
> memory operations do not result in corrupted data in neighbor pages and
> to make them consistent with zero_user().[1][2]
s/VM_BUG_
This patch series adds support for Qualcomm QCA807x PHYs.
These are really common companion PHYs on boards featuring
Qualcomm IPQ40xx, IPQ60xx and IPQ807x SoCs.
They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII o
On Wed, Feb 10, 2021 at 10:09:10AM +, Filipe Manana wrote:
> On Tue, Feb 9, 2021 at 9:32 PM Michal Rostecki wrote:
> >
> > From: Michal Rostecki
> >
> > Add the btrfs_check_mixed() function which checks if the filesystem has
> > the mixed type of devices (non-rotational and rotational). This
Add DT bindings for Qualcomm QCA807x PHY series.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Drop PSGMII/QSGMII TX driver defines
include/dt-bindings/net/qcom-qca807x.h | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 include/dt-binding
On Wed, Feb 10, 2021 at 01:34:50PM +0200, Tony Lindgren wrote:
> * Hector Martin [210210 11:14]:
> > On 10/02/2021 19.19, Tony Lindgren wrote:
> > > * Hector Martin 'marcan' [210208 12:05]:
> > > > On 08/02/2021 20.04, Krzysztof Kozlowski wrote:
> > > ...
> > >
> > > > > > + clk24: clk24 {
> >
Add DT bindings for Qualcomm QCA807x PHYs.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Drop LED properties
* Directly define PSGMII/QSGMII SerDes driver values
.../devicetree/bindings/net/qcom,qca807x.yaml | 70 +++
1 file changed, 70 insertions(+)
create
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC,
while second one is SGMII for connection to MAC or fiber.
Both models
On Tue, Feb 09, 2021 at 10:22:18PM -0800, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> zero_user() is already defined with the same interface and contains the
> same code pattern as memzero_page(). Remove memzero_page() and use the
> already defined common function zero_user()
Looks good,
Looks good,
Reviewed-by: Christoph Hellwig
Add maintainers entry for the Qualcomm QCA807x PHY driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 667d03852191..48f32ef108d5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14775,6 +
On Sat, 6 Feb 2021 11:47:26 + (UTC), Christophe Leroy wrote:
> mfsrin() is a macro.
>
> Change in into an inline function to avoid conflicts in KVM
> and make it more evolutive.
Applied to powerpc/next.
[1/3] powerpc/32s: Change mfsrin() into a static inline function
https://git.kernel
On 4/21/2020 12:13 PM, Joonsoo Kim wrote:
> This patchset is a preparation for my future patchset "mm/cma: manage the
> memory
> of the CMA area by using the ZONE_MOVABLE" [1] to solve the many CMA problems.
>
> CMA areas can be on the all the memory range, from ZONE_DMA to ZONE_HIGHMEM.
> And,
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