Fix typo in comment.
Reviewed-by: Linus Walleij
Acked-by: Alexander Sverdlin
Signed-off-by: Nikita Shubin
---
drivers/gpio/gpio-ep93xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index a69bf3100f99..9760df7d1172
As ->to_irq is redefined in gpiochip_add_irqchip, having it defined in
driver is useless, so let's drop it.
Reviewed-by: Linus Walleij
Acked-by: Alexander Sverdlin
Signed-off-by: Nikita Shubin
---
drivers/gpio/gpio-ep93xx.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpio/
On Tue, Feb 09, 2021 at 11:57:28PM +1100, Alistair Popple wrote:
> On Tuesday, 9 February 2021 9:27:05 PM AEDT Daniel Vetter wrote:
> > >
> > > Recent changes to pin_user_pages() prevent the creation of pinned pages in
> > > ZONE_MOVABLE. This series allows pinned pages to be created in
> ZONE_MOV
On Wed, Jan 27, 2021 at 04:56:22PM -0600, Mike Ximing Chen wrote:
> Add basic driver functionality (load, unload, probe, and remove callbacks)
> for the DLB driver.
>
> Add documentation which describes in detail the hardware, the user
> interface, device interrupts, and the driver's power-managem
On Tue, Feb 9, 2021 at 1:57 PM Alistair Popple wrote:
>
> On Tuesday, 9 February 2021 9:27:05 PM AEDT Daniel Vetter wrote:
> > >
> > > Recent changes to pin_user_pages() prevent the creation of pinned pages in
> > > ZONE_MOVABLE. This series allows pinned pages to be created in
> ZONE_MOVABLE
> >
On Tue, Feb 09, 2021 at 12:52:17PM +0100, Lino Sanfilippo wrote:
> > @@ -640,8 +643,10 @@ void tpm_chip_unregister(struct tpm_chip *chip)
> > if (IS_ENABLED(CONFIG_HW_RANDOM_TPM))
> > hwrng_unregister(&chip->hwrng);
> > tpm_bios_log_teardown(chip);
> > - if (chip->flags & TPM_
Hi,
here is v2.
Changes from v1 -> v2
- Addressed feedback from David
- Fence off the feature in case struct page size is not
multiple of PMD size or pageblock alignment cannot be guaranted
- Tested on x86_64 small and large memory_blocks
- Tested on arm64 4KB and 64KB page sizes (for some
Let the caller check whether it can pass MHP_MEMMAP_ON_MEMORY by
checking mhp_supports_memmap_on_memory().
MHP_MEMMAP_ON_MEMORY can only be set in case
ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE is enabled, the architecture supports
altmap, and the range to be added spans a single memory block.
Signed-off-b
The changes to make rxrpc create the udp socket missed a bit to add the
Kconfig dependency on the udp tunnel code to do this.
Fix this by adding making AF_RXRPC select NET_UDP_TUNNEL.
Fixes: 1a9b86c9fd95 ("rxrpc: use udp tunnel APIs instead of open code in
rxrpc_open_socket")
Reported-by: kernel
When struct page's size is not multiple of PMD, these do not get
fully populated when adding sections, hence two sections will
intersect the same the PMD. This goes against the vmemmap-per-device
premise, so reject it if that is the case.
Signed-off-by: Oscar Salvador
---
mm/memory_hotplug.c | 5
Physical memory hotadd has to allocate a memmap (struct page array) for
the newly added memory section. Currently, alloc_pages_node() is used
for those allocations.
This has some disadvantages:
a) an existing memory is consumed for that purpose
(eg: ~2MB per 128MB memory section on x86_64)
b
Self stored memmap leads to a sparse memory situation which is unsuitable
for workloads that requires large contiguous memory chunks, so make this
an opt-in which needs to be explicitly enabled.
To control this, let memory_hotplug have its own memory space, as suggested
by David, so we can add mem
On 09.02.21 14:36, Jason Gunthorpe wrote:
>>> EXPORT_SYMBOL_GPL(tpm_chip_unregister);
>>>
>>
>> I tested the solution you scetched and it fixes the issue for me. Will you
>> send a (real) patch for this?
>
> No, feel free to bundle this up with any fixes needed and send it with
> a Signed-of
On Tue, Feb 09, 2021 at 12:07:14PM +1100, Alistair Popple wrote:
> Device private pages are used to represent device memory that is not
> directly accessible from the CPU. Extra references to a device private
> page are only used to ensure the struct page itself remains valid whilst
> waiting for m
Enable x86_64 platform to use the MHP_MEMMAP_ON_MEMORY feature.
Signed-off-by: Oscar Salvador
---
arch/x86/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 72663de8b04c..81046b7adb10 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@
Many places expects us to pass a pageblock aligned range.
E.g: memmap_init_zone() needs a pageblock aligned range in order
to set the proper migrate type for it.
online_pages() needs to operate on a pageblock aligned range for
isolation purposes.
Make sure we disable the feature in case we cannot
On 09/02/2021 14:02, Greg Kroah-Hartman wrote:
> On Tue, Feb 09, 2021 at 01:45:35PM +0100, Dafna Hirschfeld wrote:
>>
>>
>> Am 08.02.21 um 21:46 schrieb Hans Verkuil:
>>> On 08/02/2021 18:57, Sasha Levin wrote:
From: Dafna Hirschfeld
[ Upstream commit 31f190e0ccac8b75d33fdc95a797c52
Enable arm64 platform to use the MHP_MEMMAP_ON_MEMORY feature.
Signed-off-by: Oscar Salvador
---
arch/arm64/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 87fd02a7a62f..d4fb29779cd4 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kc
On Tue, Feb 9, 2021 at 2:35 PM Jason Gunthorpe wrote:
>
> On Tue, Feb 09, 2021 at 11:57:28PM +1100, Alistair Popple wrote:
> > On Tuesday, 9 February 2021 9:27:05 PM AEDT Daniel Vetter wrote:
> > > >
> > > > Recent changes to pin_user_pages() prevent the creation of pinned pages
> > > > in
> > >
On Tue, Feb 09, 2021 at 02:39:41PM +0100, Hans Verkuil wrote:
> On 09/02/2021 14:02, Greg Kroah-Hartman wrote:
> > On Tue, Feb 09, 2021 at 01:45:35PM +0100, Dafna Hirschfeld wrote:
> >>
> >>
> >> Am 08.02.21 um 21:46 schrieb Hans Verkuil:
> >>> On 08/02/2021 18:57, Sasha Levin wrote:
> From: D
On Tue, Feb 09, 2021 at 02:39:51PM +0100, Daniel Vetter wrote:
> Either way ZONE_DEVICE for not vram/device memory sounds wrong. Is
> that really going on here?
My read was this was doing non-coherent atomics on CPU memory.
Atomics on GPU memory is just called migration to GPU memory, it
doesn't
On 05/02/2021 12:48, Vincent Guittot wrote:
> newidle_balance runs with both preempt and irq disabled which prevent
> local irq to run during this period. The duration for updating of the
> blocked load of CPUs varies according to the number of cgroups and
Maybe s/number of cgroups/number of CPU c
On 05/02/2021 12:48, Vincent Guittot wrote:
> idle load balance is the only user of update_nohz_stats and doesn't use
> force parameter. Remove it
Wasn't the 'force=true' from ilb eclipsing the jiffy resolution rate
limiting '!time_after(jiffies, rq->last_blocked_load_update_tick)' of
update_block
note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/kan-liang-linux-intel-com/Add-Alder-Lake-support-for-perf/20210209-070642
base: https://git.kernel.org/pub/scm/linux/
PREEMPT_RT and PREEMPT both needs PREEMPT_DYNAMIC to build, so move
selection of PREEMPT_DYNAMIC to the common denominator, PREEMPTION.
Signed-off-by: Mike Galbraith
---
kernel/Kconfig.preempt |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/kernel/Kconfig.preempt
+++ b/kernel/K
On 05/02/2021 12:48, Vincent Guittot wrote:
> Reorder the tests and skip prevent useless test when no load balance has
> been performed.
LGTM.
But IMHO the reason why those two if conditions can be skipped for the
'goto out' path is that we don't release the rq lock rather the actual
lb. Might be
From: Konstantin Porotchkin
This patch series contains the following changes/fixes:
1. Add support for Armada CN913x Development Board topology "B"
2. Add support for Armada CN913x Reference Design boards (CRB)
3. Fixes the CP11X references in PHY binding document
4. Fixes the NAND paritioninig s
From: Konstantin Porotchkin
Eliminate 1MB gap between Linux and filesystem partitions.
Signed-off-by: Konstantin Porotchkin
---
arch/arm64/boot/dts/marvell/cn9130-db.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dts
b/arch/arm64/
From: Stefan Chulski
This patch enables eth0 10G interface on CN9130-DB paltforms.
Signed-off-by: Stefan Chulski
Signed-off-by: Konstantin Porotchkin
---
arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/
From: Grzegorz Jaszczyk
The cp11x references in dts has changed, reflect it in comphy
documentation.
Signed-off-by: Grzegorz Jaszczyk
Signed-off-by: Konstantin Porotchkin
---
Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt | 12 ++--
1 file changed, 6 insertions(+), 6 delet
From: Konstantin Porotchkin
The Marvell reference platform CN9130-CRB is a small form factor
board in a metal case. The platform is based on CN9130 SoC with
addition of 8 Gigabit ports SOHO Ethernet switch.
The reference platform features the following:
* Up to 4 CPU cores ARMv8 Cortex-A72 CPU
*
From: Konstantin Porotchkin
The CN913x DB with topology B is similar to a regular setup (A)
boards, but uses NAND flash as a boot device, while topology A
boards are booting from SPI flash.
Since NAND and SPI on CN913x DB boards share some wires, they
cannot be activated simultaneously.
The DTS f
On 05/02/2021 12:48, Vincent Guittot wrote:
> Instead of waking up a random and already idle CPU, we can take advantage
> of this_cpu being about to enter idle to run the ILB and update the
> blocked load.
>
> Signed-off-by: Vincent Guittot
> ---
> include/linux/sched/nohz.h | 2 ++
> kernel/sc
On Tue, Feb 9, 2021 at 5:41 AM 黄学森 wrote:
>
> Appreciate for your reply Willem!
>
> The original intention of this commit is that when we use bpf_skb_adjust_room
> to encapsulate
> Vxlan packets, we find some powerful device features disabled.
>
> Setting the inner_protocol directly as skb->prot
On Fri, Feb 5, 2021 at 10:28 AM Johannes Weiner wrote:
>
> With memcg having switched to rstat, memory.stat output is precise.
> Update the cgroup selftest to reflect the expectations and error
> tolerances of the new implementation.
>
> Also add newly tracked types of memory to the memory.stat si
On Tue, Feb 9, 2021 at 7:10 AM Vaittinen, Matti
wrote:
>
> Hello Again Rob,
>
> And thanks for reviewing the bindings!
>
> On Mon, 2021-02-08 at 20:24 -0600, Rob Herring wrote:
> > On Tue, Jan 19, 2021 at 09:17:09AM +0200, Matti Vaittinen wrote:
> > > Add binding documentation for regulators on RO
On Tue, Feb 9, 2021 at 2:54 PM Nikita Shubin wrote:
> On Tuesday, 9 February 2021 15:46:19 MSK Andy Shevchenko wrote:
> >On Tue, Feb 9, 2021 at 2:35 PM Nikita Shubin
> wrote:
> >> On Monday, 8 February 2021 16:20:17 MSK Andy Shevchenko wrote:
> >> >On Mon, Feb 8, 2021 at 11:00 AM Nikita Shubin
>
On Tue, Feb 09, 2021 at 03:01:42AM +, Song Bao Hua (Barry Song) wrote:
> On the other hand, wouldn't it be the benefit of hardware accelerators
> to have a lower and more stable latency zip/encryption than CPU?
No, I don't think so.
If this is an important problem then it should apply equall
On Tue 2021-02-09 18:56:13, Yafang Shao wrote:
> Currently the pGp only shows the names of page flags, rather than
> the full information including section, node, zone, last cpupid and
> kasan tag. While it is not easy to parse these information manually
> because there're so many flavors. Let's in
From: Marc Kleine-Budde
> Sent: 09 February 2021 11:28
>
> On 09.02.2021 10:34:42, David Laight wrote:
...
> > AFAICT there is one structure that would have end-padding.
> > But I didn't actually spot anything validating it's length.
> > Which may well mean that it is possible to read off the end
On Sat, Feb 06, 2021 at 11:49:29AM +0100, Juergen Gross wrote:
> In order to support the possibility of per-device event channel
> settings (e.g. lateeoi spurious event thresholds) add a xenbus device
> pointer to struct irq_info() and modify the related event channel
> binding interfaces to take t
s/theroretical/theoretical/
Signed-off-by: Bhaskar Chowdhury
---
arch/x86/kernel/apic/vector.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 3c9c7492252f..aa9d3cf69580 100644
--- a/arch/x86/kernel/apic/ve
On Tue, Feb 9, 2021 at 2:17 AM Sai Krishna Potthuri wrote:
>
> Hi Rob,
>
> Thanks for the review.
>
> > -Original Message-
> > From: Rob Herring
> > Sent: Tuesday, February 9, 2021 7:51 AM
> > To: Sai Krishna Potthuri
> > Cc: Linus Walleij ; Michal Simek
> > ; Greg Kroah-Hartman ;
> > li
On Tue, Feb 09, 2021 at 12:36:20PM +1000, Nicholas Piggin wrote:
> What if you did this?
> +static inline struct task_struct *get_current(void)
> +{
> + register struct task_struct *task asm ("r2");
> +
> + return task;
> +}
Local register asm variables are *only* guaranteed to live in th
On Tue, 9 Feb 2021 at 14:09, Valentin Schneider
wrote:
>
> On 05/02/21 12:48, Vincent Guittot wrote:
> > Instead of waking up a random and already idle CPU, we can take advantage
> > of this_cpu being about to enter idle to run the ILB and update the
> > blocked load.
> >
> > Signed-off-by: Vincen
> At the same time some FW is necessary. Certain chip functions, are
> best driven by a micro-controller running a tight control loop.
For a smart NIC, i could agree. But a switch? The data path is in
hardware. The driver is all about configuring this hardware, and then
it is idle. Polls the PHY
Hi David,
The only commit causing issues is commit f78e50c8f750 ("certs: Factor
out the blacklist hash creation"). I think my last patch fix the issue,
and I'm testing with the UEFI DBX, but I don't understand why this
change would have an impact. In the meantime you can push Eric's commits
first,
On Tue, 2021-02-09 at 13:19 +, Phil Elwell wrote:
> Hi Nicolas,
>
> On Tue, 9 Feb 2021 at 13:00, Nicolas Saenz Julienne
> wrote:
> >
> > In BCM2711 the new ARGON ASB took over V3D. The old ASB is still present
> > with the ISP and H264 bits, and V3D is in the same place in the new ASB
> > as
On Tue, Feb 9, 2021 at 3:31 PM Nikita Shubin wrote:
...
> + .irq= _irq, \
> .has_irq= _has_irq, \
> .has_hierarchical_irq = _has_hier, \
Just a side note for the further c
On 2/8/21 4:03 PM, Ulf Hansson wrote:
On Mon, 8 Feb 2021 at 13:16, Yann GAUTIER wrote:
On 2/5/21 1:19 PM, Yann GAUTIER wrote:
On 2/5/21 10:53 AM, Ulf Hansson wrote:
- trimmed cc-list
On Thu, 4 Feb 2021 at 13:08, wrote:
From: Yann Gautier
To properly manage commands awaiting R1B respons
On Tue, Feb 09, 2021 at 09:09:52PM +0800, Tiezhu Yang wrote:
> On 02/09/2021 08:11 PM, Thomas Bogendoerfer wrote:
> > On Tue, Feb 09, 2021 at 01:05:25PM +0800, Tiezhu Yang wrote:
> > > According to MIPS EJTAG Specification [1], a Debug Breakpoint
> > > exception occurs when an SDBBP instruction is
s/mistaeks/mistakes/
Signed-off-by: Bhaskar Chowdhury
---
Documentation/maintainer/pull-requests.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/maintainer/pull-requests.rst
b/Documentation/maintainer/pull-requests.rst
index 1a2f99b67d25..35759d16a5cc 100
__put_user_size_allowed() is only called from __put_user_size() now.
Merge them together.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/uaccess.h | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/uaccess.h
b/arch/powerpc/incl
On Tue, Feb 9, 2021 at 3:31 PM Nikita Shubin wrote:
>
> v2:
> https://lore.kernel.org/linux-gpio/20210127104617.1173-1-nikita.shu...@maquefel.me/
>
> v3:
> https://lore.kernel.org/linux-gpio/20210128122123.25341-1-nikita.shu...@maquefel.me/
>
> v4:
> https://lore.kernel.org/linux-gpio/202102050805
Since commit 17bc43367fc2 ("powerpc/uaccess: Implement
unsafe_copy_to_user() as a simple loop"), raw_copy_to_user_allowed()
is only used by raw_copy_to_user().
Merge raw_copy_to_user_allowed() into raw_copy_to_user().
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/uaccess.h | 8 +-
Copied from commit 4b842e4e25b1 ("x86: get rid of small
constant size cases in raw_copy_{to,from}_user()")
Very few call sites where that would be triggered remain, and none
of those is anywhere near hot enough to bother.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/uaccess.h |
Remove typedefs from include/rtl8723b_recv.h and convert one usage in
hal/rtl8723bs_recv.c to use the actual structure name in its pointer
declaration. Fixes two checkpatch warnings.
Signed-off-by: Phillip Potter
---
drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c| 2 +-
drivers/staging/rtl87
> Regarding splitting the series up. I don't see a problem in just
> sending the cover-letter patch and actual GPIO-related patches to
> the GPIO-maintainers with no need to have them added to Cc in the rest
> of the series.
The Linux community has to handle a large number of patches. I don't
part
On Mon, 08 Feb 2021, Andreas Kemnade wrote:
> On Sun, 24 Jan 2021 22:41:20 +0100
> Jonathan Neuschäfer wrote:
>
> > This patchset adds basic support for the embedded controller found on
> > older ebook reader boards designed by/with the ODM Netronix Inc.[1] and
> > sold by Kobo or Tolino, for ex
On Mon, 8 Feb 2021 at 20:44, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 5.10.15 release.
> There are 120 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
Hi Alex,
Thanks for your patch!
On Sun, Feb 7, 2021 at 4:08 PM wrote:
> From: Zhang Kun
>
> The parameters of sh_pfc_enum_in_range() pinmux_range *r should be checked
> first for possible null ponter, especially when PINMUX_TYPE_FUNCTION as the
> pinmux_type was passed by sh_pfc_config_mux().
Hi,
wt., 9 lut 2021 o 14:47 napisał(a):
>
> From: Stefan Chulski
>
> This patch enables eth0 10G interface on CN9130-DB paltforms.
>
> Signed-off-by: Stefan Chulski
> Signed-off-by: Konstantin Porotchkin
> ---
> arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
> 1 file changed, 1 insertion
On Mon, 08 Feb 2021, Hans de Goede wrote:
> Hi Mark, Lee,
>
> On 2/4/21 12:24 PM, Hans de Goede wrote:
> > Hi all,
> >
> > Here is v4 of my series to rework the arizona codec jack-detect support
> > to use the snd_soc_jack helpers instead of direct extcon reporting.
> >
> > This is a resend wit
s/simulatneous/simultaneous/
Signed-off-by: Bhaskar Chowdhury
---
include/uapi/linux/capi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/linux/capi.h b/include/uapi/linux/capi.h
index 31f946f8a88d..4dcdb628d98b 100644
--- a/include/uapi/linux/capi.h
+++ b/in
On Tue, Feb 09, 2021 at 02:53:53PM +0100, Petr Mladek wrote:
> On Tue 2021-02-09 18:56:13, Yafang Shao wrote:
...
> I am sorry for my ignorance. I am not familiar with MM.
> But it is pretty hard to understand what call does what.
>
> I have found the following comment in include/linux/page_flag
Hello Lee, Mark All,
On Fri, 2021-01-22 at 16:30 +0200, Matti Vaittinen wrote:
> Initial support for ROHM BD9576MUF and BD9573MUF PMICs.
>
> These PMICs are primarily intended to be used to power the R-Car
> family
> processors. BD9576MUF includes some additional safety features the
> BD9573MUF d
On 09/02/2021 12:17, Leo Yan wrote:
Hi Jianlin,
On Tue, Feb 09, 2021 at 07:33:57PM +0800, Jianlin Lv wrote:
gcc version: 11.0.0 20210208 (experimental) (GCC)
Following build error on arm64:
...
In function ‘printf’,
inlined from ‘regs_dump__printf’ at util/session.c:1141:3,
inli
On Mon, Jan 04, 2021 at 02:55:00PM +0800, Jason Wang wrote:
> Signed-off-by: Jason Wang
> ---
> drivers/virtio/Kconfig | 10 +-
> drivers/virtio/Makefile| 1 +
> drivers/virtio/virtio_pci_common.h | 27 +-
> drivers/virtio/virtio_pci_modern.c | 617
On Tue, Feb 09, 2021 at 07:31:55PM +0530, Bhaskar Chowdhury wrote:
>
> s/mistaeks/mistakes/
You missed the joke.
On Tue, 2021-02-09 at 13:25 +, Avri Altman wrote:
> >
> >
> > > > > + put_unaligned_be64(ppn, &cdb[6]);
> > > >
> > > > You are assuming the HPB entries read out by "HPB Read Buffer"
> > > > cmd
> > > > are
> > > > in Little
> > > > Endian, which is why you are using put_unaligned_be64 h
On Tue, 9 Feb 2021 at 14:47, Dietmar Eggemann wrote:
>
> On 05/02/2021 12:48, Vincent Guittot wrote:
> > Instead of waking up a random and already idle CPU, we can take advantage
> > of this_cpu being about to enter idle to run the ILB and update the
> > blocked load.
> >
> > Signed-off-by: Vincen
On Tue, Feb 9, 2021 at 9:38 PM David Howells wrote:
>
> The changes to make rxrpc create the udp socket missed a bit to add the
> Kconfig dependency on the udp tunnel code to do this.
>
> Fix this by adding making AF_RXRPC select NET_UDP_TUNNEL.
>
> Fixes: 1a9b86c9fd95 ("rxrpc: use udp tunnel APIs
We have a number of systems industry-wide that have a subset of their
functionality that works as follows:
1. Receive a message from local kmsg, serial console, or netconsole;
2. Apply a set of rules to classify the message;
3. Do something based on this classification (like scheduling a
remedi
From: Patrick Daly
Print the name of the CMA region for convenience. This is useful
information to have when cma_alloc() fails.
Signed-off-by: Patrick Daly
Signed-off-by: Georgi Djakov
---
v2:
* Print the "count" variable, as it was originally in the code. (Randy)
* Fix spelling s/convienien
On Mon, Jan 25, 2021 at 12:21 AM Richard Weinberger wrote:
>
> I'm happy to announce the first non-RFC version of this patch set.
> Over the xmas holidays I found some time to experiment with various userspace
> implementations of MTDs and gave the kernel side more fine-tuning.
>
> Rationale:
> --
On 2/9/21 06:03, Randy Dunlap wrote:
On 2/8/21 3:45 PM, a...@linux-foundation.org wrote:
The mm-of-the-moment snapshot 2021-02-08-15-44 has been uploaded to
https://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
https://www.ozlabs.org/~akpm/mmotm/
This is
From: "Prasanth KSR"
Perform BIOS Management calls on supported Dell machines
through the Dell WMI System Management interface.
This interface provides IOCTL's to perform bundled
BIOS Setting transactions.
Cc: Hans de Goede
Signed-off-by: Prasanth KSR
Co-developed-by: Divya Bharathi
Signed-
Hi all.
I'm joyful to suggest the block-layer interposer (blk_interposer) v5.
blk_interposer allows to intercept bio requests, remap bio to another
devices or add new bios.
This patch series adds support blk_interposer for dm-linear.
In the first patch, I suggest the remap_and_filter.rst file.
Y
remap_and_filter - describes the new features that
blk_interposer provides for device mapper.
Signed-off-by: Sergei Shtepa
---
.../admin-guide/device-mapper/index.rst | 1 +
.../device-mapper/remap_and_filter.rst| 132 ++
2 files changed, 133 insertions(+)
create
blk_interposer allows to intercept bio requests, remap bio
to another devices or add new bios.
Signed-off-by: Sergei Shtepa
---
block/bio.c | 2 +
block/blk-core.c | 35
block/genhd.c | 86 +++
include/linux
blk_mq_is_queue_frozen() allow to assert that the queue is frozen.
Signed-off-by: Sergei Shtepa
---
block/blk-mq.c | 13 +
include/linux/blk-mq.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/block/blk-mq.c b/block/blk-mq.c
index f285a9123a8b..924ec26fae5f 100644
--
Le 09/02/2021 à 03:02, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
For book3s/64, FULL_REGS() is 'true' at all time, so the test voids.
For others, non volatile registers are saved inconditionally.
So the verification is pointless.
Should
New ioctl DM_DEV_REMAP_CMD allow to remap bio requests
from regular block device to dm device.
Signed-off-by: Sergei Shtepa
---
drivers/md/dm-core.h | 20 ++
drivers/md/dm-ioctl.c | 35
drivers/md/dm.c | 375 +-
include/uapi/l
The 'noexcl' option allow to open underlying block-device
without FMODE_EXCL.
Signed-off-by: Sergei Shtepa
---
drivers/md/dm-linear.c| 14 +-
drivers/md/dm-table.c | 14 --
drivers/md/dm.c | 26 +++---
drivers/md/dm.h
New 'noexcl' option allow to open underlying block-device
without FMODE_EXCL flag.
Signed-off-by: Sergei Shtepa
---
.../admin-guide/device-mapper/linear.rst | 26 ---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/Documentation/admin-guide/device-mapper/linea
s/verson/version/
Signed-off-by: Bhaskar Chowdhury
---
drivers/scsi/aic7xxx/aic79xx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/aic7xxx/aic79xx.h b/drivers/scsi/aic7xxx/aic79xx.h
index dd5dfd4f30a5..c31e48fcebc7 100644
--- a/drivers/scsi/aic7xxx/aic79xx.h
From: Segher Boessenkool
> Sent: 09 February 2021 13:51
>
> On Tue, Feb 09, 2021 at 12:36:20PM +1000, Nicholas Piggin wrote:
> > What if you did this?
>
> > +static inline struct task_struct *get_current(void)
> > +{
> > + register struct task_struct *task asm ("r2");
> > +
> > + return task;
Le 09/02/2021 à 03:06, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
Combine all tests of regs->msr into a single logical one.
Okay by me unless we choose to do the config option and put these all
under it. I think I would prefer that becaus
On Mon, Feb 8, 2021 at 8:48 PM Andy Shevchenko
wrote:
>
> On Mon, Feb 8, 2021 at 9:47 PM Andy Shevchenko
> wrote:
> > On Mon, Feb 8, 2021 at 9:30 PM Rafael J. Wysocki wrote:
> > >
> > > On Friday, February 5, 2021 12:15:22 PM CET Andy Shevchenko wrote:
> > > > On Fri, Feb 5, 2021 at 11:14 AM And
On 14:21 Tue 09 Feb 2021, Matthew Wilcox wrote:
On Tue, Feb 09, 2021 at 07:31:55PM +0530, Bhaskar Chowdhury wrote:
s/mistaeks/mistakes/
You missed the joke.
:) it seems!
signature.asc
Description: PGP signature
On Tue, Feb 09, 2021 at 11:55:33AM +, Catalin Marinas wrote:
> On Mon, Feb 08, 2021 at 04:56:16PM +, Vincenzo Frascino wrote:
> > When MTE async mode is enabled TFSR_EL1 contains the accumulative
> > asynchronous tag check faults for EL1 and EL0.
> >
> > During the suspend/resume operation
On Mon, Feb 08, 2021 at 12:01:57PM -0800, Randy Dunlap wrote:
> Hi,
> Just a couple of nits below:
>
> On 2/8/21 7:12 AM, Calvin Johnson wrote:
> > Introduce ACPI mechanism to get PHYs registered on a MDIO bus and
> > provide them to be connected to MAC.
> >
> > Describe properties "phy-handle" a
On Tue, Feb 9, 2021 at 4:22 AM Weidong Cui wrote:
>
> Signed-off-by: Weidong Cui
> Signed-off-by: Xinyang Ge
ACPICA material, left to Erik & Bob, thanks!
> ---
> drivers/acpi/acpica/evhandler.c | 2 ++
> include/acpi/acconfig.h | 4
> 2 files changed, 6 insertions(+)
>
> diff --g
On Mon, 8 Feb 2021 17:57:20 -0700, Nathan Chancellor wrote:
> Similar to commit 28187dc8ebd9 ("ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN
> depends on !LD_IS_LLD"), ld.lld prior to 13.0.0 does not properly
> support aarch64 big endian, leading to the following build error when
> CONFIG_CPU_BIG_ENDIAN is
On 2/8/21 7:42 PM, zangchun...@bytedance.com wrote:
> From: Chunxin Zang
>
> Change "sane" to "same" in a comment in io_uring.c
It's supposed to say 'sane'.
--
Jens Axboe
Miklos,
- Ursprüngliche Mail -
>> The core goal of MUSE is having the complexity on the userspace side and
>> only a small MTD driver in kernelspace.
>> While playing with different approaches I realized that FUSE offers
>> everything
>> we need. So MUSE is a little like CUSE except that
On Tue, Feb 09, 2021 at 02:18:26PM +, John Garry wrote:
> On 09/02/2021 12:17, Leo Yan wrote:
> > Hi Jianlin,
> >
> > On Tue, Feb 09, 2021 at 07:33:57PM +0800, Jianlin Lv wrote:
> > > gcc version: 11.0.0 20210208 (experimental) (GCC)
> > >
> > > Following build error on arm64:
> > >
> > > ..
On 02/02/2021, 14:05, "Greg KH" wrote:
On Mon, Feb 01, 2021 at 07:24:53PM +0200, Adrian Catangiu wrote:
> +EXPORT_SYMBOL(sysgenid_bump_generation);
EXPORT_SYMBOL_GPL()? I have to ask...
Good catch! Will update.
Amazon Development Center (Romania) S.R.L. registered office: 27A S
ure things are a bit sane. Will be good to have additional
eyes.
On 11:21-20210209, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Add support for two Siemens SIMATIC IOT2050 variants, Basic and
> Advanced. They are based on the TI AM6528 and AM6548 SOCs.
>
> Based on original version by L
On 09.02.2021 08:48, Stephen Boyd wrote:
> Quoting (2021-01-31 09:04:28)
>> This clock must be always enabled to allow access to any registers in
>> fsys1 CMU. Until proper solution based on runtime PM is applied
>> (similar to what was done for Exynos5433), fix this by calling
>> clk_prepare_enabl
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