On Mon, 14 Dec 2020 07:06:20 +0100,
Kai-Heng Feng wrote:
>
> When codec probe fails, it doesn't enable runtime suspend, and can
> prevent graphics card from getting powered down:
> [4.280991] snd_hda_intel :01:00.1: no codecs initialized
>
> $ cat /sys/bus/pci/devices/:01:00.1/power/r
Analyzing misspellings over the past 10k commit messages,
a few more corrections are added to spelling.txt
Signed-off-by: Dwaipayan Ray
---
scripts/spelling.txt | 18 ++
1 file changed, 18 insertions(+)
diff --git a/scripts/spelling.txt b/scripts/spelling.txt
index 953f4a2de1e5.
Analyzing misspellings over the past 10k commit messages,
a few more corrections are added to spelling.txt
Signed-off-by: Dwaipayan Ray
---
Changes in v2:
- Fix additional whitespace before "up to"
scripts/spelling.txt | 18 ++
1 file changed, 18 insertions(+)
diff --git a/scri
On 12. 12. 20, 8:09, József Horváth wrote:
This is a serial port driver for
Silicon Labs Si4455 Sub-GHz transciver.
The goal of this driver is to removing wires
between central(linux) device and remote serial devices/sensors,
but keeping the original user software.
It represents regular
Hi all,
Today's linux-next merge of the rtc tree got a conflict in:
include/linux/rtc.h
between commit:
33e62e832384 ("ntp, rtc: Move rtc_set_ntp_time() to ntp code")
from the tip tree and commit:
fdcfd854333b ("rtc: rework rtc_register_device() resource management")
from the rtc tree.
On Mon, 2020-12-14 at 13:28 +0530, Dwaipayan Ray wrote:
> Analyzing misspellings over the past 10k commit messages,
> a few more corrections are added to spelling.txt
I don't agree with all of these.
> diff --git a/scripts/spelling.txt b/scripts/spelling.txt
[]
> @@ -1253,6 +1260,7 @@ senarios||s
On Fri, 11 Dec 2020 at 23:50, Mel Gorman wrote:
>
> On Fri, Dec 11, 2020 at 11:19:05PM +0100, Peter Zijlstra wrote:
> > On Fri, Dec 11, 2020 at 08:43:37PM +, Mel Gorman wrote:
> > > One bug is in __select_idle_core() though. It's scanning the SMT mask,
> > > not select_idle_mask so it can retu
Hi,
Newer members of the KS3 family (after AM654) have support for burst_size
configuration for each DMA channel.
The HW default value is 64 bytes but on higher throughput channels it can be
increased to 256 bytes (UCHANs) or 128 byes (HCHANs).
Aligning the buffers and length of the transfer to
Some DMA device can benefit with higher order of alignment than the maximum
of 64 bytes currently defined.
Define 128 and 256 bytes alignment for these devices.
Signed-off-by: Peter Ujfalusi
---
include/linux/dmaengine.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/dmaeng
The UDMA and BCDMA can provide higher throughput if the burst_size of the
channel is changed from it's default (which is 64 bytes) for Ultra-high
and high capacity channels.
This performance benefit is even more visible when the buffers are aligned
with the burst_size configuration.
The am654 doe
On Sat, Dec 12, 2020 at 09:16:08AM -0800, Jakub Kicinski wrote:
On Fri, 11 Dec 2020 16:24:13 +0100 Stefano Garzarella wrote:
On Fri, Dec 11, 2020 at 12:32:37PM +0200, Andra Paraschiv wrote:
>vsock enables communication between virtual machines and the host they are
>running on. Nested VMs can be
On Mon, Dec 14, 2020 at 1:39 PM Joe Perches wrote:
>
> On Mon, 2020-12-14 at 13:28 +0530, Dwaipayan Ray wrote:
> > Analyzing misspellings over the past 10k commit messages,
> > a few more corrections are added to spelling.txt
>
> I don't agree with all of these.
>
> > diff --git a/scripts/spelling
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
tags/media/v5.11-1
For media updates for Kernel 5.11, containing:
- some rework at the uAPI pixel format docs;
- the smiapp driver has started to gain support for MIPI CSS camera
sensors a
Hello Matti-san,
> From: Vaittinen, Matti, Sent: Monday, December 14, 2020 4:13 PM
>
> Hello Shimoda-san,
>
> On Mon, 2020-12-14 at 04:57 +, Yoshihiro Shimoda wrote:
> > Hello Matti-san,
> >
> > > From: Vaittinen, Matti, Sent: Friday, December 11, 2020 9:34 PM
> > >
> > > Hello again Shimada
Enable GPIO controller for HiSilicon's ARM SoC.
GPIO is common driver for HiSilicon's ARM SoC and it provide support for
some function of I2C and SPI.
Signed-off-by: Luo Jiaxing
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/a
Here add maintainer information for HiSilicon GPIO driver.
Signed-off-by: Luo Jiaxing
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2daa6ee..8d13419a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7896,6 +7896,13 @@ L: dmaeng...@
This GPIO driver is for HiSilicon's ARM SoC.
HiSilicon's GPIO controller support double-edge interrupt and multi-core
concurrent access.
ACPI table example for this GPIO controller:
Device (GPO0)
{
Name (_HID, "HISI0184")
Device (PRTA)
{
Name (_ADR, Zero)
This series is the GPIO driver for HiSilicon's ARM SoC.
It provide patches for device driver, MAINTAINER file, and enable gpio-hisi
at defconfig.
Thanks
Jiaxing
---
v1->v2: 1. set (ARM64 || COMPILE_TEST) && ACPI at kconfig.
2. Delete some useless header files.
3. Replace "hi
On 2020-12-11 16:41:05 [-0500], Steven Rostedt wrote:
> 5.4.82-rt46-rc1 stable review patch.
> If anyone has any objections, please let me know.
>
> --
>
> From: Sebastian Andrzej Siewior
>
> This change is no longer needed since commit
>26c7295be0c5e ("kthread: Do not preem
Analyzing misspellings over the past 10k commit messages,
a few more corrections are added to spelling.txt
Signed-off-by: Dwaipayan Ray
---
Changes in v3:
- Remove duplicate correction for "seperate"
- Remove corrections for "uptodate", "wont"
Changes in v2:
- Fix additional whitespace before "u
Writing a new value of 3 to /proc/sys/kernel/randomize_va_space
enables full randomization of memory mappings. With 2, the base of the
VMA used for such mappings is random, but the mappings are created in
predictable places within the VMA and in sequential order. With 3, new
VMAs are created to ful
xhci-mtk has hooks on add_endpoint() and drop_endpoint() from xhci
to handle its own sw bandwidth managements and stores bandwidth data
into internal table every time add_endpoint() is called,
so when bandwidth allocation fails at one endpoint, all earlier
allocation from the same interface could s
allnoconfig
i386 randconfig-a001-20201214
i386 randconfig-a004-20201214
i386 randconfig-a003-20201214
i386 randconfig-a002-20201214
i386 randconfig-a006-20201214
i386 randconfig-a005-20201214
i386
Since commit 0a1754b2a97e ("ring-buffer: Return 0 on success from
ring_buffer_resize()"), computing the size is not needed anymore.
Drop unneeded assignment in ring_buffer_resize().
Signed-off-by: Lukas Bulwahn
---
kernel/trace/ring_buffer.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/
Enable PID_IN_CONTEXTIDR by default when Arm SPE is enabled.
This flag is required to get PID data in the SPE trace. Without
it the perf tool will report 0 for PID which isn't very useful,
especially when doing system wide profiling or profiling
applications that fork.
There is a small performance
On Thu, 2020-12-10 at 15:03 +0200, Grygorii Strashko wrote:
>
> On 10/12/2020 03:56, Qii Wang wrote:
> > On Mon, 2020-12-07 at 18:35 +0200, Grygorii Strashko wrote:
> >>
> >>>
> >>> On Thu, 2020-12-03 at 10:01 +0200, Grygorii Strashko wrote:
>
> On 03/12/2020 03:25, Qii Wang wrote:
> >>>
Below is the list of build error/warning regressions/improvements in
v5.10[1] compared to v5.9[2].
Summarized:
- build errors: +2/-7
- build warnings: +21/-30
JFYI, when comparing v5.10[1] to v5.10-rc7[3], the summaries are:
- build errors: +0/-0
- build warnings: +2/-6
Happy fixing! ;-)
On 02/12/2020 01:09, Will Deacon wrote:
> On Tue, Dec 01, 2020 at 12:10:40PM +0800, Leo Yan wrote:
>> On Mon, Nov 30, 2020 at 04:46:51PM +, Will Deacon wrote:
>>> On Mon, Nov 30, 2020 at 06:24:54PM +0200, James Clark wrote:
Enable PID_IN_CONTEXTIDR by default when Arm SPE is enabled.
>>
Hi Helen,
On Tue, Aug 04, 2020 at 04:29:35PM -0300, Helen Koike wrote:
> The VB2 layer is used by a lot of drivers. Patch it to support the
> _EXT_PIX_FMT and _EXT_BUF ioctls in order to ease conversion of existing
> drivers to these new APIs.
>
> Note that internally, the VB2 core is now only us
On Fri, Dec 11, 2020 at 04:37:54PM -0500, Steven Rostedt wrote:
> From: Steven Rostedt (VMware)
>
> While running my branch profiler that checks for incorrect "likely" and
> "unlikely"s around the kernel, there's a large number of them that are
> incorrect due to being "static_branches".
>
> As
On Sat, Dec 12, 2020 at 9:47 AM Xuan Zhuo wrote:
>
> On Fri, 11 Dec 2020 16:32:06 +0100, Magnus Karlsson
> wrote:
> > On Fri, Dec 11, 2020 at 2:12 PM Xuan Zhuo
> > wrote:
> > >
> > > We can reserve the skb. When sending fails, NETDEV_TX_BUSY or
> > > xskq_prod_reserve fails. As long as skb is
On Sat, Dec 12, 2020 at 01:03:32AM +0100, Linus Walleij wrote:
> On Thu, Dec 10, 2020 at 9:53 AM Johan Hovold wrote:
> > On Wed, Dec 09, 2020 at 05:25:32PM +0100, Linus Walleij wrote:
>
> > I just replied to that thread, but to summarize, you can't rely on
> > having the sysfs code detect collisi
On Mon, Dec 14, 2020 at 12:54 AM Paul Cercueil wrote:
> IF_ENABLED(CONFIG_FOO, ptr) evaluates to (ptr) if CONFIG_FOO is set to 'y'
> or 'm', NULL otherwise. The (ptr) argument must be a pointer.
>
> The IF_ENABLED() macro can be very useful to help GCC drop dead code.
I can apply this with the o
On Sat, Dec 12, 2020 at 12:41:50AM +0100, Linus Walleij wrote:
> On Thu, Dec 10, 2020 at 9:33 AM Johan Hovold wrote:
>
> > I suggested having the driver set a flag which determines whether to use
> > the line names in sysfs or not.
>
> Aha I get it.
>
> I need to think about if I can fix that i
Hi all,
After merging the net-next tree, today's linux-next build (htmldocs)
produced these warnings:
include/net/cfg80211.h:1759: warning: Cannot understand * @struct
cfg80211_sar_chan_ranges - sar frequency ranges
on line 1759 - I thought it was a doc line
include/net/cfg80211.h:1759: warnin
On Mon, Dec 14, 2020 at 9:24 AM Luo Jiaxing wrote:
> Here add maintainer information for HiSilicon GPIO driver.
>
> Signed-off-by: Luo Jiaxing
Patch applied!
Yours,
Linus Walleij
On Mon, Dec 14, 2020 at 9:24 AM Luo Jiaxing wrote:
> This GPIO driver is for HiSilicon's ARM SoC.
Patch applied, any further issues can certainly be fixed in-tree.
Thanks for your excellent work on this driver!
Yours,
Linus Walleij
On Mon, Dec 14, 2020 at 9:24 AM Luo Jiaxing wrote:
> Enable GPIO controller for HiSilicon's ARM SoC.
>
> GPIO is common driver for HiSilicon's ARM SoC and it provide support for
> some function of I2C and SPI.
>
> Signed-off-by: Luo Jiaxing
Looks good, take this through the SoC tree with other
Hello,
syzbot found the following issue on:
HEAD commit:a68a0262 mm/madvise: remove racy mm ownership check
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=1538046b50
kernel config: https://syzkaller.appspot.com/x/.config?x=4305fa9ea70c7a9f
dashboard li
On Mon, Dec 14, 2020 at 6:44 AM Bjorn Helgaas wrote:
>
> [+cc Jesse, Tony, David, Jakub, Heiner, lists in case there's an ASPM
> issue with I211 or Realtek NICs. Beginning of thread:
> https://lore.kernel.org/r/20201024205548.1837770-1-ian.kuml...@gmail.com
>
> Short story: Ian has:
>
> Root Po
Indeed the STMMAC driver doesn't take the vendor-specific compatible
string into account to parse the "snps,tso" boolean property. It just
makes sure the node is compatible with DW MAC 4.x, 5.x and DW xGMAC
IP-cores. Fix the conditional statement so the TSO-property would be
evaluated for the compa
In accordance with [1] the permitted PBL values can be set as one of
[1, 2, 4, 8, 16, 32]. The rest of the values results in undefined
behavior. At the same time some of the permitted values can be also
invalid depending on the controller FIFOs size and the data bus width.
Seeing due to having too
Currently the "snps,axi-config", "snps,mtl-rx-config" and
"snps,mtl-tx-config" properties are declared as a single phandle reference
to a node with corresponding parameters defined. That's not good for
several reasons. First of all scattering around a device tree some
particular device-specific con
Baikal-T1 SoC is equipped with two Synopsys DesignWare GMAC v3.73a-based
ethernet interfaces with no internal Ethernet PHY attached. The IP-cores
are configured as GMAC-AXI with CSR interface clocked by a dedicated
signal. Each of which has got Rx/Tx FIFOs of 16KB, up to 8 MAC addresses
capability,
Hello,
Il giorno dom 13 dic 2020 alle ore 15:22 Manivannan Sadhasivam
ha scritto:
>
> On Fri, Dec 11, 2020 at 08:08:16PM -0800, Jakub Kicinski wrote:
> > On Fri, 11 Dec 2020 11:37:34 -0600 Dan Williams wrote:
> > > Just to re-iterate: QMI ~= AT commands ~= MBIM (not quite, but same
> > > level)
>
The stmmac_remove_config_dt() method needs to be called on the device
remove procedure otherwise for at least some of device-nodes will be left
requested.
Fixes: d2ed0a7755fe ("net: ethernet: stmmac: fix of-node and fixed-link-phydev
leaks")
Signed-off-by: Serge Semin
---
drivers/net/ethernet/s
Currently the snps,dwmac.yaml DT bindings file is used for both DT nodes
describing generic DW MAC devices and as DT schema with common properties
to be evaluated against a vendor-specific DW MAC IP-cores. Due to such
dual-purpose design the "compatible" property of the common DW MAC schema
needs t
The stmmac_remove_config_dt() method needs to be called on the device
remove procedure otherwise for at least some of device-nodes will be left
requested.
Fixes: d2ed0a7755fe ("net: ethernet: stmmac: fix of-node and fixed-link-phydev
leaks")
Signed-off-by: Serge Semin
---
drivers/net/ethernet/s
Depending on the DW *MAC configuration it can be at least connected to an
external Transmit clock, but in some cases to an external Receive clock
generator. In order to simplify/unify the sub-drivers code and to prevent
having the same clocks named differently add the Tx/Rx clocks support to
the ge
Let's replace the manual implementation of the optional ptp_clk
functionality with method devm_clk_get_optional() provided by the common
clock kernel framework. First of all it will be better from
maintainability point of view. Secondly by doing so we'll also fix a
potential problem, which will com
Current clocks description doesn't provide a comprehensive notion about
what "stmmaceth" and "pclk" actually represent from the IP-core manual
point of view. The bindings file states:
stmmaceth - "GMAC main clock",
apb - "Peripheral registers interface clock".
It isn't that easy to understand what
Calling an antagonistic method from the corresponding protagonist isn't
good from maintainability point of view, since prevents us from directly
adding a functionality in the later, which needs to be reverted in the
former. Since that's what we are about to do in order to fix the commit
573c0b9c4e0
Replace the manual implementation of the optional device reset control
functionality with using the devm_reset_control_get_optional() method in
order to improve the code maintainability and fix a potential bug. It
will come out if the reset control handler has been specified, but the
reset framewor
By all means of the stmmac_clk clock usage it isn't CSR clock, but the
system or application clock, which in particular cases can be used as a
clock source for the CSR interface. Make sure the warning message
correctly identify the clock.
Signed-off-by: Serge Semin
---
drivers/net/ethernet/stmic
The pointers need to be nullified otherwise the stmmac_remove_config_dt()
method called after them being initialized will disable the clocks. That
then will cause a WARN() backtrace being printed since the clocks would be
also disabled in the locally defined remove method.
Signed-off-by: Serge Sem
On Fri, 11 Dec 2020 at 18:45, Peter Zijlstra wrote:
>
> On Thu, Dec 10, 2020 at 12:58:33PM +, Mel Gorman wrote:
> > The prequisite patch to make that approach work was rejected though
> > as on its own, it's not very helpful and Vincent didn't like that the
> > load_balance_mask was abused to
On Mon, Dec 14, 2020 at 9:58 AM Johan Hovold wrote:
> On Sat, Dec 12, 2020 at 01:03:32AM +0100, Linus Walleij wrote:
> > If I google for the phrase "Detected name collision for GPIO name"
> > I just find the code, our discussions and some USB serial devices
> > warning about this so far.
> >
> >
The generic clocks request and preparation have been moved from
stmmac_dvr_probe()/stmmac_init_ptp() to the stmmac_probe_config_dt()
method in the framework of commit f573c0b9c4e0 ("stmmac: move stmmac_clk,
pclk, clk_ptp_ref and stmmac_rst to platform structure"). At the same time
the clocks disabl
In accordance with [1] the MDC clock frequency is supposed to be selected
with respect to the CSR clock frequency. CSR clock can be either tied to
the DW MAC system clock (GMAC main clock) or supplied via a dedicated
clk_csr_i signal. Current MDC clock selection procedure handles the former
case wh
There is a very handy dev_err_probe() method to handle the deferred probe
error number. It reduces the code size, uniforms error handling, records
the defer probe reason, etc. Use it to print the probe callback error
message.
Signed-off-by: Serge Semin
Cc: Anson Huang
---
drivers/net/ethernet/s
The "stmmaceth" clock is expected to be optional by the current driver
design, but there are several problems in the implementation. First if the
clock is specified, but failed to be requested due to an internal error or
due to not being ready yet for configuration, then the DT-probe procedure
will
Generic DW *MAC can be connected to an external Tramit and Receive clock
generators. Add the corresponding clocks description and clock-names to
the generic bindings schema so new DW *MAC-based bindings wouldn't declare
its own names of the same clocks.
Signed-off-by: Serge Semin
---
.../devicet
The stmmac_remove_config_dt() method needs to be called on the device
remove procedure otherwise for at least some of device-nodes will be left
requested.
Fixes: d2ed0a7755fe ("net: ethernet: stmmac: fix of-node and fixed-link-phydev
leaks")
Signed-off-by: Serge Semin
---
drivers/net/ethernet/s
Currently the "snps,axi-config", "snps,mtl-rx-config" and
"snps,mtl-tx-config" DT node properties are marked as deprecated when
being defined as a phandle reference to a node with parameters. The new
way of defining the DW MAC interfaces config is to add an eponymous
sub-nodes to the DW MAC device
Since the Tx/Rx clocks with the same names are now requested and
enabled/disabled in the STMMAC DT-based platform config method, there is
no need in duplicating the same procedures in the DWC QoS Eth sub-driver.
Discard it then, but make sure the denoted clocks have been specified
for the platform.
Hi Christophe,
On 12/12/2020 17:41, Christophe JAILLET wrote:
> A previous 'rcar_fcp_get()' call must be undone in the error handling path,
> as already done in the remove function.
Reviewed-by: Kieran Bingham
> Fixes: 94fcdf829793 ("[media] v4l: vsp1: Add FCP support")
> Signed-off-by: Christo
Hello folks,
I've got a problem, which has been blowing by head up for more than three
weeks now, and I'm desperately need your help in that matter. See our
Baikal-T1 SoC is created with two DW GMAC v3.73a IP-cores. Each core
has been synthesized with two GPIOs: one as GPI and another as GPO. Ther
Since the Tx clock is now requested and enabled/disabled in the STMMAC
DT-based platform config method, there is no need in duplicating the same
procedures in the DW MAC iMX sub-driver.
Signed-off-by: Serge Semin
---
.../net/ethernet/stmicro/stmmac/dwmac-imx.c | 21 +--
1 file
Currently the "master_bus" clock of the DW QoS Eth controller isn't
preserved in the STMMAC platform data, while the "slave_bus" clock is
assigned to the stmmaceth clock pointer. It isn't correct from the
platform clock bindings point of view. The "stmmaceth" clock is supposed
to be the system cloc
Let's replace the manual implementation of the optional "pclk"
functionality with using devm_clk_get_optional(). By doing so we'll
improve the code maintainability, and fix a hidden bug which will cause
problems if the "pclk" clock has been actually passed to the device, but
the clock framework fai
On Mon, Dec 14, 2020 at 12:28 AM Icenowy Zheng wrote:
>
> 在 2020-12-02星期三的 13:54 +，Andre Przywara写道：
> > Port A is used for an internal connection to some analogue circuitry
> > which looks like an AC200 IP (as in the H6), though this is not
> > mentioned in the manual.
>
> When developing for
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
lib/Makefile
between commit:
527701eda5f1 ("lib: Add a generic version of devmem_is_allowed()")
from the risc-v tree and commits:
8250e121c672 ("lib/list_kunit: follow new file name convention for KUnit
tests"
f2fs does not natively support extents in metadata, 'extent' in f2fs
is used as a virtual concept, so in f2fs_fiemap() interface, it needs
to tag FIEMAP_EXTENT_MERGED flag to indicated the extent status is a
result of merging.
Signed-off-by: Chao Yu
---
fs/f2fs/data.c | 1 +
1 file changed, 1 in
Hi,
Could any maintainer help review this?
Thanks a lot for your help,
BRs,
Lecopzer
> Although most of modern devices use ACPI, there still has combination
> of APM + ARM64.
>
> In order to select CONFIG_APM_EMULATION, make SYS_SUPPORTS_APM_EMULATION
> default is y if ACPI isn't configured.
Indeed the maximum DMA burst length can be programmed not only for DW
xGMACs, Allwinner EMACs and Spear SoC GMAC, but in accordance with [1]
for Generic DW *MAC IP-cores. Moreover the STMMAC set of drivers parse
the property and then apply the configuration for all supported DW MAC
devices. All of
Signed-off-by: Zheng Yongjun
---
drivers/scsi/qla2xxx/tcm_qla2xxx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c
b/drivers/scsi/qla2xxx/tcm_qla2xxx.c
index 61017acd3458..02d88117f423 100644
--- a/drivers/scsi/qla2xxx/tcm_qla2xxx.c
+++ b/d
Le 12/12/2020 à 16:04, Souptick Joarder a écrit :
On Fri, Dec 11, 2020 at 8:32 PM Laurent Dufour wrote:
On PowerPC, when dymically removing memory from a system we can see in the
console a
lot of messages like this:
[ 186.575389] Offlined Pages 4096
Is it specific to PowerPC ?
No, this a
On Mon, Dec 14, 2020 at 10:19:07AM +0100, Linus Walleij wrote:
> On Mon, Dec 14, 2020 at 9:58 AM Johan Hovold wrote:
> > On Sat, Dec 12, 2020 at 01:03:32AM +0100, Linus Walleij wrote:
>
> > > If I google for the phrase "Detected name collision for GPIO name"
> > > I just find the code, our discus
On Fri, Dec 11, 2020 at 10:50:02PM +, Mel Gorman wrote:
> > > The third potential downside is that the SMT sibling is not guaranteed to
> > > be checked due to SIS_PROP throttling but in the old code, that would have
> > > been checked by select_idle_smt(). That might result in premature stack
On Mon, Dec 14, 2020 at 09:11:29AM +0100, Vincent Guittot wrote:
> On Fri, 11 Dec 2020 at 23:50, Mel Gorman wrote:
> > I originally did something like that on purpose too but Vincent called
> > it out so it is worth mentioning now to avoid surprises. That said, I'm
> > at the point where anything
Hi Linus,
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k.git
tags/m68k-for-v5.11-tag1
for you to fetch ch
On Mon, Dec 14, 2020 at 5:02 AM Vijayanand Jitta wrote:
>
>
>
> On 12/11/2020 6:55 PM, Alexander Potapenko wrote:
> > On Fri, Dec 11, 2020 at 1:45 PM Vijayanand Jitta
> > wrote:
> >>
> >>
> >>
> >> On 12/11/2020 2:06 PM, Alexander Potapenko wrote:
> >>> On Thu, Dec 10, 2020 at 6:01 AM wrote:
>
Le 14/12/2020 à 03:03, Joel Fernandes a écrit :
On Tue, Jul 07, 2020 at 01:31:37PM +0800, Chinwen Chang wrote:
[..]
Hi Laurent,
We merged SPF v11 and some patches from v12 into our platforms. After
several experiments, we observed SPF has obvious improvements on the
launch time of applications,
On Fri, Dec 11, 2020 at 01:19:15AM +, Andre Przywara wrote:
> A new SoC, a new compatible string.
> Also we were too miserly with just allowing seven interrupt banks.
>
> Signed-off-by: Andre Przywara
> ---
> .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 18 --
> 1 file ch
On 13.12.20 19:08, Waiman Long wrote:
> When multiple locks are acquired, they should be released in reverse
> order. For s_start() and s_stop() in mm/vmalloc.c, that is not the
> case.
>
> s_start: mutex_lock(&vmap_purge_lock); spin_lock(&vmap_area_lock);
> s_stop : mutex_unlock(&vmap_purge_l
On Fri, Dec 11, 2020 at 01:19:16AM +, Andre Przywara wrote:
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "h_i2s2"),/* MCLK */
> + SUNXI
On Fri, Dec 11, 2020 at 08:29:22PM +0800, wanghai (M) wrote:
>
> 在 2020/12/8 17:35, Johan Hovold 写道:
> > On Sat, Dec 05, 2020 at 06:38:27PM +0800, Wang Hai wrote:
> >> In gbaudio_dapm_free_controls(), if one of the widgets is not found, an
> >> error
> >> will be returned directly, which will cau
Hi Sasha,
please don't apply this patch to any older kernel.
The fix was only needed for a patch which went in with the 5.10 pull
request.
Thanks,
Christian.
Am 12.12.20 um 17:08 schrieb Sasha Levin:
From: Christian König
[ Upstream commit aea656b0d05ec5b8ed5beb2f94c4dd42ea834e9d ]
This
On Fri, Dec 11, 2020 at 06:27:05PM -0800, Jiaying Liang wrote:
>
> On 12/9/20 4:47 AM, Daniel Vetter wrote:
> > On Tue, Dec 08, 2020 at 11:54:57AM -0800, Jiaying Liang wrote:
> > > On 12/8/20 9:12 AM, Nicolas Dufresne wrote:
> > > > Le mercredi 18 novembre 2020 à 00:06 -0800, Wendy Liang a écrit :
On Tue, Dec 08, 2020 at 04:21:28PM +0530, Manivannan Sadhasivam wrote:
> On Sun, Nov 22, 2020 at 10:38:19PM +0530, Manivannan Sadhasivam wrote:
> > From: Manivannan Sadhasivam
> >
> > Hello,
> >
> > This series adds support for MaxLinear/Exar USB to serial converters.
> > This driver only suppor
On Fri, Dec 11, 2020 at 01:19:28AM +, Andre Przywara wrote:
> The USB PHY used in the Allwinner H616 SoC inherits some traits from its
> various predecessors: it has four full PHYs like the H3, needs some
> extra bits to be set like the H6, and clears a different bit in the
> PMU_UNK1 register
Commit 140ea3bbf39a ("sd: use __register_blkdev to avoid a modprobe for an
unregistered dev_t") removed blk_register_region(devt, ...) in sd_remove()
and since then, devt is unused in sd_remove().
Hence, make W=1 warns:
drivers/scsi/sd.c:3516:8:
warning: variable 'devt' set but not used [
Add DT bindings documentation for hi3559a SoC clock.
Signed-off-by: Dongjiu Geng
---
.../clock/hisilicon,hi3559av100-clock.yaml| 59 +++
include/dt-bindings/clock/hi3559av100-clock.h | 165 ++
2 files changed, 224 insertions(+)
create mode 100644
Documentation/devicetr
v6->v7:
1. rename hisi,misc-control to hisi,misc-control to hisilicon,misc-control
v5->v6:
1. Drop #size-cells and #address-cell in the hisilicon,hi3559av100-clock.yaml
2. Add discription for #reset-cells in the hisilicon,hi3559av100-clock.yaml
3. Remove #clock-cells in hisilicon,hiedmacv310.yaml
Hisilicon EDMA Controller(EDMAC) directly transfers data
between a memory and a peripheral, between peripherals, or
between memories. This avoids the CPU intervention and reduces
the interrupt handling overhead of the CPU, this driver enables
this controller.
Reported-by: kernel test robot
Signed
Add clock drivers for hi3559A SoC, this driver
controls the SoC registers to supply different
clocks to different IPs in the SoC.
Signed-off-by: Dongjiu Geng
---
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk-hi3559a.c | 865 ++
On Fri, Dec 11, 2020 at 01:19:32AM +, Andre Przywara wrote:
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 512KiB reserved for ARM Trusted Firmware (BL31) */
> + secmon_reserved: secmo
On 2020/12/12 4:57, Rob Herring wrote:
> On Sat, 12 Dec 2020 13:11:14 +, Dongjiu Geng wrote:
>> The Hiedma Controller v310 Provides eight DMA channels, each
>> channel can be configured for one-way transfer. The data can
>> be transferred in 8-bit, 16-bit, 32-bit, or 64-bit mode. This
>> docume
Hi CY
On Sat, Dec 12, 2020 at 12:33:43AM +0800, cy_huang wrote:
> From: ChiYuan Huang
>
> Adds DT binding document for Richtek RT4831 backlight.
>
> Signed-off-by: ChiYuan Huang
This patch got keyword filtered and brought to my attention
but the rest of the series did not.
If it was a backli
On Fri, Dec 11, 2020 at 01:19:34AM +, Andre Przywara wrote:
> The OrangePi Zero 2 is a development board with the new H616 SoC.
>
> It features the usual connectors used on those small boards, and comes
> with the AXP305, which seems to be compatible with the AXP805.
>
> For more details see:
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