My earlier patch to reject non-zero arguments to flow dissector attach
broke attaching via bpftool. Instead of 0 it uses -1 for target_fd.
Fix this by passing a zero argument when attaching the flow dissector.
Fixes: 1b514239e859 ("bpf: flow_dissector: Check value of unused flags to
BPF_PROG_ATTA
The kernel sends three commands in the following sequence:
1.mapd(deviceA, ITT_addr1, valid:1)
2.mapti(deviceA):ITS write ITT_addr1 memory;
3.mapd(deviceA, ITT_addr1, valid:0) and kfree(ITT_addr1);
4.mapd(deviceA, ITT_addr2, valid:1);
5.mapti(deviceA):ITS write ITT_addr2 memory;
In this case
Limit the fsl,pfuze-support-disable-sw to the pfuze100 and pfuze200
variants.
When enabling fsl,pfuze-support-disable-sw and using a pfuze3000 or
pfuze3001, the driver would choose pfuze100_sw_disable_regulator_ops
instead of the newly introduced and correct pfuze3000_sw_regulator_ops.
Fixes: 6f1c
When enabling CONFIG_SND_SOC_MT8192_MT6359_RT1015_RT5682=m the following
error shows up:
ERROR: modpost: "mt8192_afe_gpio_request"
[sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.ko] undefined!
ERROR: modpost: "mt8192_afe_gpio_init"
[sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.ko]
checkpatch doesn't report warnings for many common mistakes
in emails. Some of which are trailing commas and incorrect
use of email comments.
At the same time several false positives are reported due to
incorrect handling of mail comments. The most common of which
is due to the pattern:
# X.X
I
Hello Kent,
On Thu, Nov 5, 2020 at 11:41 AM Kent Gibson wrote:
>
> In gpiochip_setup_dev() the call to gpiolib_cdev_register() indirectly
> calls device_add(). This is still required for the sysfs even when
> CONFIG_GPIO_CDEV is not selected in the build.
>
> Replace the stubbed functions in gpi
This patch adds support for LPASS (Low Power Audio SubSystem)
LPI (Low Power Island) pinctrl on SM8250.
This patch has been tested on support to Qualcomm Robotics RB5 Development
Kit based on QRB5165 Robotics SoC. This board has 2 WSA881X smart speakers
with onboard DMIC connected to internal LPAS
Add initial pinctrl driver to support pin configuration for
LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8250.
Signed-off-by: Srinivas Kandagatla
---
drivers/pinctrl/qcom/Kconfig | 8 +
drivers/pinctrl/qcom/Makefile| 1 +
drivers/pinctrl/qcom/
Create binding file with YAML syntax for ASPEED FMC/SPI memory controller.
Signed-off-by: Chin-Ting Kuo
---
.../bindings/spi/aspeed,spi-aspeed.yaml | 66 +++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
d
This patch series aims to porting ASPEED FMC/SPI memory controller
driver with spi-mem interface. Adjust device tree setting of SPI NOR
flash in order to fit real AST2600 EVB and new SPI memory controller
driver. Also, this patch has been verified on AST2600-A1 EVB.
v2: Fix sparse warnings reporte
Add driver for ASPEED BMC FMC/SPI memory controller which
supports spi-mem interface.
There are three SPI memory controllers embedded in an ASPEED SoC.
Each of them can connect to two or three SPI NOR flashes. The first
SPI memory controller is also named as Firmware Memory Controller (FMC),
which
- Adjust the value format of "reg" property:
Instead of platform_get_resource(),
platform_get_resource_byname() function can be used
for more human-readable.
- Add "num-cs" property for FMC/SPI controller:
Each ASPEED FMC/SPI memory controller can support more
than a chip select. By "num-
Add device tree binding Documentation details for Qualcomm SM8250
LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
Signed-off-by: Srinivas Kandagatla
---
.../pinctrl/qcom,lpass-lpi-pinctrl.yaml | 129 ++
1 file changed, 129 insertions(+)
create mode
- Enable FMC CS1 and SPI2 CS0 SPI NOR flashes since both of
these two flashes are mounted on AST2600 EVB by default.
- Remove spi-max-frequency setting: 50MHz is usual SPI bus
frequency adopted on AST2600 EVB which has already been
configured in aspeed-g6.dtsi.
Signed-off-by: Chin-Ting Kuo
Hi all,
Please ignore this patch, I'll send another patch with other fixes.
-邮件原件-
发件人: Zouwei (Samuel)
发送时间: 2020年11月5日 20:02
收件人: lgirdw...@gmail.com; broo...@kernel.org; pe...@perex.cz; ti...@suse.com;
matthias@gmail.com
抄送: alsa-de...@alsa-project.org; linux-arm-ker...@lists.inf
On 2020-11-05 09:40, Linus Walleij wrote:
On Mon, Oct 19, 2020 at 4:10 PM Daniel Palmer wrote:
[...]
+/* The parent interrupt controller needs the GIC interrupt type set
to GIC_SPI
+ * so we need to provide the fwspec. Essentially
gpiochip_populate_parent_fwspec_twocell
+ * that puts GIC_S
On Thu 05-11-20 09:40:28, Feng Tang wrote:
> On Wed, Nov 04, 2020 at 09:53:43AM +0100, Michal Hocko wrote:
>
> > > > As I've said in reply to your second patch. I think we can make the oom
> > > > killer behavior more sensible in this misconfigured cases but I do not
> > > > think we want break t
Switch SW2404 should be at poistion 1 so that clock output from CS2000
is connected to AUDIO_CLKB_A.
Signed-off-by: Lad Prabhakar
Reviewed-by: Chris Paterson
---
arch/arm64/boot/dts/renesas/hihope-rev4.dtsi | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot
On Thu, Nov 5, 2020 at 12:39 PM Vincenzo Frascino
wrote:
>
> On 11/5/20 11:35 AM, Andrey Konovalov wrote:
> > This will work. Any preference on the name of this function?
> >
>
> I called it in my current iteration mte_enable(), and calling it from
> cpu_enable_mte().
>
> > Alternatively we can re
Fix the following sparse warnings:
./mt8192-dai-i2s.c:2040:5: warning: symbol 'mt8192_dai_i2s_get_share' was not
declared. Should it be static?
./mt8192-dai-i2s.c:2060:5: warning: symbol 'mt8192_dai_i2s_set_priv' was not
declared. Should it be static?
./mt8192-afe-gpio.c:15:16: warning: symbol '
On Wed 04-11-20 12:40:51, Minchan Kim wrote:
> On Wed, Nov 04, 2020 at 07:58:44AM +0100, Michal Hocko wrote:
> > On Tue 03-11-20 13:32:28, Minchan Kim wrote:
> > > On Tue, Nov 03, 2020 at 10:35:50AM +0100, Michal Hocko wrote:
> > > > On Mon 02-11-20 12:29:24, Suren Baghdasaryan wrote:
> > > > [...]
> -Original Message-
> From: Krzysztof Kozlowski
> Sent: 2020年11月5日 16:26
> To: Alice Guo
> Cc: robh...@kernel.org; shawn...@kernel.org; s.ha...@pengutronix.de;
> dl-linux-imx ; Peng Fan ;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org
On 11/3/20 6:15 PM, Pratyush Yadav wrote:
> On 03/11/20 05:05PM, Vignesh Raghavendra wrote:
>>
>>
>> On 11/1/20 3:14 AM, Richard Weinberger wrote:
>>> On Tue, Oct 27, 2020 at 12:24 PM Pratyush Yadav wrote:
> [0]
> https://lore.kernel.org/linux-mtd/20201005153138.6437-1-p.ya...@ti.com/
On Wed, Nov 04, 2020 at 10:30:05PM +0100, Samuel Thibault wrote:
> Matthias Reichl, le mer. 04 nov. 2020 22:15:05 +0100, a ecrit:
> > > This looks like only a warning, did it actually crash?
> >
> > Yes, scroll down a bit, the null pointer oops followed almost
> > immediately after that
> >
> > [
On Tue, Nov 3, 2020 at 6:48 PM Hans Verkuil wrote:
>
> On 03/11/2020 09:51, Alexandre Courbot wrote:
> > Hi Hans,
> >
> > On Sat, Oct 31, 2020 at 12:09 AM Hans Verkuil
> > wrote:
> >>
> >> On 22/10/2020 14:24, Alexandre Courbot wrote:
> >>> do_poll()/do_select() seem to set the _qproc member of
From: Jason Wang
Date: Thu, 5 Nov 2020 11:10:24 +0800
Hi Jason,
> On 2020/11/4 下午11:31, Alexander Lobakin wrote:
>> Since commit 086d08725d34 ("remoteproc: create vdev subdevice with
>> specific dma memory pool"), every remoteproc has a DMA subdevice
>> ("remoteprocX#vdevYbuffer") for each virti
Amelie DELAUNAY 于2020年11月5日周四 下午7:36写道：
>
> On 11/4/20 10:08 PM, Rob Herring wrote:
> > On Fri, Oct 30, 2020 at 04:27:14PM +0100, Amelie DELAUNAY wrote:
> >>
> >>
> >> On 10/30/20 3:29 PM, Rob Herring wrote:
> >>> On Thu, Oct 29, 2020 at 11:49 AM Amelie DELAUNAY
> >>> wrote:
>
>
>
On Thu, 5 Nov 2020 at 13:19, Alice Guo wrote:
>
>
>
> > -Original Message-
> > From: Krzysztof Kozlowski
> > Sent: 2020年11月5日 16:26
> > To: Alice Guo
> > Cc: robh...@kernel.org; shawn...@kernel.org; s.ha...@pengutronix.de;
> > dl-linux-imx ; Peng Fan ;
> > devicet...@vger.kernel.org; lin
In order for the counter validation function to be reused, split
validate_cpu_freq_invariance_counters() into:
- freq_counters_valid(cpu) - check cpu for valid cycle counters
- freq_inv_set_max_ratio(int cpu, u64 max_rate, u64 ref_rate) -
generic function that sets the normalization ratio used
If Activity Monitors (AMUs) are present, two of the counters can be used
to implement support for CPPC's (Collaborative Processor Performance
Control) delivered and reference performance monitoring functionality
using FFH (Functional Fixed Hardware).
Given that counters for a certain CPU can only
In preparation for other uses of Activity Monitors (AMU) cycle counters,
place counter read functionality in generic functions that can reused:
read_corecnt() and read_constcnt().
As a result, implement update_freq_counters_refs() to replace
init_cpu_freq_invariance_counters() and both initialise
Hi guys,
Sorry for the issues introduced and reported by 0day testing, and for
taking a bit longer to sort them out. I hope I've done this in this
version.
The only ones I've not solved are the unused function warnings:
arch/arm64/kernel/topology.c:140:1: warning: unused function 'store_corecnt'
On Wed, 4 Nov 2020 16:20:26 -0500
Tony Krowiak wrote:
> > But I'm sure the code is suggesting it can, because
> > vfio_ap_mdev_filter_guest_matrix() has a third parameter called filter_apid,
> > which governs whether the apm or the aqm bit should be removed. And
> > vfio_ap_mdev_filter_guest_matr
On Thu, 5 Nov 2020 at 12:22, Xuewen Yan wrote:
>
> According to the original code logic:
> cfs_rq->avg.util_avg
> sa->util_avg = * se->load.weight
> cfs_rq->avg.load_avg
this should have been scale_load_down(se->load.weight) from the beginning
On Thu, Nov 5, 2020 at 2:06 PM Srinivas Kandagatla
wrote:
>
> Add initial pinctrl driver to support pin configuration for
> LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
> on SM8250.
> +config PINCTRL_LPASS_LPI
> + tristate "Qualcomm Technologies Inc LPASS LPI pin control
On Mittwoch, 4. November 2020 12:57:08 CET Dominique Martinet wrote:
> Christian Schoenebeck wrote on Wed, Nov 04, 2020:
> > > Greg, Christian - from what I understood (in private, hopefully I'm
> > > allowed to repeat!), he won't be able to contribute to qemu because of
> > > company policies and
On Thu, 5 Nov 2020 11:50:19 +
Colin King wrote:
> From: Colin Ian King
>
> The shifting of the u8 integer data[3] by 24 bits to the left will
> be promoted to a 32 bit signed int and then sign-extended to a
> long. In the event that the top bit of data[3] is set then all
> then all the upp
As per the vendor's request.
Lee Jones (2):
tty: Remove redundant synclink driver
tty: Remove redundant synclinkmp driver
arch/powerpc/configs/ppc6xx_defconfig |2 -
drivers/tty/Kconfig | 27 -
drivers/tty/Makefile |2 -
drivers/tty/synclink.c
Commit 2ae0b31e0face ("tty: don't crash in tty_init_dev when missing
tty_port") didn't fully prevent the crash as the cleanup path in
tty_init_dev() calls release_tty() which dereferences tty->port
without checking it for non-null.
Add tty->port checks to release_tty to avoid the kernel crash.
Fi
I'm announcing the release of the 5.9.5 kernel.
All users of the 5.9 kernel series must upgrade.
The updated 5.9.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-5.9.y
and can be browsed at the normal kernel.org git web browser:
I'm announcing the release of the 5.4.75 kernel.
All users of the 5.4 kernel series must upgrade.
The updated 5.4.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-5.4.y
and can be browsed at the normal kernel.org git web browser:
On 05/11/2020 13:21, Alexandre Courbot wrote:
> On Tue, Nov 3, 2020 at 6:48 PM Hans Verkuil wrote:
>>
>> On 03/11/2020 09:51, Alexandre Courbot wrote:
>>> Hi Hans,
>>>
>>> On Sat, Oct 31, 2020 at 12:09 AM Hans Verkuil
>>> wrote:
On 22/10/2020 14:24, Alexandre Courbot wrote:
> do_po
Clean up the repeated error handling process in function
__watchdog_register_device().
Signed-off-by: Wang Wensheng
---
drivers/watchdog/watchdog_core.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdo
A reboot notifier, which stops the WDT by calling the stop hook without
any check, would be registered when we set WDOG_STOP_ON_REBOOT flag.
Howerer we allow the WDT driver to omit the stop hook since commit
"d0684c8a93549" ("watchdog: Make stop function optional") and provide
a module parameter f
On Thu, 5 Nov 2020 at 12:46, Pavel Machek wrote:
>
> Hi!
>
> > The Power Management Unit (PMU) is a separate device which has little
> > common with clock controller. Moving it to one level up (from clock
> > controller child to SoC) allows to remove fake simple-bus compatible and
> > dtbs_check
On 05/11/2020 12:32, Wilken Gottwalt wrote:
> On Thu, 5 Nov 2020 11:50:19 +
> Colin King wrote:
>
>> From: Colin Ian King
>>
>> The shifting of the u8 integer data[3] by 24 bits to the left will
>> be promoted to a 32 bit signed int and then sign-extended to a
>> long. In the event that the
On Thu, 2020-11-05 at 14:23 +0800, Boqun Feng wrote:
> Hi,
>
> On Wed, Nov 04, 2020 at 04:18:08AM -0800, syzbot wrote:
> > syzbot has bisected this issue to:
> >
> > commit e918188611f073063415f40fae568fa4d86d9044
> > Author: Boqun Feng
> > Date: Fri Aug 7 07:42:20 2020 +
> >
> > lock
On Thu 5.Nov'20 at 10:16:45 +0100, Greg Kroah-Hartman wrote:
On Thu, Nov 05, 2020 at 05:02:00PM +0800, Shuo A Liu wrote:
On Thu 5.Nov'20 at 9:26:39 +0100, Greg Kroah-Hartman wrote:
> On Thu, Nov 05, 2020 at 03:35:45PM +0800, Shuo A Liu wrote:
> > On Thu 5.Nov'20 at 7:29:07 +0100, Greg Kroah
A build of arm64 allmodconfig with next-20201105 fails with the error:
ERROR: modpost: "mt8192_afe_gpio_request" undefined!
ERROR: modpost: "mt8192_afe_gpio_init" undefined!
Export the symbols so that mt8192-mt6359-rt1015-rt5682.ko finds it.
Signed-off-by: Sudip Mukherje
There are different platforms and devices which might use different scale
for the power values. Kernel sub-systems might need to check if all
Energy Model (EM) devices are using the same scale. Address that issue and
store the information inside EM for each device. Thanks to that they can
be easily
On Thu, Nov 05, 2020 at 10:25:24AM +0100, Daniel Vetter wrote:
> > /*
> > * If we can't determine whether or not a pte is special, then fail
> > immediately
> > * for ptes. Note, we can still pin HugeTLB and THP as these are guaranteed
> > not
> > * to be special.
> > *
> > * For a futex to
Hi,Vincent,
At first, I think "sa->util_avg = cfs_rq->avg.util_avg * se_weight(se)" should
apply to all classes, but I am not sure how this modification would affect
other classes.
so I added this cfs condition.
As you said, this is meaningless for this else keeps using se->load.weight.
Thanks
> @@ -300,6 +303,22 @@ int hv_ringbuffer_write(struct vmbus_channel *channel,
>kv_list[i].iov_len);
> }
>
> + /*
> + * Allocate the request ID after the data has been copied into the
> + * ring buffer. Once this request ID i
On Thu, Nov 5, 2020 at 9:36 PM Hans Verkuil wrote:
>
> On 05/11/2020 13:21, Alexandre Courbot wrote:
> > On Tue, Nov 3, 2020 at 6:48 PM Hans Verkuil
> > wrote:
> >>
> >> On 03/11/2020 09:51, Alexandre Courbot wrote:
> >>> Hi Hans,
> >>>
> >>> On Sat, Oct 31, 2020 at 12:09 AM Hans Verkuil
> >>>
On 11/5/20 1:08 PM, Michal Hocko wrote:
On Thu 05-11-20 09:40:28, Feng Tang wrote:
>
> Could you be more specific? This sounds like a bug. Allocations
> shouldn't spill over to a node which is not in the cpuset. There are few
> exceptions like IRQ context but that shouldn't happen regurarly.
I
On Thu, 5 Nov 2020 at 12:13, Viresh Kumar wrote:
>
> On 05-11-20, 11:56, Ulf Hansson wrote:
> > On Thu, 5 Nov 2020 at 11:40, Viresh Kumar wrote:
> > > Btw, how do we identify if it is a power domain or a regulator ?
>
> To be honest, I was a bit afraid and embarrassed to ask this question,
> and
Op 05.11.2020 om 12:13 schreef David Hildenbrand:
It depends in which order memory is exposed to MM, which might depend on other
factors in some configurations.
This smells like it exposes an existing bug. Can you reproduce also with zone
shuffling enabled?
So just to make sure I understand
On 11/5/20 10:56 AM, Morten Rasmussen wrote:
On Thu, Nov 05, 2020 at 10:09:05AM +, Lukasz Luba wrote:
On 11/5/20 9:18 AM, Morten Rasmussen wrote:
On Tue, Nov 03, 2020 at 09:05:57AM +, Lukasz Luba wrote:
@@ -79,7 +82,8 @@ struct em_data_callback {
struct em_perf_domain *em_cpu_g
The CPPC performance capabilities are used significantly throughout
the driver. Simplify the use of them by introducing a local pointer
"caps" to point to cpu_data->perf_caps, in functions that access
performance capabilities often.
Signed-off-by: Ionela Voinescu
Cc: Rafael J. Wysocki
Cc: Viresh
From: Ard Biesheuvel
The ARM architected TRNG firmware interface, described in ARM spec
DEN0098, define an ARM SMCCC based interface to a true random number
generator, provided by firmware.
Add the definitions of the SMCCC functions as defined by the spec.
Signed-off-by: Ard Biesheuvel
Signed-
Considering only the currently supported coordination types (ANY, HW,
NONE), this change only makes a difference for the ANY type, when
policy->cpu is hotplugged out. In that case the new policy->cpu will
be different from ((struct cppc_cpudata *)policy->driver_data)->cpu.
While in this case the c
Use the existing sysfs attribute "freqdomain_cpus" to expose
information to userspace about CPUs in the same frequency domain.
Signed-off-by: Ionela Voinescu
Cc: Rafael J. Wysocki
Cc: Viresh Kumar
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 3 ++-
drivers/cpufreq/cppc_cpufreq.c
From: Ard Biesheuvel
Implement arch_get_random_seed_*() for ARM based on the firmware
or hypervisor provided entropy source described in ARM DEN0098.
This will make the kernel's random number generator consume entropy
provided by this interface, at early boot, and periodically at
runtime when re
Hi guys,
I found myself staring a bit too much at this driver in the past weeks
and that's likely the cause for me coming up with this series of 8
patches that cleans up, clarifies and reworks parts of it, as follows:
- patches 1-3/8: trivial clean-up and renaming with the purpose to
The ARM architected TRNG firmware interface, described in ARM spec
DEN0098[1], defines an ARM SMCCC based interface to a true random number
generator, provided by firmware.
This series collects all the patches implementing this in various
places: as a user feeding into the ARCH_RANDOM pool, both f
The previous coordination type handling in the cppc_cpufreq init code
created some confusion: the comment mentioned "Support only SW_ANY for
now" while only the SW_ALL/ALL case resulted in a failure. The other
coordination types (HW_ALL/HW, NONE) were silently supported.
Clarify support for coordi
Fix a few trivial issues in the cppc_cpufreq driver:
- indentation of function arguments
- consistent use of tabs (vs space) in defines
- spelling: s/Offest/Offset, s/trasition/transition
- order of local variables, from long pointers to structures to
short ret and i (index) variables, to i
The ARM architected TRNG firmware interface, described in ARM spec
DEN0098, defines an ARM SMCCC based interface to a true random number
generator, provided by firmware.
This can be discovered via the SMCCC >=v1.1 interface, and provides
up to 192 bits of entropy per call.
Hook this SMC call into
From: Ard Biesheuvel
Provide a hypervisor implementation of the ARM architected TRNG firmware
interface described in ARM spec DEN0098. All function IDs are implemented,
including both 32-bit and 64-bit versions of the TRNG_RND service, which
is the centerpiece of the API.
The API is backed by ar
The cppc_cpudata per-cpu storage was inefficient (1) additional to causing
functional issues (2) when CPUs are hotplugged out, due to per-cpu data
being improperly initialised.
(1) The amount of information needed for CPPC performance control in its
cpufreq driver depends on the domain (PSD) c
In order to maintain the typical naming convention in the cpufreq
framework:
- replace the use of "cpu" variable name for cppc_cpudata pointers
with "cpu_data"
- replace variable names "cpu_num" and "cpunum" with "cpu"
- make cpu variables unsigned int
Where pertinent, also move the initiali
The ARM DEN0098 document describe an SMCCC based firmware service to
deliver hardware generated random numbers. Its existence is advertised
according to the SMCCC v1.1 specification.
Add a (dummy) call to probe functions implemented in each architecture
(ARM and arm64), to determine the existence
For errors parsing the _PSD domains, a separate domain is returned for
each CPU in the failed _PSD domain with no coordination (as per previous
comment). But contrary to the intention, the code was setting
CPUFREQ_SHARED_TYPE_ALL as coordination type.
Change shared_type to CPUFREQ_SHARED_TYPE_NONE
On Thu 05-11-20 13:53:24, Vlastimil Babka wrote:
> On 11/5/20 1:08 PM, Michal Hocko wrote:
> > On Thu 05-11-20 09:40:28, Feng Tang wrote:
> > > > > Could you be more specific? This sounds like a bug. Allocations
> > > > shouldn't spill over to a node which is not in the cpuset. There are few
> > >
Hi Linus,
The following changes since commit 4ef8451b332662d004df269d4cdeb7d9f31419b5:
Merge tag 'perf-tools-for-v5.10-2020-11-03' of
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux (2020-11-03 13:28:50
-0800)
are available in the Git repository at:
ssh://g...@gitolite.kernel.org
On Fri, 30 Oct 2020 at 02:28, Tian Tao wrote:
>
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/moxart-mmc.c | 5 ++---
> 1 file change
On Sat, 31 Oct 2020 at 15:25, wrote:
>
> From: Tom Rix
>
> A semicolon is not needed after a switch statement.
>
> Signed-off-by: Tom Rix
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/memstick/host/jmb38x_ms.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --
On Sat, 31 Oct 2020 at 16:27, wrote:
>
> From: Tom Rix
>
> A semicolon is not needed after a switch statement.
>
> Signed-off-by: Tom Rix
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/davinci_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Sat, 31 Oct 2020 at 14:48, wrote:
>
> From: Tom Rix
>
> A semicolon is not needed after a switch statement.
>
> Signed-off-by: Tom Rix
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/memstick/core/mspro_block.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On Tue, 3 Nov 2020 at 04:48, Tian Tao wrote:
>
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/meson-mx-sdio.c | 5 ++---
> 1 file chan
On Tue, 3 Nov 2020 at 10:54, wrote:
>
> From: Rui Feng
>
> This patch add test mode for RTS5261.
> If test mode is set, reader will switch to SD Express mode
> mandatorily, and this mode is used by factory testing only.
>
> Signed-off-by: Rui Feng
The series applied for next, thanks!
Kind rega
On Mon, 2 Nov 2020 at 01:51, Tian Tao wrote:
>
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/owl-mmc.c | 5 ++---
> 1 file changed, 2
On Sat, 31 Oct 2020 at 15:28, wrote:
>
> From: Tom Rix
>
> A semicolon is not needed after a switch statement.
>
> Signed-off-by: Tom Rix
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/memstick/host/tifm_ms.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --gi
On Mon, 2 Nov 2020 at 10:29, Wenbin Mei wrote:
>
> Add support for HS400ES mode to MediaTek MMC Card Driver.
>
> Signed-off-by: Wenbin Mei
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/mtk-sd.c | 40 +++
> 1 file changed, 40 insertio
On Tue, 3 Nov 2020 at 17:30, Krzysztof Kozlowski wrote:
>
> The driver can match only via the DT table so the table should be always
> used and the of_match_ptr does not have any sense (this also allows ACPI
> matching via PRP0001, even though it is not relevant here). This fixes
> compile warnin
On Wed, Nov 4, 2020 at 10:40 PM Guenter Roeck wrote:
>
> On Wed, Nov 04, 2020 at 03:09:23PM +0800, Yungteng Hsu wrote:
> > Add the pmbus driver for the STMicroelectronics pm6764 voltage regulator.
> >
> > the output voltage use the MFR_READ_VOUT 0xD4
> > vout value returned is linear11
> >
> > Sig
On Thu, Nov 05, 2020 at 08:48:22PM +0800, Shuo A Liu wrote:
> > > > > Though i can
> > > > > keep some reserved fields for alignment (and to keep same data
> > > > > structure
> > > > > layout with the hypervisor), right?
> > > > > Documentation/driver-api/ioctl.rst says that explicit reserved fie
On Thu, Nov 5, 2020 at 1:57 PM Ionela Voinescu wrote:
>
> For errors parsing the _PSD domains, a separate domain is returned for
> each CPU in the failed _PSD domain with no coordination (as per previous
> comment). But contrary to the intention, the code was setting
> CPUFREQ_SHARED_TYPE_ALL as c
On Thu, Nov 05, 2020 at 01:58:28PM +0100, Michal Hocko wrote:
> On Thu 05-11-20 13:53:24, Vlastimil Babka wrote:
> > On 11/5/20 1:08 PM, Michal Hocko wrote:
> > > On Thu 05-11-20 09:40:28, Feng Tang wrote:
> > > > > > Could you be more specific? This sounds like a bug. Allocations
> > > > > shouldn
On 11/5/20 12:24 PM, Colin King wrote:
> From: Colin Ian King
>
> The left shift of int 32 bit integer constant 1 is evaluated using
> 32 bit arithmetic and then assigned to a signed 64 bit variable. In
> the case where time_ref->adapter->ts_used_bits is 32 or more this
> can lead to an oveflow.
Please don't top-post.
On 2020-11-05 11:54, xuqiang (M) wrote:
The kernel sends three commands in the following sequence:
1.mapd(deviceA, ITT_addr1, valid:1)
2.mapti(deviceA):ITS write ITT_addr1 memory;
3.mapd(deviceA, ITT_addr1, valid:0) and kfree(ITT_addr1);
4.mapd(deviceA, ITT_addr2, vali
On 05/11/2020 13:52, Alexandre Courbot wrote:
> On Thu, Nov 5, 2020 at 9:36 PM Hans Verkuil wrote:
>>
>> On 05/11/2020 13:21, Alexandre Courbot wrote:
>>> On Tue, Nov 3, 2020 at 6:48 PM Hans Verkuil
>>> wrote:
On 03/11/2020 09:51, Alexandre Courbot wrote:
> Hi Hans,
>
> On
On Thu 05-11-20 21:07:10, Feng Tang wrote:
[...]
> My debug traces shows it is, and its gfp_mask is 'GFP_KERNEL'
Can you provide the full information please? Which node has been
requested. Which cpuset the calling process run in and which node has
the allocation succeeded from? A bare dump_stack w
On 11/5/20 1:58 PM, Michal Hocko wrote:
On Thu 05-11-20 13:53:24, Vlastimil Babka wrote:
On 11/5/20 1:08 PM, Michal Hocko wrote:
> On Thu 05-11-20 09:40:28, Feng Tang wrote:
> > > > Could you be more specific? This sounds like a bug. Allocations
> > > shouldn't spill over to a node which is not
On 11/3/20 2:42 PM, YiFei Zhu wrote:
> From: YiFei Zhu
>
> To enable seccomp constant action bitmaps, we need to have a static
> mapping to the audit architecture and system call table size. Add these
> for parisc.
> > Signed-off-by: YiFei Zhu
I did compile- and boot-tested it, works on 32- and
On 05/11/20 05:51PM, Vignesh Raghavendra wrote:
>
>
> On 11/3/20 6:15 PM, Pratyush Yadav wrote:
> > On 03/11/20 05:05PM, Vignesh Raghavendra wrote:
> >>
> >>
> >> On 11/1/20 3:14 AM, Richard Weinberger wrote:
> >>> On Tue, Oct 27, 2020 at 12:24 PM Pratyush Yadav wrote:
> > [0]
> > https
On Thu 05-11-20 14:14:25, Vlastimil Babka wrote:
> On 11/5/20 1:58 PM, Michal Hocko wrote:
> > On Thu 05-11-20 13:53:24, Vlastimil Babka wrote:
> > > On 11/5/20 1:08 PM, Michal Hocko wrote:
> > > > On Thu 05-11-20 09:40:28, Feng Tang wrote:
> > > > > > > Could you be more specific? This sounds like
Greg Kroah-Hartman schreef op di 03-11-2020 om 21:32 [+0100]:
> From: Rander Wang
>
> [ Upstream commit 6c63c954e1c52f1262f986f36d95f557c6f8fa94 ]
>
> When hda_codec_probe() doesn't initialize audio component, we disable
> the codec and keep going. However,the resources are not released. The
> c
On Mon, Oct 26, 2020 at 10:51:00PM +0800, Muchun Song wrote:
> +#ifdef CONFIG_HUGETLB_PAGE_FREE_VMEMMAP
> +#define VMEMMAP_HPAGE_SHIFT PMD_SHIFT
> +#define arch_vmemmap_support_huge_mapping() boot_cpu_has(X86_FEATURE_PSE)
I do not think you need this.
We already have hugepages_su
Hi Andre
Thanks for your report,
could you also please post the log when with this commit reverted?
Thanks,
Jiada
On 2020/11/04 17:13, Andre wrote:
Hi,
commit 74d905d2: Input: atmel_mxt_ts - only read messages in
mxt_acquire_irq() when necessary
breaks the touchpad and touchscreen of the 201
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