On Tue, Sep 8, 2020 at 6:29 AM Masahiro Yamada wrote:
> There was a request to preprocess the module linker script like we
> do for the vmlinux one. (https://lkml.org/lkml/2020/8/21/512)
>
> The difference between vmlinux.lds and module.lds is that the latter
> is needed for external module builds
Hi Evan,
> changes in v2:
> - changed lowercase "pca to uppercase "PCA".
> - reworded and reformatted the multiline comment.
> - moved the clock frequency KERN_INFO closer to the call that sets this.
> - moved the i2c_bus_settings struct to the more generic i2c.h and removed
> - the comments indic
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 2 +-
drivers/gpu/drm/virtio/virtgpu_display.c | 11 +++
drivers/gpu/drm/virtio/virtgpu_kms.c | 6 +-
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h
In case queuing virtio commands fails (can happen when
the device got unplugged) pass up the error.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_vq.c | 36 +++--
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virt
Usually we wait for the host to complete the unref request, then cleanup
the guest-side state of the object in the completion callback. When
submitting the unref command failed the completion callback will not be
called though, so cleanup right away.
Fixes a WARN on stale mm entries on driver shu
Add support to use dw-apb-ictl as primary interrupt controller.
Signed-off-by: Zhen Lei
---
.../interrupt-controller/snps,dw-apb-ictl.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ic
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 75 +--
2 files changed, 73 insertions(+), 4 del
v1 --> v2:
According to Marc Zyngier's suggestion, discard adding an independent SD5203-VIC
driver, but make the dw-apb-ictl irqchip driver to support hierarchy irq domain.
It was originally available only for secondary interrupt controller, now it can
also be used as primary interrupt controller.
Rename some functions and variables in advance, to make the next patch
looks more clear. The details are as follows:
1. rename dw_apb_ictl_handler() to dw_apb_ictl_handle_irq_cascaded().
In function dw_apb_ictl_init():
1. rename local variable irq to parent_irq.
2. add "const struct irq_domain_ops
From: Wanpeng Li
All the checks in lapic_timer_int_injected(), __kvm_wait_lapic_expire(), and
these function calls waste cpu cycles when the timer mode is not tscdeadline.
We can observe ~1.3% world switch time overhead by kvm-unit-tests/vmexit.flat
vmcall testing on AMD server. This patch red
This patch adds description for VFIO Mdev support for dfl devices on
dfl bus.
Signed-off-by: Xu Yilun
Signed-off-by: Matthew Gerlach
---
Documentation/fpga/dfl.rst | 20
1 file changed, 20 insertions(+)
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
i
Change PINCTRL_IMX to tristate to support loadable module build.
And i.MX common pinctrl driver should depend on CONFIG_OF to make sure
no build error when i.MX common pinctrl driver is enabled for different
architectures without CONFIG_OF.
Also add module author, description and license.
Signed
Use function callbacks for SCU related functions in pinctrl-imx.c
in order to support the scenario of PINCTRL_IMX is built in while
PINCTRL_IMX_SCU is built as module, all drivers using SCU pinctrl
driver need to initialize the SCU related function callback, and
no need to check CONFIG_PINCTRL_IMX_
This patch is to provide VFIO support to DFL devices. When bound this
driver to a dfl device, it registers a set of callbacks to the mediated
device framework to enable mediated device creation. When a mediated
device is created by user via mdev interfaces, it will be exposed to
user as a VFIO plat
Change PINCTR_IMX_SCU to tristate, add module author, description
and license to support building SCU pinctrl core driver as module.
Signed-off-by: Anson Huang
---
Changes since V2:
- move the removal of #ifdef CONFIG_PINCTRL_IMX_SCU and #else block to
patch #1.
---
drivers/pin
On 07/09/2020 14:57, Paul Cercueil wrote:
>
>
> Le dim. 30 août 2020 à 22:28, Sam Ravnborg a écrit :
>> Hi Laurent.
>>
>>> >
>>> > Please read the cover letter, it explains why it's done this way. The
>>> > whole point of this patchset is to merge DSI and DBI frameworks in a
>>> > way that c
The macro CONT_PTE_SHIFT actually depends on CONT_SHIFT, which has
been defined in page-def.h, based on CONFIG_ARM64_CONT_SHIFT. Lets
reflect the dependency.
Signed-off-by: Gavin Shan
---
arch/arm64/include/asm/pgtable-hwdef.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
The macro was introduced by commit ("arm64: PTE/PMD
contiguous bit definition") at the beginning. It's only used by
commit <348a65cdcbbf> ("arm64: Mark kernel page ranges contiguous"),
which was reverted later by commit <667c27597ca8>. This makes the
macro unused.
This removes the unused macro (C
Add support for overriding the default matching of a dfl device to a dfl
driver. It follows the same way that can be used for PCI and platform
devices. This patch adds the 'driver_override' sysfs file. It can be
used by VFIO to bind dfl devices for user accessing.
Signed-off-by: Xu Yilun
---
Doc
These patches depend on the patchset: "Modularization of DFL private
feature drivers" & "add dfl bus support to MODULE_DEVICE_TABLE()"
https://lore.kernel.org/linux-fpga/1599488581-16386-1-git-send-email-yilun...@intel.com/
This patchset provides an VFIO Mdev driver for dfl devices. It makes
poss
From: Yu Chen
SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core
of Hisilicon Kirin Soc when dwc3 core act as host.
[mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver]
Signed-off-by: Yu Chen
Signed-off-by: Mauro Carvalho Chehab
---
drivers/usb/dwc3/co
This small patch series add a new quirk for the dwc3 driver. The first patch
was submitted previously to the USB mailing list:
https://patchwork.kernel.org/patch/10909965/
This quirk is also present at the official Linaro's tree for Hikey 970.
Without that, the URBs produced by the USB H
At Hikey 970, setting the SPLIT disable at the General
User Register 3 is required.
Without that, the URBs generated by the usbhid driver
return -EPROTO errors. That causes the code at
hid-core.c to call hid_io_error(), which schedules
a reset_work, causing a call to hid_reset().
In turn, the cod
On Tue, Sep 8, 2020 at 4:32 AM tanhuazhong wrote:
>
>
>
> On 2020/9/7 23:35, Willem de Bruijn wrote:
> > On Mon, Sep 7, 2020 at 3:38 PM tanhuazhong wrote:
> >>
> >>
> >>
> >> On 2020/9/7 17:22, Willem de Bruijn wrote:
> >>> On Sun, Sep 6, 2020 at 8:42 PM Jakub Kicinski wrote:
>
> On Sa
On Tue, 1 Sep 2020 at 23:27, Krzysztof Kozlowski wrote:
>
> Common pattern of handling deferred probe can be simplified with
> dev_err_probe(). Less code and the error value gets printed.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Chunyan Zhang
Thanks,
Chunyan
> ---
> drivers/spi/spi-
On Tue, 1 Sep 2020 at 23:27, Krzysztof Kozlowski wrote:
>
> If dma_request_chan() for TX channel fails with EPROBE_DEFER, the RX
> channel would not be released and on next re-probe it would be requested
> second time.
>
> Fixes: 386119bc7be9 ("spi: sprd: spi: sprd: Add DMA mode support")
> Cc:
>
Now that the switch ports have a label in the .dtsi, simplify the whole
"switch0" block for the v7 dts files.
Signed-off-by: Andre Heider
---
This goes on top of Pali's patch:
"arm64: dts: marvell: espressobin: Add ethernet switch aliases"
The resulting .dtb files are the same.
.../armada-372
Hello,
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das
On Tue, Sep 8, 2020 at 9:20 AM Anson Huang wrote:
> # SPDX-License-Identifier: GPL-2.0-only
> config PINCTRL_IMX
> - bool
> + tristate "IMX pinctrl core driver"
> + depends on OF
> select GENERIC_PINCTRL_GROUPS
> select GENERIC_PINMUX_FUNCTIONS
> select
When there is no output port, coresight_alloc_conns() still do the following
copy connection information to pdata->conns, and this may cause kernel panic.
Let's fix it.
Signed-off-by: Qi Liu
---
drivers/hwtracing/coresight/coresight-platform.c | 13 +++--
1 file changed, 7 insertions(+),
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das
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das
Hello,
syzbot found the following issue on:
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das
Hello,
syzbot found the following issue on:
HEAD commit:b765a32a Merge tag 'scsi-fixes' of git://git.kernel.org/pu..
git tree: upstream
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das
Hello,
syzbot found the following issue on:
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das
Hello,
syzbot found the following issue on:
HEAD commit:15bc20c6 Merge tag 'tty-5.9-rc3' of git://git.kernel.org/p..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=15d432fe90
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das
On Tuesday 08 September 2020 09:30:50 Andre Heider wrote:
> Now that the switch ports have a label in the .dtsi, simplify the whole
> "switch0" block for the v7 dts files.
>
> Signed-off-by: Andre Heider
Thank you, looks good!
Reviewed-by: Pali Rohár
> ---
>
> This goes on top of Pali's patc
Hello,
syzbot found the following issue on:
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das
> Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> driver as module
>
> On Tue, Sep 8, 2020 at 9:20 AM Anson Huang
> wrote:
>
> > # SPDX-License-Identifier: GPL-2.0-only config PINCTRL_IMX
> > - bool
> > + tristate "IMX pinctrl core driver"
> > +
This patch depends on the MT6799 DTS patch submitted by Hanks Chen
https://lkml.org/lkml/2020/8/4/1094
Hector.Yuan (2):
cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver
dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml
From: "Hector.Yuan"
Add MT6779 cpufreq HW support.
Signed-off-by: Hector.Yuan
---
drivers/cpufreq/Kconfig.arm | 12 ++
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/mediatek-cpufreq-hw.c | 294 +
3 files changed, 307 insertions(+)
From: "Hector.Yuan"
Add devicetree bindings for MediaTek HW driver.
Signed-off-by: Hector.Yuan
---
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 141
1 file changed, 141 insertions(+)
create mode 100644
Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-h
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master
head: 9322c47b21b9e05d7f9c037aa2c472e9f0dc7f3b
commit: f110f3188e5639c81c457b2b831d40dfe3891bdb iio: temperature: Add support
for LTC2983
date: 11 months ago
config: powerpc64-randconfig-r021-20200904 (attached
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On Fri, Sep 04, 2020 at 06:29:51PM +0800, Jinyang He wrote:
> Commit 1bdb7b76705a ("MIPS: Loongson64: Cleanup unused code")
> left the loongson_reboot unused, delete it.
>
> Signed-off-by: Jinyang He
> ---
> arch/mips/loongson64/reset.c | 5 -
> 1 file changed, 5 deletions(-)
applied to mip
On Fri, Sep 04, 2020 at 02:36:47PM +0200, Paul Cercueil wrote:
> Cleanup a bit the Device Tree file:
>
> 1. Respect the number of cells in GPIO descriptors and keyboard matrix;
> 2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller'
>property;
> 3. The NAND's rb-gpios is actually
Hi,
On 07/09/2020 21:52, Sam Ravnborg wrote:
> Hi Neil.
>
> On Mon, Sep 07, 2020 at 01:10:27PM +0200, Neil Armstrong wrote:
>> This adds support for the TDO TL070WSH30 TFT-LCD panel module.
>> The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
>> It provides a MIPI DSI interface t
On 2020-09-08 08:11, Zhen Lei wrote:
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 75 +--
2
On Tue, Sep 08, 2020 at 10:43:12AM +0530, Anshuman Khandual wrote:
>
>
> On 09/07/2020 05:46 PM, Will Deacon wrote:
> > On Mon, Aug 17, 2020 at 05:34:23PM +0530, Anshuman Khandual wrote:
> >> HWCAP name arrays (hwcap_str, compat_hwcap_str, compat_hwcap2_str) that are
> >> scanned for /proc/cpuinf
On Mon, 07 Sep 2020, Michael Walle wrote:
> The Kontron sl28cpld is a board management chip providing gpio, pwm, fan
> monitoring and an interrupt controller. For now this controller is used on
> the Kontron SMARC-sAL28 board. But because of its flexible nature, it
> might also be used on other bo
On Tue, Sep 8, 2020 at 9:19 AM Gene Chen wrote:
> Jonathan Cameron 於 2020年8月30日 週日 上午1:12寫道:
> > On Mon, 24 Aug 2020 17:06:24 +0800
> > Gene Chen wrote:
> > A few comments inline. The big one centres on why we can't
> > expose the channels as _raw, _offset and _scale?
> >
>
> I think i have 3
On Sat 2020-09-05 12:18:27, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> 4c31ead75f41 ("printk: ringbuffer: support dataless records")
>
> is missing a Signed-off-by from its committer.
Thanks for catching this. It should be fixed now.
It has been originally committed by Sergey. I rebase
Mauro Carvalho Chehab writes:
> Em Mon, 7 Sep 2020 17:59:34 +0200
> Mauro Carvalho Chehab escreveu:
>
>> diff --git a/drivers/usb/dwc3/dwc3-of-simple.c
>> b/drivers/usb/dwc3/dwc3-of-simple.c
>> index 8852fbfdead4..2d497165efe2 100644
>> --- a/drivers/usb/dwc3/dwc3-of-simple.c
>> +++ b/drivers/
On Tue, Sep 8, 2020 at 9:34 AM Anson Huang wrote:
> > Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> > driver as module
> >
> > On Tue, Sep 8, 2020 at 9:20 AM Anson Huang
> > wrote:
> >
> > > # SPDX-License-Identifier: GPL-2.0-only config PINCTRL_IMX
> > > -
On Monday 07 September 2020 19:23:45 Andrew Lunn wrote:
> On Mon, Sep 07, 2020 at 06:13:16PM +0200, Pali Rohár wrote:
> > On Monday 07 September 2020 17:43:53 Andrew Lunn wrote:
> > > > I would not say it is a "new feature". But rather that patch in this
> > > > email fixes issue that Linux kernel
On Tue, Sep 08, 2020 at 07:14:38AM +0200, Christophe Leroy wrote:
> You forgot arch/powerpc/mm/book3s64/subpage_prot.c it seems.
Yes, and also two more sources :/
arch/powerpc/mm/kasan/8xx.c
arch/powerpc/mm/kasan/kasan_init_32.c
But these two are not quite obvious wrt pgd_addr_end
Hi Arun,
On Mon, Sep 07, 2020 at 11:46:27PM -0700, Arun Easi wrote:
> How about printing the "func", which gives an indication of the caller
> function, in the ql_log-s, rather than removing it? At least in the cases
> like you describe, it'd give an indication which handler the path was
> ta
From: Ethan Zhao
'commit e8c7d14ac6c3 ("block: revert back to synchronous request_queue
removal")' introduced panic issue to NVMe hotplug as following(hit
after just 2 times NVMe SSD hotplug under stable 5.9-RC2):
BUG: sleeping function called from invalid context at block/genhd.c:1563
in_atomic
Hi, Arnd
> Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> driver as module
>
> On Tue, Sep 8, 2020 at 9:34 AM Anson Huang
> wrote:
> > > Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX
> > > pinctrl core driver as module
> > >
> > > On Tue, Sep 8,
> > @@ -300,6 +303,22 @@ int hv_ringbuffer_write(struct vmbus_channel *channel,
> > kv_list[i].iov_len);
> > }
> >
> > + /*
> > +* Allocate the request ID after the data has been copied into the
> > +* ring buffer. Once this request I
This adds support bindings and support for the TDO TL070WSH30 TFT-LCD panel
module shipped with the Amlogic S400 Development Kit.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Changes
This add the bindings for the 1024x600 TFT LCD TL070WSH30 DSI panel to
panel-simple-dsi.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/panel
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/Kconfig
Simple DSI panels can also have a reset GPIO signal in addition/instead of an
enable GPIO signal.
This adds an optional reset-gpios property.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/D
Shanghai Top Display Optolelectronics Co., Ltd is a display manufacturer
from Shanghai.
Web site of the company: http://www.shtdo.com/
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/dev
On 2020-09-07 20:18, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 07:17:12PM +0300, Laurent Pinchart wrote:
>> Hi Stefan,
>>
>> Thank you for the patch.
>>
>> On Mon, Sep 07, 2020 at 06:03:43PM +0200, Stefan Agner wrote:
>> > The lcdif IP does not support a framebuffer pitch (stride) other than
>
Currently we call shake_page and then check whether the page is
Buddy because shake_page calls drain_all_pages, which sends pcp-pages
back to the buddy freelists, so we could have a chance to handle
free pages.
get_hwpoison_page already calls drain_all_pages, and we do call
get_hwpoison_page right
The important bit of this patchset is patch#1, which is a fix to take off
HWPoison pages off a buddy freelist since it can lead us to having HWPoison
pages back in the game without no one noticing it.
So fix it (we did that already for soft_offline_page [1]).
The other patches are clean-ups and no
Make a proper if-else condition for {hard,soft}-offline.
Signed-off-by: Oscar Salvador
---
mm/madvise.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/mm/madvise.c b/mm/madvise.c
index e32e7efbba0f..e92e06890b08 100644
--- a/mm/madvise.c
+++
The crux of the matter is that historically we left poisoned pages
in the buddy system because we have some checks in place when
allocating a page that a gatekeeper for poisoned pages.
Unfortunately, we do have other users (e.g: compaction [1]) that scan
buddy freelists and try to get a page from t
A page with 0-refcount and !PageBuddy could perfectly be a pcppage.
Currently, we bail out with an error if we encounter such a page,
meaning that we do not handle pcppages neither from hard-offline
nor from soft-offline path.
Fix this by draining pcplists whenever we find this kind of page
and re
Hello,
This series adds CPUFreq support for Qualcomm SM8250 SoC. The existing
qcom-hw driver is reworked to support the EPSS block on this SoC which
handles the CPUFreq duties.
The EPSS block supports additional features for which incremental patches
will be submitted on top of this series!
Than
memory_failure and soft_offline_path paths now drain pcplists by calling
get_hwpoison_page.
memory_failure flags the page as HWPoison before, so that page cannot longer
go into a pcplist, and soft_offline_page only flags a page as HWPoison
if 1) we took the page off a buddy freelist 2) the page was
SM8250 SoC uses EPSS block for carrying out the cpufreq duties. Hence, add
support for it in the driver with relevant of_match data.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/cpufreq/qcom-cpufre
devm_platform_ioremap_resource() is the combination of
platform_get_resource() and devm_ioremap_resource(). Hence, use it to
simplify the code a bit.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff
Hi Arun,
On Mon, Sep 07, 2020 at 11:47:48PM -0700, Arun Easi wrote:
> Could you drop the above comment about firmware, as it is speculation at
> this point?
Sure, no problem.
> It'd be best to take a chip reset path, rather than assuming the
> packet is good and having the appropriate handler ca
On Tue, Sep 08, 2020 at 12:39:51AM +0200, Halil Pasic wrote:
> On Mon, 7 Sep 2020 11:39:05 +0200
> Pierre Morel wrote:
>
> > Hi all,
> >
> > The goal of the series is to give a chance to the architecture
> > to validate VIRTIO device features.
>
> Michael, is this going in via your tree?
I gu
Hi,
This height patch series rework the previous O_MAYEXEC series by not
adding a new flag to openat2(2) but to faccessat2(2) instead. As
suggested, this enables to perform the access check on a file descriptor
instead of on a file path (while opening it). This may require two
checks (one on ope
From: Mickaël Salaün
This enables to configure a policy for executable scripts which can be
queried with faccessat2(2) and the AT_INTERPRETED flag. This may allow
script interpreters to check execution permission before reading
commands from a file, or dynamic linkers to allow shared object load
From: Mickaël Salaün
The AT_INTERPRETED flag combined with the X_OK mode enable trusted user
space tasks to check that files are allowed to be executed by user
space. The security policy is consistently managed by the kernel
through a sysctl or implemented by an LSM thanks to the inode_permissio
Use regmap for accessing cpufreq registers in hardware.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 55 ++-
1 file changed, 47 insertions(+), 8 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufre
The file opening action on the system may be from user-mode sys_open()
or kernel-mode filp_open().
Currently, fsnotify_open() is invoked in do_sys_openat2().
But filp_open() is not notified. Why? Is this an omission?
Do we need to call fsnotify_open() in filp_open() or do_filp_open() to
ensure
From: Bjorn Andersson
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8250 SoCs.
Signed-off-by: Bjorn Andersson
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch
Document the SM8250 SoC specific compatible for Qualcomm Cpufreq HW. The
hardware block which carries out CPUFreq operations on SM8250 SoC is
called EPSS.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt | 2 +-
1 file changed, 1 insertion(+)
For preparing the driver to handle further SoC revisions, let's use the
of_match data for getting the device specific offsets and row size instead
of defining them globally.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 96 +--
1 file ch
On Fri, 04 Sep 2020, Russ Weight wrote:
> Extend the MAX10 BMC Security Engine driver to include
> the functions that enable secure updates of BMC images,
> FPGA images, etc.
>
> Signed-off-by: Russ Weight
> Reviewed-by: Wu Hao
> ---
> drivers/fpga/intel-m10-bmc-secure.c | 272
Get rid of global_pdev pointer and make use of cpufreq driver_data for
passing the reference of pdev. This aligns with what other cpufreq drivers
are doing.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-
Hi,
On 07/09/2020 20:03, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
>> On 07/09/2020 10:44, Daniel Vetter wrote:
>>> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
>
From: Mickaël Salaün
Test that checks performed by faccessat2(2) with AT_INTERPRETED on file
path and file descriptors are consistent with noexec mount points and
file execute permissions, according to the policy configured with the
fs.interpreted_access sysctl.
Signed-off-by: Mickaël Salaün
Re
Hi Sam,
On 01/09/2020 08:22, Sam McNally wrote:
> With DP v2.0 errata E5, CEC tunneling can be supported through an MST
> topology.
Oh wow, this is finally supported in the spec. Very nice to see this.
Also very nice to see that my old experimental patches attempting to
support CEC on MST didn't
On 09/08/2020 01:11 PM, Will Deacon wrote:
> On Tue, Sep 08, 2020 at 10:43:12AM +0530, Anshuman Khandual wrote:
>>
>>
>> On 09/07/2020 05:46 PM, Will Deacon wrote:
>>> On Mon, Aug 17, 2020 at 05:34:23PM +0530, Anshuman Khandual wrote:
HWCAP name arrays (hwcap_str, compat_hwcap_str, compat_h
Hello,
just a bit of nitpicking left. If Lee is going to apply, I can care for
a followup patch if need be.
On Mon, Sep 07, 2020 at 11:37:55PM +0200, Michael Walle wrote:
> [..]
> +config PWM_SL28CPLD
> + tristate "Kontron sl28cpld PWM support"
> + depends on MFD_SL28CPLD || COMPILE_TEST
After commit 0a31bc97c80c3f mm: memcontrol: rewrite uncharge API, no one
using MEM_CGROUP_CHARGE_TYPE_xxx, let's remove them.
Signed-off-by: Alex Shi
Cc: Johannes Weiner
Cc: Michal Hocko
Cc: Vladimir Davydov
Cc: Andrew Morton
Cc: cgro...@vger.kernel.org
Cc: linux...@kvack.org
Cc: linux-
Alex Shi writes:
After commit 0a31bc97c80c3f mm: memcontrol: rewrite uncharge API, no one
using MEM_CGROUP_CHARGE_TYPE_xxx, let's remove them.
Signed-off-by: Alex Shi
Cc: Johannes Weiner
Cc: Michal Hocko
Cc: Vladimir Davydov
Cc: Andrew Morton
Cc: cgro...@vger.kernel.org
Cc: linux...@kvack.o
On Sat, 05 Sep 2020, Andy Shevchenko wrote:
> On Saturday, September 5, 2020, Jonathan Neuschäfer
> wrote:
>
> > The Netronix EC provides a PWM output which is used for the backlight
> > on some ebook readers. This patches adds a driver for the PWM output.
> >
> > Signed-off-by: Jonathan Neuschä
Refactor qla2x00_get_sp_from_handle() to avoid the unecessary
goto if early returns are used. With this we can also avoid
preinitilzing the sp pointer.
Reviewed-by: Martin Wilck
Signed-off-by: Daniel Wagner
---
drivers/scsi/qla2xxx/qla_isr.c | 8 +++-
1 file changed, 3 insertions(+), 5 dele
Commit 7c3df1320e5e ("[SCSI] qla2xxx: Code changes to support new
dynamic logging infrastructure.") removed the use of the func
argument. Let's add it back.
Signed-off-by: Daniel Wagner
---
drivers/scsi/qla2xxx/qla_isr.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --gi
Emit a warning when ->done or ->free are called on an already freed
srb. There is a hidden use-after-free bug in the driver which corrupts
the srb memory pool which originates from the cleanup callbacks.
An extensive search didn't bring any lights on the real problem. The
initial fix was to set bo
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