A pasid might be bound to a page table from a VM guest via the iommu
ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
on the physical IOMMU, we need to inject the page fault request into
the guest. After the guest completes handling the page fault, a page
response need to be sen
After a page request is handled, software must response the device which
raised the page request with the handling result. This is done through
the iommu ops.page_response if the request was reported to outside of
vendor iommu driver through iommu_report_device_fault(). This adds the
VT-d implement
Hi all,
Today's linux-next merge of the jc_docs tree got a conflict in:
Documentation/arm64/index.rst
between commit:
5c5a8ac9b27b ("arm64: mte: Add Memory Tagging Extension documentation")
from the arm64 tree and commit:
86de78d2c5f4 ("docs: arm64: convert perf.txt to ReST format")
fr
Adds the property POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN to export the
chip->low_soc_alert and add the property as writeable, implementing
max17040_prop_writeable and max17040_set_property, so with that the
user space can readjust the alerts.
Signed-off-by: Matheus Castello
---
drivers/power/suppl
When this driver transmits data,
first this driver will remove a pseudo header of 1 byte,
then the lapb module will prepend the LAPB header of 2 or 3 bytes,
then this driver will prepend a length field of 2 bytes,
then the underlying Ethernet device will prepend its own header.
So, the hea
On Fri, Jul 3, 2020 at 5:31 PM Jin, Yao wrote:
>
> Hi Jiri,
>
> On 7/3/2020 7:00 PM, Jiri Olsa wrote:
> > On Fri, Jul 03, 2020 at 08:42:15AM +0800, Jin Yao wrote:
> >> Since commit 0a892c1c9472 ("perf record: Add dummy event during system
> >> wide synthesis"),
> >> a dummy event is added to capt
This adds debug print information that enlists all tests getting executed
on a given platform. With dynamic debug enabled, the following information
will be splashed during boot. For compactness purpose, dropped both time
stamp and prefix (i.e debug_vm_pgtable) from this sample output.
[debug_vm_p
This adds new tests validating for these following arch advanced page table
helpers. These tests create and test specific mapping types at various page
table levels.
1. pxxp_set_wrprotect()
2. pxxp_get_and_clear()
3. pxxp_set_access_flags()
4. pxxp_get_and_clear_full()
5. pxxp_test_and_clear_young
This adds new tests validating arch page table helpers for these following
core memory features. These tests create and test specific mapping types at
various page table levels.
1. SPECIAL mapping
2. PROTNONE mapping
3. DEVMAP mapping
4. SOFTDIRTY mapping
5. SWAP mapping
6. MIGRATION mapping
7. HU
This adds a specific description file for all arch page table helpers which
is in sync with the semantics being tested via CONFIG_DEBUG_VM_PGTABLE. All
future changes either to these descriptions here or the debug test should
always remain in sync.
Cc: Jonathan Corbet
Cc: Andrew Morton
Cc: Mike
This series adds some more arch page table helper validation tests which
are related to core and advanced memory functions. This also creates a
documentation, enlisting expected semantics for all page table helpers as
suggested by Mike Rapoport previously (https://lkml.org/lkml/2020/1/30/40).
Ther
The SFF soldered onto the board expects the port to use 1000BaseX. It
makes no sense to have the port set to SGMII, since it doesn't even
support that mode.
Signed-off-by: Chris Healy
---
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Mon, Jul 6, 2020 at 4:31 AM Kees Cook wrote:
>
> On Sun, Jul 05, 2020 at 10:16:14PM +0800, Guo Ren wrote:
> > On Sun, Jul 5, 2020 at 2:53 PM Kees Cook wrote:
> > > On Sun, Jul 05, 2020 at 06:24:15AM +, guo...@kernel.org wrote:
> > > > +static __always_inline void boot_init_stack_canary(voi
Hi Ian,
On 7/6/2020 8:47 AM, Ian Rogers wrote:
On Fri, Jul 3, 2020 at 5:31 PM Jin, Yao wrote:
Hi Jiri,
On 7/3/2020 7:00 PM, Jiri Olsa wrote:
On Fri, Jul 03, 2020 at 08:42:15AM +0800, Jin Yao wrote:
Since commit 0a892c1c9472 ("perf record: Add dummy event during system wide
synthesis"),
a
On Mon, Jul 6, 2020 at 4:40 AM Kees Cook wrote:
>
> On Sun, Jul 05, 2020 at 02:13:17PM +, guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > After compare arm64 and x86 implementations, seems arm64's is more
> > flexible and readable. The key point is how gcc get the offset of
> > stack_canar
On Sun, 2020-07-05 at 23:44 +0200, Alexander A. Klimov wrote:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
>
> Deterministic algorithm:
> For each file:
> If not .svg:
> For each line:
> If doesn't cont
The SFF soldered onto the board expect the ports to use 1000BaseX. It
makes no sense to have the ports set to SGMII, since they don't even
support that mode.
Signed-off-by: Andrew Lunn
Signed-off-by: Chris Healy
---
arch/arm/boot/dts/vf610-zii-scu4-aib.dts | 20 ++--
1 file cha
> From: Lu Baolu
> Sent: Monday, July 6, 2020 8:26 AM
>
> It is refactored in two ways:
>
> - Make it global so that it could be used in other files.
>
> - Make bus/devfn optional so that callers could ignore these two returned
> values when they only want to get the coresponding iommu pointer.
Dies soll Ihnen mitteilen, dass Ihnen ein außergewöhnlicher
COVID-19-Sozialhilfezuschuss in Höhe von 500.000,00 USD von der
Weltgesundheitsorganisation gewährt wurde.
Es wird daher empfohlen, die folgenden Informationen an den W.H.O Trust Fund zu
senden, um Ihre Forderung zu bearbeiten [trustfu
Hi,
On 2020/7/2 21:55, Keqian Zhu wrote:
> For that using arm64 DBM to log dirty pages has the side effect
> of long time dirty log sync, we should give userspace opportunity
> to enable or disable this feature, to realize some policy.
>
> This feature is disabled by default.
>
> Signed-off-by:
> From: Lu Baolu
> Sent: Monday, July 6, 2020 8:26 AM
>
> There are several places in the code that need to get the pointers of
> svm and sdev according to a pasid and device. Add a helper to achieve
> this for code consolidation and readability.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/iom
On 07/06/2020 06:18 AM, Anshuman Khandual wrote:
> This series adds some more arch page table helper validation tests which
> are related to core and advanced memory functions. This also creates a
> documentation, enlisting expected semantics for all page table helpers as
> suggested by Mike Rapo
Excerpts from Christophe Leroy's message of July 6, 2020 3:49 am:
>
>
> Le 03/07/2020 à 16:13, Michael Ellerman a écrit :
>> We have powerpc specific logic in our page fault handling to decide if
>> an access to an unmapped address below the stack pointer should expand
>> the stack VMA.
>>
>> Th
In the function nvic_of_init(), system resource "nvic_base" and
"nvic_irq_domain" were not released in two error cases. Thus add
jump targets for the completion of the desired exception handling.
Fixes: 292ec080491d ("irqchip: Add support for ARMv7-M NVIC")
Signed-off-by: Tiezhu Yang
---
drivers
In the function davinci_cp_intc_do_init(), system resources
"config->reg.start", "davinci_cp_intc_base" and "irq_base"
were not released in a few error cases. Thus add jump targets
for the completion of the desired exception handling.
Fixes: 0fc3d74cf946 ("irqchip: davinci-cp-intc: move the driver
When I test the irqchip code of Loongson, I read the related code of other
chips in drivers/irqchip and I find some potential resource leaks in the
error path, I think it is better to fix them.
v2:
- Split the first patch into a new patch series which
includes small patches and add "Fixes" t
In the function davinci_aintc_init(), system resources "config->reg.start",
"davinci_aintc_base", "irq_base" and "davinci_aintc_irq_domain" were not
released in a few error cases. Thus add jump targets for the completion of
the desired exception handling.
Fixes: 0145beed9d26 ("irqchip: davinci-ain
In the function ocelot_irq_init(), system resource "parent_irq"
was not released in a few error cases. Thus add a jump target
for the completion of the desired exception handling.
Fixes: 19d99164480a ("irqchip: Add a driver for the Microsemi Ocelot
controller")
Signed-off-by: Tiezhu Yang
---
dr
In the function ls1x_intc_of_init(), system resource "parent_irq"
was not released in two error cases. Thus add a jump target for
the completion of the desired exception handling.
Fixes: 9e543e22e204 ("irqchip: Add driver for Loongson-1 interrupt controller")
Signed-off-by: Tiezhu Yang
---
drive
This fix a few issues when I tried to enable pmem as RAM device on arm64.
Tested on ThunderX2 host/qemu "-M virt" guest.
Jia He (3):
arm64/numa: set numa_off to false when numa node is fake
mm/memory_hotplug: harden try_offline_node against bogus nid
mm/memory_hotplug: fix unpaired mem_hotp
In the function csky_mpintc_init(), system resources "__trigger",
"INTCG_base" and "root_domain" were not released in a few error
cases. Thus add jump targets for the completion of the desired
exception handling. By the way, do some coding-style cleanups
suggested by Markus.
Fixes: d8a5f5f79122 ("
Previously, numa_off is set to true unconditionally in dummy_numa_init(),
even if there is a fake numa node.
But acpi will translate node id to NUMA_NO_NODE(-1) in acpi_map_pxm_to_node()
because it regards numa_off as turning off the numa node.
Without this patch, pmem can't be probed as a RAM de
In the function ath79_misc_intc_of_init(), system resources "irq" and
"base" were not released in a few error cases. Thus add jump targets
for the completion of the desired exception handling.
Fixes: 07ba4b061a79 ("irqchip/ath79-misc: Move the MISC driver from
arch/mips/ath79/")
Signed-off-by: Ti
When testing the remove_memory path of dax pmem, there will be a panic with
call trace:
try_remove_memory+0x84/0x170
remove_memory+0x38/0x58
dev_dax_kmem_remove+0x3c/0x84 [kmem]
device_release_driver_internal+0xfc/0x1c8
device_release_driver+0x28/0x38
bus_remove_device+0xd4/0x158
devi
In the function ck_intc_init_comm(), system resources "reg_base" and
"root_domain" were not released in two error cases. Thus add jump
targets for the completion of the desired exception handling.
Fixes: edff1b4835b7 ("irqchip: add C-SKY APB bus interrupt controller")
Signed-off-by: Tiezhu Yang
-
In the function omap_init_irq_of(), system resource "omap_irq_base"
was not released in an error case. Thus add a call of the function
"iounmap" in the if branch.
Fixes: 8598066cddd1 ("arm: omap: irq: move irq.c to drivers/irqchip/")
Signed-off-by: Tiezhu Yang
---
drivers/irqchip/irq-omap-intc.c
When check_memblock_offlined_cb() returns failed rc(e.g. the memblock is
online at that time), mem_hotplug_begin/done is unpaired in such case.
Therefore a warning:
Call Trace:
percpu_up_write+0x33/0x40
try_remove_memory+0x66/0x120
? _cond_resched+0x19/0x30
remove_memory+0x2b/0x40
dev_d
On Mon, Jul 06, 2020 at 08:55:35AM +0800, Guo Ren wrote:
> On Mon, Jul 6, 2020 at 4:31 AM Kees Cook wrote:
> > Sure -- I assume get_cycles64() is architecturally "simple"? (i.e. it
> > doesn't require that the entire time-keeping subsystem has started?)
> Yes, it's just a csr read. But it's necess
On Mon, Jul 06, 2020 at 09:01:51AM +0800, Guo Ren wrote:
> Yeah! :) I just want to show you, how about the format: use tp in gpr
> to do that. The format is similar to arm64.
>
> tp is the task_struct point in riscv.
Sounds good to me, yes. Thanks! Is there anyone looking at the GCC and
Clang sid
Hi
The proposal is not just! It's bloat! Not directed at the problem!
Like ISO 9001 processes which were defined, but which were
circumvented/ignored by every single employee, for god reasons.
If the coding style document would explicite state function, names and
identifiers should be descriptive
In the function xilinx_intc_of_init(), system resource "irqc->root_domain"
was not released in an error case. Thus add a jump target to call the
function "irq_domain_remove" for the completion of the desired exception
handling.
Fixes: 9689c99e4950 ("irqchip/xilinx: Add support for parent intc")
Si
In the function dw_apb_ictl_init(), system resources "irq" and "domain"
were not released in a few error cases. Thus add jump targets for the
completion of the desired exception handling.
Fixes: 350d71b94fc9 ("irqchip: add DesignWare APB ICTL interrupt controller")
Signed-off-by: Tiezhu Yang
---
In the function digicolor_of_init(), system resources "reg_base" and
"digicolor_irq_domain" were not released in a few error cases. Thus
add jump targets for the completion of the desired exception handling.
Fixes: 8041dfbd31cf ("irqchip: Conexant CX92755 interrupts controller driver")
Signed-off-
In the function s3c_init_intc_of(), system resource "reg_base", "domain"
and "intc" were not released in a few error cases. Thus add jump targets
for the completion of the desired exception handling.
Fixes: f0774d41da0e ("irqchip: s3c24xx: add devicetree support")
Signed-off-by: Tiezhu Yang
---
Hi
On 5/7/2020 10:25 pm, Guenter Roeck wrote:
On Sun, Jul 05, 2020 at 11:47:25AM +0800, Chris Ruehl wrote:
Add support for DTS bindings for the sensirion shtc1,shtw1 and shtc3.
Signed-off-by: Chris Ruehl
---
drivers/hwmon/shtc1.c | 22 --
1 file changed, 20 insertions(+
In the function riscv_intc_init(), system resource "intc_domain"
was not released in an error case. Thus add a call of the function
"irq_domain_remove" in the if branch.
Fixes: 6b7ce8927b5a ("irqchip: RISC-V per-HART local interrupt controller
driver")
Signed-off-by: Tiezhu Yang
Reviewed-by: Anu
> From: Lu Baolu
> Sent: Monday, July 6, 2020 8:26 AM
>
> A pasid might be bound to a page table from a VM guest via the iommu
> ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
> on the physical IOMMU, we need to inject the page fault request into
> the guest. After the guest
On Thu, Jul 2, 2020 at 11:57 PM Kajol Jain wrote:
>
> Added nest imc metric events.
Acked-by: Ian Rogers
> Signed-off-by: Kajol Jain
> ---
> .../arch/powerpc/power9/nest_metrics.json | 35 +++
> 1 file changed, 35 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/p
> From: Tian, Kevin
> Sent: Monday, July 6, 2020 9:30 AM
>
> > From: Lu Baolu
> > Sent: Monday, July 6, 2020 8:26 AM
> >
> > A pasid might be bound to a page table from a VM guest via the iommu
> > ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
> > on the physical IOMMU, we
On Sun, Jul 05, 2020 at 11:52:32AM -0400, Qian Cai wrote:
> On Sun, Jul 05, 2020 at 08:58:54PM +0800, Feng Tang wrote:
> > On Sun, Jul 05, 2020 at 08:15:03AM -0400, Qian Cai wrote:
> > >
> > >
> > > > On Jul 5, 2020, at 12:45 AM, Feng Tang wrote:
> > > >
> > > > I did reproduce the problem, and
On Thu, Jul 2, 2020 at 11:20 PM kajoljain wrote:
>
> On 6/25/20 7:38 PM, Ian Rogers wrote:
> > On Thu, Jun 25, 2020 at 4:47 AM Kajol Jain wrote:
> >>
> >> Set up the "PerChip" field so that perf knows they are
> >> per chip events.
> >>
> >> Set up the "PerCore" field so that perf knows they ar
Hi all,
On Fri, 26 Jun 2020 10:05:27 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the bpf-next tree got a conflict in:
>
> tools/testing/selftests/bpf/progs/bpf_iter_netlink.c
>
> between commits:
>
> 9c82a63cf370 ("libbpf: Fix CO-RE relocs against .text section")
> 647
> From: Lu Baolu
> Sent: Monday, July 6, 2020 8:26 AM
>
> After a page request is handled, software must response the device which
> raised the page request with the handling result. This is done through
'response' is a noun.
> the iommu ops.page_response if the request was reported to outside
Hi all,
On Tue, 30 Jun 2020 11:52:02 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
> drivers/gpu/drm/i915/gvt/handlers.c
>
> between commit:
>
> fc1e3aa0337c ("drm/i915/gvt: Fix incorrect check of enabled bits in mask
> registers")
hey,
for those who read my email, i upgraded tjhe algorithm
here it is
#include
// The algorithm works by first getting a base of , and change one
bit at a time (0001,0010,etc);
// Then it uess a base of and change one bit at a time
(1110,1101,etc...)
int main() {
char ze
On 7/2/20 7:54 PM, Baolin Wang wrote:
> Add a blank line after declarations to make code more readable.
>
> Signed-off-by: Baolin Wang
> ---
Looks good to me.
Reviewed-by: Chaitanya Kulkarni
On 7/2/20 7:54 PM, Baolin Wang wrote:
> Fix comments' typo and remove whitespaces before tabs to cleanup
> checkpatch errors.
>
> Signed-off-by: Baolin Wang
Looks good to me.
Reviewed-by: Chaitanya Kulkarni
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* This automated bisection report was sent to you on the basis *
* that you may be involved with the breaking commit it has *
* found. No manual investigation has been done to verify it, *
* and the root cause of the problem
We use tag-based KASAN, then KASAN unit tests don't detect out-of-bounds
memory access. They need to be fixed.
With tag-based KASAN, the state of each 16 aligned bytes of memory is
encoded in one shadow byte and the shadow value is tag of pointer, so
we need to read next shadow byte, the shadow va
On 7/2/20 7:54 PM, Baolin Wang wrote:
> We've validated the segment counts before calling nvme_map_data(),
> so there is no need to validate again in nvme_pci_use_sgls() only
> called from nvme_map_data().
>
> Signed-off-by: Baolin Wang
Indeed we do call blk_rq_nr_phys_segments() in nvme_queue_rq
On 7/2/20 7:55 PM, Baolin Wang wrote:
> The nvme_pci_iod_alloc_size() should return 'size_t' type to keep
> consistent.
>
> Signed-off-by: Baolin Wang
Looks good.
Reviewed-by: Chaitanya Kulkarni
On 7/2/20 7:55 PM, Baolin Wang wrote:
> Use standard block status macro.
>
> Signed-off-by: Baolin Wang
Looks good.
Reviewed-by: Chaitanya Kulkarni
On 6/27/20 6:03 AM, Ignat Korchagin wrote:
This is a follow up from [1]. Consider the following script:
sudo modprobe brd rd_nr=1 rd_size=4194304
echo '0 8388608 crypt capi:ecb(cipher_null) - 0 /dev/ram0 0' | \
sudo dmsetup create eram0
echo '0 8388608 crypt capi:ecb(cipher_null) - 0 /dev/ram0
On Mon, Jul 06, 2020 at 09:43:13AM +0800, Feng Tang wrote:
> On Sun, Jul 05, 2020 at 11:52:32AM -0400, Qian Cai wrote:
> > On Sun, Jul 05, 2020 at 08:58:54PM +0800, Feng Tang wrote:
> > > On Sun, Jul 05, 2020 at 08:15:03AM -0400, Qian Cai wrote:
> > > >
> > > >
> > > > > On Jul 5, 2020, at 12:45
On Mon, Jul 6, 2020 at 9:21 AM Kees Cook wrote:
>
> On Mon, Jul 06, 2020 at 09:01:51AM +0800, Guo Ren wrote:
> > Yeah! :) I just want to show you, how about the format: use tp in gpr
> > to do that. The format is similar to arm64.
> >
> > tp is the task_struct point in riscv.
>
> Sounds good to me
Hi Sven,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: dcb7fd82c75ee2d6e6f9d8cc71c52519ed52e258
commit: 52e8a94baf9026276fcdc9ff21a50dc2ca0bc94b ASoC: Add initial ZL38060
driver
date: 3 months ago
config: x86_64
vmemmap_populate_basepages() is used across platforms to allocate backing
memory for vmemmap mapping. This is used as a standard default choice or
as a fallback when intended huge pages allocation fails. This just creates
entire vmemmap mapping with base pages (PAGE_SIZE).
On arm64 platforms, vmem
This series enables vmemmap backing memory allocation from device memory
ranges on arm64. But before that, it enables vmemmap_populate_basepages()
and vmemmap_alloc_block_buf() to accommodate struct vmem_altmap based
alocation requests.
This series applies on 5.8-rc4.
Changes in V4:
- Dropped 'f
There are many instances where vmemap allocation is often switched between
regular memory and device memory just based on whether altmap is available
or not. vmemmap_alloc_block_buf() is used in various platforms to allocate
vmemmap mappings. Lets also enable it to handle altmap based device memory
Device memory ranges when getting hot added into ZONE_DEVICE, might require
their vmemmap mapping's backing memory to be allocated from their own range
instead of consuming system memory. This prevents large system memory usage
for potentially large device memory ranges. Device driver communicates
When we are in the interrupt context, it is irrelevant to the
current task context. If we use current task's mems_allowed, we
can fair to alloc pages in the fast path and fall back to slow
path memory allocation when the current node(which is the current
task mems_allowed) does not have enough memo
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: dcb7fd82c75ee2d6e6f9d8cc71c52519ed52e258
commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to
define address spaces
date: 2 weeks ago
config: i386-randconfig-s002-20200706 (attached
changes since v1:
- add more description in commit message.
*** BLURB HERE ***
Neal Liu (1):
cpuidle: change enter_s2idle() prototype
drivers/acpi/processor_idle.c | 6 --
drivers/cpuidle/cpuidle-tegra.c | 8 +---
drivers/idle/intel_idle.c | 6 --
include/linux/cpuidle.h
Hi Willy,
On Sun, 5 Jul 2020 at 13:55, Willy Tarreau wrote:
> I'm personally thinking that for a non-native speaker it's already
> difficult to find the best term to describe something,
I'm a nobody in the kernel world but this point made me think.
I'm a native English speaker but I don't live
Control Flow Integrity(CFI) is a security mechanism that disallows
changes to the original control flow graph of a compiled binary,
making it significantly harder to perform such attacks.
init_state_node() assign same function callback to different
function pointer declarations.
static int init_s
From: Zhang Qiang
Before the work is put into the queue of the worker thread,
the state of the worker thread needs to be detected,because
the worker thread may be in the destruction state at this time.
Signed-off-by: Zhang Qiang
Suggested-by: Petr Mladek
Reviewed-by: Petr Mladek
---
v1->v2:
On Wed, Jun 24, 2020 at 4:41 PM Flavio Suligoi wrote:
>
> Fix typo: "triger" --> "trigger"
>
> Signed-off-by: Flavio Suligoi
Acked-by: Chen-Yu Tsai
Hi all,
Today's linux-next merge of the driver-core tree got a conflict in:
include/linux/device.h
between commit:
7d34ca385484 ("driver core: Add device_is_dependent() to linux/device.h")
from the devicetree tree and commit:
67dd07723969 ("device: remove 'extern' attribute from functio
From: xidongwang
The stack object “info” in snd_opl3_ioctl() has a leaking problem.
It has 2 padding bytes which are not initialized and leaked via
“copy_to_user”.
Signed-off-by: xidongwang
---
sound/drivers/opl3/opl3_synth.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/drivers/
On Thu, Feb 27, 2020 at 11:50:11PM -0800, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:f8788d86 Linux 5.6-rc3
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=13005fd9e0
> kernel config: https://syzkaller.appspot.co
From: Zhang Qiang
Signed-off-by: Zhang Qiang
---
drivers/usb/gadget/function/f_uac1_legacy.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/gadget/function/f_uac1_legacy.c
b/drivers/usb/gadget/function/f_uac1_legacy.c
index 349deae7cabd..e2d7f69128a0 100644
--- a/drivers/usb
Hi Krzysztof,
Thanks for your review comments.
On Sun, 5 Jul 2020 at 23:32, Krzysztof Kozlowski wrote:
>
> On Sun, Jul 05, 2020 at 06:04:35AM +, Anand Moon wrote:
> > User readl_poll_timeout function instead of open
> > coded handling in crport_handshake function.
>
> Your change does not re
Hi all,
Today's linux-next merge of the dmaengine tree got a conflict in:
drivers/dma/idxd/sysfs.c
between commit:
da32b28c95a7 ("dmaengine: idxd: cleanup workqueue config after disabling")
from the dmaengine-fixes tree and commit:
f50b150e315e ("dmaengine: idxd: add work queue drain su
On 07/02/2020 05:41 PM, Catalin Marinas wrote:
> Hi Anshuman,
Hi Catalin,
>
> On Mon, Jun 15, 2020 at 06:45:17PM +0530, Anshuman Khandual wrote:
>> --- a/arch/arm64/include/asm/pgtable.h
>> +++ b/arch/arm64/include/asm/pgtable.h
>> @@ -353,15 +353,92 @@ static inline int pmd_protnone(pmd_t pm
On 05.07.20 22:24, Andy Lutomirski wrote:
On Jul 5, 2020, at 12:44 PM, tip-bot2 for Ingo Molnar
wrote:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: a4c0e91d1d65bc58f928b80ed824e10e165da22c
Gitweb:
https://git.kernel.org/tip/a4c0e91d1d65bc5
On 7/5/2020 8:56 PM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the dmaengine tree got a conflict in:
drivers/dma/idxd/sysfs.c
between commit:
da32b28c95a7 ("dmaengine: idxd: cleanup workqueue config after disabling")
from the dmaengine-fixes tree and commit:
f5
In order to decouple ethtool from its PHY library dependency, define an
ethtool_phy_ops singleton which can be overriden by the PHY library when
it loads with an appropriate set of function pointers.
Signed-off-by: Florian Fainelli
---
include/linux/ethtool.h | 25 +
net/
Hi all,
This patch series untangles the ethtool netlink dependency with PHYLIB
which exists because the cable test feature calls directly into PHY
library functions. The approach taken here is to introduce
ethtool_phy_ops function pointers which can be dynamically registered
when PHYLIB loads.
Fl
Utilize ethtool_set_ethtool_phy_ops to register a suitable set of PHY
ethtool operations in a dynamic fashion such that ethtool will no longer
directy reference PHY library symbols.
Signed-off-by: Florian Fainelli
---
drivers/net/phy/phy_device.c | 7 +++
1 file changed, 7 insertions(+)
dif
Now that we have introduced ethtool_phy_ops and the PHY library
dynamically registers its operations with that function pointer, we can
remove the direct PHYLIB dependency in favor of using dynamic
operations.
Signed-off-by: Florian Fainelli
---
net/Kconfig | 1 -
net/ethtool/cablet
An include goes away in future patches which breaks compilation
without this.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/pci-ioda-tce.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda-tce.c
b/arch/powerpc/platforms/powernv/pci-i
v3 is updated to use __pv_queued_spin_unlock, noticed by Waiman (thank you).
Thanks,
Nick
Nicholas Piggin (6):
powerpc/powernv: must include hvcall.h to get PAPR defines
powerpc/pseries: move some PAPR paravirt functions to their own file
powerpc: move spinlock implementation to simple_spin
On 18-Jun-20 12:26 AM, Vidya Sagar wrote:
On 02-Jun-20 10:37 PM, Gustavo Pimentel wrote:
External email: Use caution opening links or attachments
On Tue, Jun 2, 2020 at 11:9:38, Vidya Sagar wrote:
In this patch series,
Patch-1
adds required infrastructure to deal with prefetchable memo
This brings the behaviour of the uncontended fast path back to
roughly equivalent to simple spinlocks -- a single atomic op with
lock hint.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/atomic.h| 28
arch/powerpc/include/asm/qspinlock.h | 2 +-
2 f
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/paravirt.h | 28
arch/powerpc/include/asm/qspinlock.h | 66 +++
arch/powerpc/include/asm/qspinlock_paravirt.h | 7 ++
arch/powerpc/platforms/pseries/Kconfig| 5 ++
arch/powerpc/platfo
To prepare for queued spinlocks. This is a simple rename except to update
preprocessor guard name and a file reference.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/simple_spinlock.h| 292 ++
.../include/asm/simple_spinlock_types.h | 21 ++
arch/powerpc/
These have shown significantly improved performance and fairness when
spinlock contention is moderate to high on very large systems.
[ Numbers hopefully forthcoming after more testing, but initial
results look good ]
Thanks to the fast path, single threaded performance is not noticably
hurt.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/paravirt.h | 61 +
arch/powerpc/include/asm/spinlock.h | 24 +---
arch/powerpc/lib/locks.c| 12 +++---
3 files changed, 68 insertions(+), 29 deletions(-)
create mode 100644 arch/powerpc/in
On Tue, Jun 16, 2020 at 10:56 AM Daniele Alessandrelli
wrote:
>
> Hi,
>
> This patch-set adds initial support for a new Intel Movidius SoC code-named
> Keem Bay. The SoC couples an ARM Cortex A53 CPU with an Intel Movidius VPU.
>
> This initial patch-set enables only the minimal set of components
On 05-07-20, 21:23, Dave Jiang wrote:
>
>
> On 7/5/2020 8:56 PM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Today's linux-next merge of the dmaengine tree got a conflict in:
> >
> >drivers/dma/idxd/sysfs.c
> >
> > between commit:
> >
> >da32b28c95a7 ("dmaengine: idxd: cleanup workque
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