On 05/05/20 15:16, Thomas Gleixner wrote:
> From: Thomas Gleixner
>
> While working on the entry consolidation I stumbled over the KVM async page
> fault handler and kvm_async_pf_task_wait() in particular. It took me a
> while to realize that the randomly sprinkled around rcu_irq_enter()/exit()
>
On 05/05/20 15:16, Thomas Gleixner wrote:
> The async page fault injection into kernel space creates more problems than
> it solves. The host has absolutely no knowledge about the state of the
> guest if the fault happens in CPL0. The only restriction for the host is
> interrupt disabled state. If
Change in v9:
- move wr_reg_barrier into ifdef of CONFIG_SERIAL_SAMSUNG_CONSOLE
to fix following build error for x86 build
CC [M] drivers/tty/serial/samsung_tty.o
drivers/tty/serial/samsung_tty.c:186:13: warning: ‘wr_reg_barrier’
defined but not used [-Wunused-function]
Change in v8:
- sp
On 05/05/20 15:16, Thomas Gleixner wrote:
> From: Andy Lutomirski
>
> KVM overloads #PF to indicate two types of not-actually-page-fault
> events. Right now, the KVM guest code intercepts them by modifying
> the IDT and hooking the #PF vector. This makes the already fragile
> fault code even ha
This patch change the name of macro for general usage.
Signed-off-by: Hyunki Koo
---
drivers/tty/serial/samsung_tty.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 73f951d65b93..326
On 6/5/2020 2:41 pm, Greg KH wrote:
> On Wed, May 06, 2020 at 12:49:57PM +0800, Tanwar, Rahul wrote:
>> On 5/5/2020 10:25 pm, Greg KH wrote:
>>> On Mon, May 04, 2020 at 04:03:52PM +0800, Rahul Tanwar wrote:
Lantiq serial driver/IP is reused for a x86 based SoC as well.
Update the Kconfi
Add a description for reg-io-width options for the samsung serial
UART peripheral.
Signed-off-by: Hyunki Koo
---
Documentation/devicetree/bindings/serial/samsung_uart.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml
b/Do
Support 32-bit access for the TX/RX hold registers UTXH and URXH.
This is required for some newer SoCs.
Signed-off-by: Hyunki Koo
---
drivers/tty/serial/samsung_tty.c | 62
1 file changed, 57 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial
Hi all,
The following series add support for the Slimport ANX7625 transmitter, a
ultra-low power Full-HD 4K MIPI to DP transmitter designed for portable device.
This is the v10 version, any mistakes, please let me know, I will fix it in
the next series.
Change history:
v10: Fix comments from Ro
Hi Andrew,
thanks for the review.
wt., 5 maj 2020 o 19:47 Andrew Lunn napisał(a):
>
> > +static struct net_device *mtk_mac_get_netdev(struct mtk_mac_priv *priv)
> > +{
> > + char *ptr = (char *)priv;
> > +
> > + return (struct net_device *)(ptr - ALIGN(sizeof(struct net_device),
> > +
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
for portable device. It converts MIPI to DisplayPort 1.3 4K.
You can add support to your board with binding.
Example:
anx7625_bridge: encoder@58 {
compatible = "analogix,anx7625";
reg = <0x
Hi Mauro! Thank you for reviewing this!
>> Add a MPEG Transport Stream multiplexer responsible for polling encoders,
>> interleaving packets, padding the resulting stream with NULL packets if
>> necessary and then delivering the resulting TS packets to the bridge
>> driver so it can feed the demu
On 05/06/2020 12:16 PM, Gavin Shan wrote:
> The function add_huge_page_size(), wrapper of hugetlb_add_hstate(),
> avoids to register duplicated huge page states for same size. However,
> the same logic has been included in hugetlb_add_hstate(). So it seems
> unnecessary to keep add_huge_page_siz
On 2020/5/4 23:16, Konstantin Khlebnikov wrote:
> Define BLK_RWBS_LEN in blktrace_api.h
> Bcache events use shorter 6 char buffer which could overflow.
>
> Also remove unsed "bytes" argument.
>
> Signed-off-by: Konstantin Khlebnikov
The patch is good for me, it can be directly handled by block
On Wed, 6 May 2020 at 02:03, Luke Nelson wrote:
>
> This patch series introduces a set of optimizations to the BPF JIT
> on RV64. The optimizations are related to the verifier zero-extension
> optimization and BPF_JMP BPF_K.
>
> We tested the optimizations on a QEMU riscv64 virt machine, using
> l
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
for portable device. It converts MIPI DSI/DPI to DisplayPort 1.3 4K.
The ANX7625 can support both USB Type-C PD feature and MIPI DSI/DPI
to DP feature. This driver only enabled MIPI DSI/DPI to DP feature.
Signed-off-by: Xin Ji
-
Hi Jakub,
thanks for the review.
wt., 5 maj 2020 o 20:04 Jakub Kicinski napisał(a):
>
> > +/* Represents the actual structure of descriptors used by the MAC. We can
> > + * reuse the same structure for both TX and RX - the layout is the same,
> > only
> > + * the flags differ slightly.
> > + */
Hello Igor,
On Wed, May 6, 2020 at 12:21 PM Igor Russkikh wrote:
>
>
>
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -574,13 +575,13 @@ int qede_add_tc_flower_fltr(struct qede_dev *edev,
> > __be16 proto,
> > #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE
From: Borislav Petkov
Hi all,
here are some more cleanups ontop of tglx's x86 CPU macros cleanup
series.
Thx.
Borislav Petkov (2):
x86/cpu: Add a X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS() macro
x86/apic: Convert the TSC deadline timer matching to steppings macro
Mark Gross (1):
x86/cpu: Ad
From: Borislav Petkov
... to match Intel family 6 CPUs with steppings.
Signed-off-by: Borislav Petkov
---
arch/x86/include/asm/cpu_device_id.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/include/asm/cpu_device_id.h
b/arch/x86/include/asm/cpu_device_id.h
index 10426cd56dca
From: Borislav Petkov
... and get rid of the function pointers which would spit out the
microcode revision based on the CPU stepping.
Signed-off-by: Borislav Petkov
Cc: Peter Zijlstra (Intel)
---
arch/x86/kernel/apic/apic.c | 57 -
1 file changed, 12 insert
From: Mark Gross
Intel uses the same family/model for several CPUs. Sometimes the
stepping must be checked to tell them apart.
On x86 there can be at most 16 steppings. Add a steppings bitmask to
x86_cpu_id and a X86_MATCH_VENDOR_FAMILY_MODEL_STEPPING_FEATURE macro
and support for matching again
On Tuesday, May 5, 2020 at 2020 03:31:00 PM +0900, Greg Kroah-Hartman
> On Wed, May 06, 2020 at 08:30:46AM +0900, Hyunki Koo wrote:
> > On Tuesday, May 5, 2020 at 2020 11:23:00 PM +0900, Greg Kroah-Hartman
> Hartman wrote:
> > > On Mon, Apr 20, 2020 at 10:32:56AM +0900, Hyunki Koo wrote:
> > > > Th
On Wed, May 06, 2020 at 12:36:43PM +0530, Anshuman Khandual wrote:
>
>
> On 05/06/2020 12:16 PM, Gavin Shan wrote:
> > The function add_huge_page_size(), wrapper of hugetlb_add_hstate(),
> > avoids to register duplicated huge page states for same size. However,
> > the same logic has been include
On Wed, May 06, 2020 at 03:28:47AM +, Justin He wrote:
> Hi Michael
>
> > -Original Message-
> > From: Michael S. Tsirkin
> > Sent: Monday, May 4, 2020 8:16 PM
> > To: Linus Torvalds
> > Cc: k...@vger.kernel.org; virtualizat...@lists.linux-foundation.org;
> > net...@vger.kernel.org;
Since some uart controllers may be off in S3, add additional wakeup_irq
to support in-band wakeup.
Claire Chang (3):
serdev: ttyport: add devt for tty port
tty: serial_core: add wakeup_irq to support in-band wakeup
uart: mediatek: move the in-band wakeup logic to core
drivers/tty/serdev/se
serial_match_port() uses devt to match devices. However, when serdev
registers a tty port, devt has never been set. This makes
device_find_child() always return NULL.
Assign devt in serdev_tty_port_register() to fix this.
Signed-off-by: Claire Chang
---
drivers/tty/serdev/serdev-ttyport.c | 2 +
On Tue, 5 May 2020 at 21:00, Lenny Szubowicz wrote:
>
> In allocate_e820(), free the EFI map buffer that has been returned
> by efi_get_memory_map(). The returned size of the EFI map buffer
> is used to allocate an adequately sized e820ext buffer, if it's
> needed. But the contents of that EFI map
Move the in-band wakeup logic to core so that we can control the wakeup
behavior by serdev controller's power/wakeup node and align with other
serial drivers.
Signed-off-by: Claire Chang
---
drivers/tty/serial/8250/8250_mtk.c | 24 +++-
1 file changed, 3 insertions(+), 21 del
Since some uart controllers may be off in S3, we won't be able to use
the normal in-band wakeup.
Take 8250_mtk.c as an example. The driver needs to allocate an edge
sensitive interrupt as the wakeup_irq and use an addtional pinctrl to
reconfigure Rx pin to normal GPIO in sleep state. Once host det
On Mai 06 2020, Anup Patel wrote:
> We had build issues in past by selecting major driver subsystems
> in Kconfig.socs
>
> I suggest to select SPI_SIFIVE from Kconfig.socs
SPI_SIFIVE can be m, don't override that.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB4
On 5/1/20 4:44 PM, Denis Efremov wrote
>
> The first patch removes pr_cont() in setup_DMA() and prints the contents of
> cmd buffer with print_hex_dump(). The last patch also touches these lines
> and changes cmd buffer to fullcmd. The 2,3 patches introduce defines to
> make it more clear why cmd_
On Wed, May 06, 2020 at 03:19:55AM -0400, Michael S. Tsirkin wrote:
> On Wed, May 06, 2020 at 03:28:47AM +, Justin He wrote:
> > Hi Michael
> >
> > > -Original Message-
> > > From: Michael S. Tsirkin
> > > Sent: Monday, May 4, 2020 8:16 PM
> > > To: Linus Torvalds
> > > Cc: k...@vger
Hi Suzuki, Mike,
On 2020-04-29 22:41, Sai Prakash Ranjan wrote:
Hi Mike,
On 2020-04-29 22:28, Mike Leach wrote:
Hi,
[...]
>> > You need to find what is resetting the IDFILTERs to 0 for replicator1.
>> >
>>
>> That is right.
>>
>
> By default all replicators have the IDFILTER registers set
On Wed, May 06, 2020 at 02:16:33PM +0800, Jason Wang wrote:
> We should not exclude headroom and tailroom when XDP is set. So this
> patch fixes this by initializing the truesize from PAGE_SIZE when XDP
> is set.
>
> Cc: Jesper Dangaard Brouer
> Signed-off-by: Jason Wang
Seems too aggressive, w
On Wed, May 06, 2020 at 04:00:06PM +0900, Hyunki Koo wrote:
> Add a description for reg-io-width options for the samsung serial
> UART peripheral.
>
> Signed-off-by: Hyunki Koo
> ---
> Documentation/devicetree/bindings/serial/samsung_uart.yaml | 8
> 1 file changed, 8 insertions(+)
You
On 5/5/2020 7:23 PM, Mark Brown wrote:
On Mon, May 04, 2020 at 06:15:47PM +0800, Dilip Kota wrote:
On 4/29/2020 8:13 PM, Mark Brown wrote:
I just tried to get the history of removing workqueue in SPI driver, on
GRX500 (earlier chipset of LGM) the SPI transfers got timedout with
workqueues d
From: Leon Romanovsky
>From Yishai:
This series enables applicable events objects (i.e. QP, SRQ, CQ, WQ) to
be created with their own asynchronous event FD.
Before this series any affiliated event on an object was reported on the
first asynchronous event FD that was created on the context witho
On Fri, 2020-04-24 at 02:20 +0800, Enric Balletbo Serra wrote:
> Hi Weiyi Lu,
>
> Thank you for the patch. Just a trivial comment below.
>
> Missatge de Weiyi Lu del dia dv., 20 de març
> 2020 a les 8:33:
> >
> > Add power dt-bindings of MT8183 and introduces "BASIC" and
> > "SUBSYS" clock type
On Fri, 2020-04-24 at 02:20 +0800, Enric Balletbo Serra wrote:
> Hi Weiyi Lu,
>
> Thank you for your patch.
>
> Missatge de Weiyi Lu del dia dv., 20 de març
> 2020 a les 8:33:
> >
> > Try to stop extending the clk_id or clk_names if there are
> > more and more new BASIC clocks. To get its own c
On Fri, 2020-04-24 at 02:19 +0800, Enric Balletbo Serra wrote:
> Hi Wiyi Lu,
>
> Thank you for your patch.
>
> Missatge de Weiyi Lu del dia dv., 20 de març
> 2020 a les 8:33:
> >
> > Both MT8183 & MT6765 have more control steps of bus protection
> > than previous project. And there add more bus
On Fri, 2020-04-24 at 02:19 +0800, Enric Balletbo Serra wrote:
> Hi Weiyi Lu,
>
> Thank you for the patch
>
> Missatge de Weiyi Lu del dia dv., 20 de març
> 2020 a les 8:33:
> >
> > The functions provided by infracfg misc driver have no other user except
> > the scpsys driver so move those into
On Fri, 2020-04-24 at 02:19 +0800, Enric Balletbo Serra wrote:
> Hi Weiyi Lu,
>
> Thank you for the patch.
>
> Missatge de Weiyi Lu del dia dv., 20 de març
> 2020 a les 8:33:
> >
> > For the bus protection operations, some subsys clocks need to be enabled
> > before releasing the protection, an
On 05/05/20 15:41, Thomas Gleixner wrote:
> Context tracking for KVM happens way too early in the vcpu_run()
> code. Anything after guest_enter_irqoff() and before guest_exit_irqoff()
> cannot use RCU and should also be not instrumented.
>
> The current way of doing this covers way too much code.
On Wed, May 06, 2020 at 11:42:12AM +0530, Anshuman Khandual wrote:
> Platform specific huge_ptep_get() is required only when fetching the huge
> PTE involves more than just dereferencing the page table pointer. This is
> not the case on arm64 platform. Hence huge_ptep_pte() can be dropped along
> w
On 2020/5/6 7:05, Jaegeuk Kim wrote:
> On 05/05, Chao Yu wrote:
>> On 2020-5-4 22:30, Jaegeuk Kim wrote:
>>> From: Daeho Jeong
>>>
>>> Current zstd compression buffer size is one page and header size less
>>> than cluster size. By this, zstd compression always succeeds even if
>>> the real compres
From: Leon Romanovsky
>From Jason,
These are intended to be no-functional change edits that tidy up the
code flow or coding style.
Thanks
Danit Goldberg (1):
RDMA/cm: Remove unused store to ret in cm_rej_handler
Jason Gunthorpe (9):
RDMA/addr: Mark addr_resolve as might_sleep()
RDMA/cm:
Fixes coccicheck warning:
drivers/scsi/qla2xxx/tcm_qla2xxx.c:1488:1-3: WARNING: PTR_ERR_OR_ZERO can be
used
Reported-by: Hulk Robot
Signed-off-by: Samuel Zou
---
drivers/scsi/qla2xxx/tcm_qla2xxx.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/scsi/qla2xxx/tcm_
On 20-05-04 15:13:48, Jeremy Linton wrote:
> On some architectures (e.g. arm64) requests for
> IO coherent memory may use non-cachable attributes if
> the relevant device isn't cache coherent. If these
> pages are then remapped into userspace as cacheable,
> they may not be coherent with the non-ca
From: Joe Perches
Date: Mon, Apr 27, 2020 at 15:45:17
> On Mon, 2020-04-27 at 16:00 +0200, Angelo Ribeiro wrote:
> > Creates entry for Synopsys DesignWare IPK DRM driver and
> > adds myself as maintainer.
> []
> > diff --git a/MAINTAINERS b/MAINTAINERS
> []
> > @@ -5507,6 +5507,14 @@ T: git git
On 2020/5/6 10:16, Zefan Li wrote:
On 2020/5/6 9:50, Yang Yingliang wrotee:
+cc lize...@huawei.com
On 2020/5/6 0:06, Tejun Heo wrote:
Hello, Yang.
On Sat, May 02, 2020 at 06:27:21PM +0800, Yang Yingliang wrote:
I find the number nr_dying_descendants is increasing:
linux-dVpNUK:~ # find /sys/
On 5/6/20 12:03 AM, Mathieu Poirier wrote:
> On Mon, May 04, 2020 at 01:34:43PM +0200, Arnaud POULIQUEN wrote:
>>
>>
>> On 4/30/20 10:23 PM, Mathieu Poirier wrote:
>>> On Wed, Apr 29, 2020 at 10:19:49AM +0200, Arnaud POULIQUEN wrote:
On 4/24/20 10:01 PM, Mathieu Poirier wrote:
>>>
This series patches adds support for VCAP IS1 and ES0 module.
VCAP IS1 supports FLOW_ACTION_VLAN_MANGLE action to filter MAC, IP,
VLAN, protocol, and TCP/UDP ports keys and retag vlan tag.
VCAP ES0 supports FLOW_ACTION_VLAN_PUSH action to filter vlan keys
and push a specific vlan tag to frames.
When calculating vcap data offset, the function only supports half key
entry. This patch modify vcap_data_offset_get function to calculate a
correct data offset when setting VCAP Type-Group to VCAP_TG_FULL or
VCAP_TG_QUARTER.
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot_ace
From: Vladimir Oltean
There are some targets (register blocks) in the Ocelot switch that are
instantiated more than once. For example, the VCAP IS1, IS2 and ES0
blocks all share the same register layout for interacting with the cache
for the TCAM and the action RAM.
For the VCAPs, the procedure
From: Vladimir Oltean
The Ocelot driver only supports VCAP IS2, the security enforcement block
which implements Access Control List actions (trap, drop, police).
In preparation of VCAP IS1 support, generalize the existing code to work
with any VCAP. In that direction, move all VCAP instantiation
VCAP IS1 is a VCAP module which can filter MAC, IP, VLAN, protocol, and
TCP/UDP ports keys, and do Qos and VLAN retag actions.
This patch added VCAP IS1 support in ocelot ace driver, which can supports
vlan modify action of tc filter.
Usage:
tc qdisc add dev swp0 ingress
tc filter a
On Wed, May 06, 2020 at 02:16:32PM +0800, Jason Wang wrote:
> We tried to reserve space for vnet header before
> xdp.data_hard_start. But this is useless since the packet could be
> modified by XDP which may invalidate the information stored in the
> header and there's no way for XDP to know the ex
VCAP ES0 is an egress VCAP working on all outgoing frames.
This patch added ES0 driver to support vlan push action of tc filter.
Usage:
tc filter add dev swp1 egress protocol 802.1Q flower skip_sw
vlan_id 1 vlan_prio 1 action vlan push id 2 priority 2
Signed-off-by: Xiaoliang Yang
From: Vladimir Oltean
When the Extraction Frame Header contains a valid classified VLAN, use
that instead of the VLAN header present in the packet.
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_ocelot.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/net/dsa
On 05/05/20 15:41, Thomas Gleixner wrote:
> Add hardirq tracing to guest enter/exit functions in the same way as it
> is done in the user mode enter/exit code.
>
> Signed-off-by: Thomas Gleixner
> Cc: Paolo Bonzini
> Cc: Sean Christopherson
> ---
> arch/x86/kvm/vmx/vmx.c | 25 +++
The following commit has been merged into the x86/build branch of tip:
Commit-ID: 950a37078aa0ab63a57673e7027e8735e73d4bc6
Gitweb:
https://git.kernel.org/tip/950a37078aa0ab63a57673e7027e8735e73d4bc6
Author:Andrew Morton
AuthorDate:Tue, 05 May 2020 14:26:51 -07:00
Committer
Matthew Wilcox wrote:
> > PG_fscache is going to be used to indicate that a page is being written to
> > the cache, and that the page should not be modified or released until it's
> > finished.
> >
> > Make afs_invalidatepage() and afs_releasepage() wait for it.
>
> Well, why? Keeping a refcou
Change in v10:
- add reviewd by and tested by in commit of each patch
Change in v9:
- move wr_reg_barrier into ifdef of CONFIG_SERIAL_SAMSUNG_CONSOLE
to fix following build error for x86 build
CC [M] drivers/tty/serial/samsung_tty.o
drivers/tty/serial/samsung_tty.c:186:13: warning: ‘wr_reg_
Add a description for reg-io-width options for the samsung serial
UART peripheral.
Signed-off-by: Hyunki Koo
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/serial/samsung_uart.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/seri
This patch change the name of macro for general usage.
Signed-off-by: Hyunki Koo
Reviewed-by: Krzysztof Kozlowski
Tested on Odroid HC1 (Exynos5422):
Tested-by: Krzysztof Kozlowski
---
drivers/tty/serial/samsung_tty.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
dif
Support 32-bit access for the TX/RX hold registers UTXH and URXH.
This is required for some newer SoCs.
Signed-off-by: Hyunki Koo
Reviewed-by: Krzysztof Kozlowski
Tested on Odroid HC1 (Exynos5422):
Tested-by: Krzysztof Kozlowski
---
drivers/tty/serial/samsung_tty.c | 62 ++
This series mainly adds sama5d2 support where we need to avoid using
clock index 0 because that clock is never enabled by the driver.
There is also a rework of the 32khz clock handling so it is not used for
clockevents on 32 bit counter because the increased rate improves the
resolution and doesn'
This serie adds support for the Hardkernel Odroid-C4 single board computer.
The Odroid-C4 is the Odroid-C2 successor with same form factor, but using
a modern Amlogic S905X3 (SM1) SoC and 4x USB3 ports.
Fully functionnal:
- USB2+USB3
- USB2 OTG
- eMMC
- SDCard
- HDMI
- DVFS
- Gigabit Ethernet wit
Add the board bindings for the Hardkernel Odroid-C4 single board computer.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml
b/Documentation/devicetree/bindi
From: Dongjin Kim
Add the board support for the Hardkernel Odroid-C4 single board computer.
The Odroid-C4 is the Odroid-C2 successor with same form factor, but using
a modern Amlogic S905X3 (SM1) SoC and 4x USB3 ports.
Signed-off-by: Dongjin Kim
Signed-off-by: Neil Armstrong
---
arch/arm64/b
On Tuesday, May 5, 2020 at 2020 4:33:00 PM +0900, Greg Kroah-Hartman
> On Wed, May 06, 2020 at 04:00:06PM +0900, Hyunki Koo wrote:
> > Add a description for reg-io-width options for the samsung serial UART
> > peripheral.
> >
> > Signed-off-by: Hyunki Koo
> > ---
> > Documentation/devicetree/bind
Convert Atmel Timer Counter Blocks bindings to DT schema format using
json-schema.
Also move it out of mfd as it is not and has never been related to mfd.
Signed-off-by: Alexandre Belloni
---
Cc: Rob Herring
Changes in v3:
- Moved the child node documentation to the parent documentation
Chan
The sama5d2 TC block TIMER_CLOCK1 is different from the at91sam9x5 one.
Instead of being MCK / 2, it is the TCB GCLK.
Signed-off-by: Alexandre Belloni
---
Cc: Rob Herring
.../soc/microchip/atmel,at91rm9200-tcb.yaml | 36 +++
1 file changed, 30 insertions(+), 6 deletions(-)
d
Fixes coccicheck warning:
sound/soc/sunxi/sun4i-i2s.c:1177:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Reported-by: Hulk Robot
Signed-off-by: Samuel Zou
---
sound/soc/sunxi/sun4i-i2s.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/
On 5/6/20 9:08 AM, Björn Töpel wrote:
On Wed, 6 May 2020 at 02:03, Luke Nelson wrote:
This patch series introduces a set of optimizations to the BPF JIT
on RV64. The optimizations are related to the verifier zero-extension
optimization and BPF_JMP BPF_K.
We tested the optimizations on a QEMU
So for mergeable bufs, we use ewma machinery to guess the correct buffer
size. If we don't guess correctly, XDP has to do aggressive copies.
Problem is, xdp paths do not update the ewma at all, except
sometimes with XDP_PASS. So whatever we happen to have
before we attach XDP, will mostly stay aro
From: Kamel Bouhara
Some atmel socs have extra tcb capabilities that allow using a generic
clock source or enabling a quadrature decoder.
Signed-off-by: Kamel Bouhara
Signed-off-by: Alexandre Belloni
---
include/soc/at91/atmel_tcb.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/inc
On all the supported SoCs, the slow clock is always ATMEL_TC_TIMER_CLOCK5,
avoid looking it up and pass it directly to setup_clkevents.
Signed-off-by: Alexandre Belloni
---
drivers/clocksource/timer-atmel-tcb.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drive
The sama5d2 tcbs take an extra input clock, their gclk.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sama5d2.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ab550d69db91..996143e
The first divisor for the sama5d2 is actually the gclk selector. Because
the currently remaining divisors are fitting the use case, currently ensure
it is skipped.
Signed-off-by: Alexandre Belloni
---
drivers/clocksource/timer-atmel-tcb.c | 11 ++-
1 file changed, 10 insertions(+), 1 del
The divider selection algorithm never allowed to get index 0. It was also
continuing to look for dividers, trying to find the slow clock selection.
This is not necessary anymore.
Signed-off-by: Alexandre Belloni
---
drivers/clocksource/timer-atmel-tcb.c | 6 ++
1 file changed, 2 insertions(+
Use the tcb_config and struct atmel_tcb_config to get the timer counter
width. This is necessary because atmel_tcb_config will be extended later
on.
Signed-off-by: Alexandre Belloni
---
drivers/clocksource/timer-atmel-tcb.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-
Stop using the slow clock as the clock source for 32 bit counters because
even at 10MHz, they are able to handle delays up to two minutes. This
provides a way better resolution.
Signed-off-by: Alexandre Belloni
---
drivers/clocksource/timer-atmel-tcb.c | 61 ++-
1 file ch
Fixes coccicheck warning:
drivers/nvmem/jz4780-efuse.c:214:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Reported-by: Hulk Robot
Signed-off-by: Samuel Zou
---
drivers/nvmem/jz4780-efuse.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/nvmem/jz4780-efuse.c b/drivers/
On 05/05/20 15:41, Thomas Gleixner wrote:
> + * VMENTER enables interrupts (host state), but the kernel state is
> + * interrupts disabled when this is invoked. Also tell RCU about
> + * it. This is the same logic as for exit_to_user_mode().
> + *
> + * 1) Trace interrupts
On Tue, May 05, 2020 at 03:16:04PM +0200, Thomas Gleixner wrote:
> From: Andy Lutomirski
>
> A data breakpoint near the top of an IST stack will cause unresoverable
unrecoverable
> recursion. A data breakpoint on the GDT, IDT, or TSS is terrifying.
"terrifying" huh? Colorful. :)
> Prevent ei
A minor coding style fix
Signed-off-by: Weiyi Lu
---
drivers/soc/mediatek/mtk-scpsys.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c
b/drivers/soc/mediatek/mtk-scpsys.c
index 15d018e..277ddbf 100644
--- a/drivers/soc/mediate
Add power dt-bindings of MT8183 and introduces "BASIC" and
"SUBSYS" clock types in binding document.
The "BASIC" type is compatible to the original power control with
clock name [a-z]+[0-9]*, e.g. mm, vpu1.
The "SUBSYS" type is used for bus protection control with clock
name [a-z]+-[0-9]+, e.g. isp
For some power domains like vpu_core on MT8183 whose sram need to
do clock and internal isolation while power on/off sram.
We add a cap "MTK_SCPD_SRAM_ISO" to judge if we need to do
the extra sram isolation control or not.
Signed-off-by: Weiyi Lu
Reviewed-by: Nicolas Boichat
---
drivers/soc/med
Add power controller node and smi-common node for MT8183
In scpsys node, it contains clocks and regmapping of
infracfg and smi-common for bus protection.
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 62
1 file changed, 62 insertions(+)
The functions provided by infracfg misc driver have no other user except
the scpsys driver so move those into scpsys driver directly.
And then, remove infracfg misc drvier which is no longer being used.
BTW, in next patch, we're going to extend the bus protection functions
with more customized argu
Add scpsys driver for MT8183
Signed-off-by: Weiyi Lu
Reviewed-by: Nicolas Boichat
---
drivers/soc/mediatek/mtk-scpsys.c | 249 ++
1 file changed, 249 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c
b/drivers/soc/mediatek/mtk-scpsys.c
index f194
This series is based on v5.7-rc1
changes since v13:
- document optional property "smi-comm"
- move defines in scpsyc.h to mtk-scpsys.c directly
- minor coding sytle fixes
change since v12:
- separate the fix of comma at the end into a new patch [PATCH 09/11]
changes since v11:
- re-order patches
mfgcfg clock is under MFG_ASYNC power domain
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5dce7d6..ca865ab 100644
--- a/arch/arm6
Both MT8183 & MT6765 have more control steps of bus protection
than previous project. And there add more bus protection registers
reside at infracfg & smi-common.
Extend function to support multiple step bus protection control
with more customized arguments.
And then use bp_table for bus protection
For the bus protection operations, some subsys clocks need to be enabled
before releasing the protection, and vice versa.
But those subsys clocks could only be controlled once its corresponding
power domain is turned on first.
In this patch, we add the subsys clock control into its relevant steps.
For scpsys driver using regmap based syscon driver API.
Signed-off-by: Weiyi Lu
---
.../devicetree/bindings/memory-controllers/mediatek,smi-common.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-commo
Try to stop extending the clk_id or clk_names if there are
more and more new BASIC clocks. To get its own clocks by the
basic_clk_name of each power domain.
And then use basic_clk_name strings for all compatibles, instead of
mixing clk_id and clk_name.
Signed-off-by: Weiyi Lu
Reviewed-by: Nicolas
On 05/05/20 15:41, Thomas Gleixner wrote:
> Move the functions which are inside the RCU off region into the
> non-instrumentable text section.
>
> Signed-off-by: Thomas Gleixner
> Cc: Paolo Bonzini
> Cc: Sean Christopherson
> ---
> arch/x86/kvm/svm/svm.c | 102
> -
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