On Fri, Oct 18, 2019 at 01:48:32PM +0200, Michal Hocko wrote:
> On Thu 17-10-19 16:21:08, Oscar Salvador wrote:
> > From: Naoya Horiguchi
> >
> > Drop the PageHuge check since memory_failure forks into
> > memory_failure_hugetlb()
> > for hugetlb pages.
> >
> > Signed-off-by: Oscar Salvador
>
Greetings
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known politician in her country and deserve a lucrative investment partnership
with you outside her country without any delay Please can you manage such
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On Fri, Oct 18, 2019 at 01:52:27PM +0200, Michal Hocko wrote:
> On Thu 17-10-19 16:21:09, Oscar Salvador wrote:
> > From: Naoya Horiguchi
> >
> > The call to get_user_pages_fast is only to get the pointer to a struct
> > page of a given address, pinning it is memory-poisoning handler's job,
> > s
Enable support for the ICY I2C board for Amiga, which is typically
equipped with an LTC2990 hwmon chip, in the Amiga and multi-platform
defconfig files.
Signed-off-by: Geert Uytterhoeven
---
To be queued for v5.5.
arch/m68k/configs/amiga_defconfig | 6 +-
arch/m68k/configs/multi_defconfig |
On Thu, Oct 17, 2019 at 04:21:10PM +0200, Oscar Salvador wrote:
> Make a proper if-else condition for {hard,soft}-offline.
>
> Signed-off-by: Oscar Salvador
Acked-by: Naoya Horiguchi
On Thu, Oct 17, 2019 at 04:21:16PM +0200, Oscar Salvador wrote:
> Place the THP's page handling in a helper and use it
> from both hard and soft-offline machinery, so we get rid
> of some duplicated code.
>
> Signed-off-by: Oscar Salvador
> ---
> mm/memory-failure.c | 48 ++--
On Thu, Oct 17, 2019 at 04:21:12PM +0200, Oscar Salvador wrote:
> Since get_hwpoison_page is only used in memory-failure code now,
> let us un-export it and make it private to that code.
>
> Signed-off-by: Oscar Salvador
Acked-by: Naoya Horiguchi
On Thu, Oct 17, 2019 at 04:21:13PM +0200, Oscar Salvador wrote:
> After ("4e41a30c6d50: mm: hwpoison: adjust for new thp refcounting"),
> put_hwpoison_page got reduced to a put_page.
> Let us just use put_page instead.
>
> Signed-off-by: Oscar Salvador
Acked-by: Naoya Horiguchi
On 10/16/2019 4:26 PM, Jason Wang wrote:
On 2019/10/16 上午9:36, Zhu Lingshan wrote:
failed to send to kvm list, resend, sorry for the inconvenience.
THanks,
BR
Zhu Lingshan
On 10/16/2019 9:30 AM, Zhu Lingshan wrote:
Hi all:
This series intends to introduce Intel IFC VF NIC driver for Vhos
Hello Bartosz,
Thanks for reading this through! I'll rework this patch during this
week :)
On Thu, 2019-10-17 at 14:45 +0200, Bartosz Golaszewski wrote:
> czw., 17 paź 2019 o 11:53 Matti Vaittinen
> napisał(a):
> > ROHM BD71828 PMIC contains 4 pins which can be configured by OTP
> > to be used f
On Mon, Oct 14, 2019 at 03:02:05PM +0200, Jiri Pirko wrote:
> Mon, Oct 14, 2019 at 01:18:47PM CEST, mkube...@suse.cz wrote:
> >On Fri, Oct 11, 2019 at 03:34:29PM +0200, Jiri Pirko wrote:
> >> Wed, Oct 09, 2019 at 10:59:18PM CEST, mkube...@suse.cz wrote:
> >> >+Bit sets
> >> >+
> >> >+
> >>
On 20.10.19 10:29, Dixit Parmar wrote:
> Any review comments for this?
> Or it should be merged?
>
> Thanks.
My comment and tag is there. This fixes multitouch and should be merged.
martin
>
>
> On Thu, Aug 22, 2019 at 02:08:14PM +0200, Martin Kepplinger wrote:
Hi Michal,
On 2019/10/17 20:37, Michal Hocko wrote:
> On Thu 17-10-19 18:23:08, Shaokun Zhang wrote:
>> From: yuqi jin
>>
>> In the multi-processor and NUMA system, A device may have many numa
>> nodes belonging to multiple cpus. When we get a local numa, it is better
>> to find the node closest
Hi Miquel,
> > > > Then fill-in these two hooks from the manufacturer code, without
the
> > > > postponed init.
> > > >
> > >
> > > But in the final of nand_scan_tail(), mtd->_lock/_unlock will be
> > > filled by NULL, right ?
> >
> > The NAND core should set mtd->_lock/_unlock() to NAND sp
Hi Shuah,
On Fri, 18 Oct 2019 15:45:56 -0600
shuah wrote:
> On 10/7/19 9:10 AM, Masami Hiramatsu wrote:
> > Hi,
> >
> > Here are some patches to fix some warnings/issues on 32bit arch
> > (e.g. arm).
> >
> > When I built the ksefltest on arm, I hit some 32bit related warnings.
> > Here are the
Looks good, thanks Geert!
Acked-by: Max Staudt
Hi John,
On 10/18/19 10:17 PM, John Donnelly wrote:
This cures a panic on restart after a kexec -p operation on 5.3 and 5.4
kernels.
The underlying state of the iommu registers (iommu->flags &
VTD_FLAG_TRANS_PRE_ENABLED) on a restart results in a domain being marked as
"DEFER_DEVICE_DOMAIN_IN
On Sat, Oct 19, 2019 at 1:36 AM zzoru wrote:
>
> Hi
>
> The customizations are related to driver fuzzing.
> We added some more descriptions of USB driver & narrowed the
> constraints (targeted fuzzing).
Please consider upstreaming these improvements to syzkaller.
> And sorry about I have not muc
From: Candle Sun
Upstream commit 58e75155009c ("HID: core: move Usage Page concatenation
to Main item") adds support for Usage Page item after Usage ID items
(such as keyboards manufactured by Primax).
Usage Page concatenation in Main item works well for following report
descriptor patterns:
By the way, Joerg Roedel is the IOMMU subsystem
maintainer. If you have a v2, please add his email in the "To" list.
You can always use scripts/get_maintainer.pl to check who should the
patch be sent to. :-)
Best regards,
Baolu
On 10/21/19 3:27 PM, Lu Baolu wrote:
Hi John,
On 10/18/19 10:17
> On 2019-10-16 06:09, Biwen Li wrote:
> > This supports property idle-state
> >
> > Signed-off-by: Biwen Li
> > ---
> > Change in v3:
> > - update subject and description
> > - add a helper function pca954x_calculate_chan()
> >
> > Change in v2:
> > - update subject and descript
Hi all,
In commit
612e0486ad08 ("iw_cxgb4: fix ECN check on the passive accept")
Fixes tag
Fixes: 92e7ae7172 ("iw_cxgb4: Choose appropriate hw mtu index and ISS for
iWARP connections")
has these problem(s):
- SHA1 should be at least 12 digits long
Can be fixed by setting core.abbre
Commit b7be4ef1365d ("posix-cpu-timers: Switch thread group sampling to
array") and commit 001f7971433a ("posix-cpu-timers: Make expiry checks
array based") made some modification on parameters of function
thread_group_sample_cputime() and task_cputimers_expired(), but forgot
to modify the comment.
On Mon, 21 Oct 2019 15:23:57 +0800
masonccy...@mxic.com.tw wrote:
> Hi Miquel,
>
>
> > > > > Then fill-in these two hooks from the manufacturer code, without
> the
> > > > > postponed init.
> > > > >
> > > >
> > > > But in the final of nand_scan_tail(), mtd->_lock/_unlock will be
> > > >
On 2019/10/18 23:20, Sudeep Holla wrote:
> On Fri, Oct 18, 2019 at 08:46:37PM +0800, Yunfeng Ye wrote:
>> In case like suspend-to-disk and uspend-to-ram, a large number of CPU
>
> s/case/cases/
> s/uspend-to-ram/suspend-to-ram/
>
ok, thanks.
>> cores need to be shut down. At present, the CPU
Hi Kangjie,
On Sat, Oct 19, 2019 at 12:29 AM Kangjie Lu wrote:
> "f->fmt.sdr.reserved" is uninitialized. As other peer drivers
> like msi2500 and airspy do, the fix initializes it to avoid
> memory disclosures.
>
> Signed-off-by: Kangjie Lu
Reviewed-by: Geert Uytterhoeven
> --- a/drivers/medi
Macro TO_CS_QUEUE_NR definition has a typo, which uses 'trace_id_chan'
as its parameter, this doesn't match with its definition body which uses
'trace_chan_id'. So renames the parameter to 'trace_chan_id'.
It's luck to have a local variable 'trace_chan_id' in the function
cs_etm__setup_queue(), e
* Vincent Guittot wrote:
> Several wrong task placement have been raised with the current load
> balance algorithm but their fixes are not always straight forward and
> end up with using biased values to force migrations. A cleanup and rework
> of the load balance will help to handle such UCs a
Hi Roger,
On Fri, Sep 6, 2019 at 6:06 PM Roger Lu wrote:
> ...
> +static int svs_resource_setup(struct mtk_svs *svs)
> ...
> + for (i = 0, freq = (u32)-1; i < svsb->opp_count; i++, freq--)
> {
> + opp = dev_pm_opp_find_freq_floor(svsb->dev, &freq);
> +
On Fri, Oct 18, 2019 at 02:59:19PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, Oct 18, 2019 at 04:55:31PM +0800, Leo Yan escreveu:
> > As there have several discussions for enabling Perf breakpoint signal
> > testing on arm64 platform; arm64 needs to rely on single-step to execute
> > the brea
Hi,
On Mon, Oct 21, 2019 at 3:38 PM Candle Sun wrote:
>
> From: Candle Sun
>
> Upstream commit 58e75155009c ("HID: core: move Usage Page concatenation
> to Main item") adds support for Usage Page item after Usage ID items
> (such as keyboards manufactured by Primax).
>
> Usage Page concatenatio
Hi,
On 21/10/2019 07:04, Christian Hewitt wrote:
> Chip on the board is S905D3 not S905X3.
>
> Fixes: 1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for
> VIM3L")
>
> Signed-off-by: Christian Hewitt
> ---
> drivers/soc/amlogic/meson-gx-socinfo.c | 2 +-
> 1 file changed, 1 inser
Hi,
Thanks for the fix.
First, you should add "mmc: meson-gx:" in the subject.
On 21/10/2019 07:59, Jianxin Pan wrote:
> From: Nan Li
>
> In MMC dma transfer, the region requested by dma_map_sg() may be released
> by dma_unmap_sg() before the transfer is completed.
>
> Put the unmap operation
* Alexey Budankov wrote:
> + /*
> + * PMU specific parts of task perf context may require
> + * additional synchronization, at least for proper Intel
> + * LBR callstack data profiling;
> + *
Hello Dan,
Thanks for taking the time to check my driver :) I truly appreciate all
the help!
A "fundamental question" regarding these review comments is whether I
should add DT entries for these LEDs or not. I thought I shouldn't but
I would like to get a comment from Rob regarding it.
On Thu, 2
Hi, Guenter
On 2019/10/21 0:56, Guenter Roeck wrote:
On 10/18/19 1:33 AM, Xingyu Chen wrote:
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs to be done in secure EL3 mode via ATF,
Non-secure world can call SMC instruction to trap to AFT fo
On 19-10-18 11:44, Andy Shevchenko wrote:
> On Thu, Oct 17, 2019 at 01:41:54PM -0700, Dmitry Torokhov wrote:
> > Input devices now support polling mode natively (via input_setup_polling
> > API), and input_polled_dev implementation is going away. This series
> > switches drivers found in drivers/in
From: Rui Feng
Add support for new chip rts5261.
In order to support rts5261, the definitions of some internal registers
and workflow have to be modified and are different from its predecessors.
So we need this patch to ensure RTS5261 can work.
Signed-off-by: Rui Feng
---
drivers/misc/cardread
* Amit Kucheria wrote:
> This allows HW drivers that depend on cpufreq-dt to initialise earlier.
My obsessive-compulsive in-brain spellchecker noticed that the title says
'initialize' (US spelling), while the comment uses 'initialise' (UK
spelling). Just in case this is not some post-Brexit
Hi,
On Mon, Oct 21, 2019 at 7:39:17, Dilip Kota
wrote:
> Intel PCIe is synopsys based controller utilizes the Designware
Please do this general replacement in all your patches.
s/synopsys/Synopsys
and
s/Designware/DesignWare
> framework for host initialization and intel application
> spec
On 2019-10-21 07:55, Rajendra Nayak wrote:
From: Maulik Shah
Add sc7180 pdc irqchip
Signed-off-by: Maulik Shah
Signed-off-by: Rajendra Nayak
Cc: Lina Iyer
Cc: Marc Zyngier
---
v2: No change
drivers/irqchip/qcom-pdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/qco
This supports property idle-state
Signed-off-by: Biwen Li
---
Change in v4:
- none
Change in v3:
- update subject and description
- add some information for property idle-state
Change in v2:
- update subject and description
- add property idle-state
Doc
This supports property idle-state
Signed-off-by: Biwen Li
---
Change in v4:
- rename function
pca954x_calculate_chan -> pca954x_regval
Change in v3:
- update subject and description
- add a helper function pca954x_calculate_chan()
Change in v2:
- update
Just a naming tweak:
On 13/10/19 11:15, Like Xu wrote:
> + /* the exact requested config to create perf_event */
> + u64 programed_config;
/*
* eventsel value for general purpose counters, ctrl value for
* fixed counters.
*/
u64 current_config;
Hi Robert,
please don't use 'ARM: dt: ..' instead you should name it 'ARM: dts:
imx6qdl-gw5x:'.
On 19-10-18 16:20, Robert Jones wrote:
> Add fxos8700 iio imu entries for Gateworks SBCs.
>
> Signed-off-by: Robert Jones
> ---
> arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 5 +
> arch/arm/boot/dts
Hi Paolo,
On 2019/10/21 16:12, Paolo Bonzini wrote:
Just a naming tweak:
On 13/10/19 11:15, Like Xu wrote:
+ /* the exact requested config to create perf_event */
+ u64 programed_config;
/*
* eventsel value for general purpose counters, ctrl value for
*
On Thu, Oct 17, 2019 at 04:21:17PM +0200, Oscar Salvador wrote:
> When trying to soft-offline a free page, we need to first take it off
> the buddy allocator.
> Once we know is out of reach, we can safely flag it as poisoned.
>
> take_page_off_buddy will be used to take a page meant to be poisoned
On Mon, 21 Oct 2019, Miaohe Lin wrote:
> If we reach here with r = 0, we will reassign r = 0
> unnecesarry, then do the label set_irqchip_out work.
> If we reach here with r != 0, then we will do the label
> work directly. So this if statement and r = 0 assignment
> is redundant.
>
> Signed-off-by
Thanks Dan,
On Thu, 2019-10-17 at 09:18 -0500, Dan Murphy wrote:
> Matt
By the way, its Matti ;)
> On 10/17/19 4:55 AM, Matti Vaittinen wrote:
> > ROHM BD71828 Power management IC integrates 7 buck converters, 7
> > LDOs,
> > a real-time clock (RTC), 3 GPO/regulator control pins, HALL input
> >
Hi Robert,
same here, don't name it 'ARM: dt: ...' instead name it 'ARM: dts: imx:
ventana: ..' or 'ARM: dts: imx: imx6qdl-gw553x: ..'.
On 19-10-18 16:21, Robert Jones wrote:
> Add one node for the accel/gyro i2c device and another for the separate
> magnetometer device in the lsm9ds1.
>
> Signe
On Mon, Oct 21, 2019 at 4:15 AM Viresh Kumar wrote:
>
> On 18-10-19, 12:06, Sudeep Holla wrote:
> > Callstack is:
> >
> > (cpufreq_notifier_max)
> > (notifier_call_chain)
> > (blocking_notifier_call_chain)
> > (pm_qos_update_target)
> > (freq_qos_apply)
> > (freq_qos_remove_request)
> > (cpufreq_p
Chip on the board is S905D3 not S905X3:
[0.098998] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (b0:2)
Detected
Change from v1: use 0xf0 mask instead of 0xf2 as advised by Neil Armstrong.
Fixes: 1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")
Signed-off-by: C
On 21/10/2019 10:20, Christian Hewitt wrote:
> Chip on the board is S905D3 not S905X3:
>
> [0.098998] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (b0:2)
> Detected
>
> Change from v1: use 0xf0 mask instead of 0xf2 as advised by Neil Armstrong.
>
> Fixes: 1d7c541b8a5b ("soc: amlogic:
Hi Neil,
Thanks for the review, I will update the subject and commit message in the next
version.
On 2019/10/21 15:57, Neil Armstrong wrote:
> Hi,
>
> Thanks for the fix.
>
> First, you should add "mmc: meson-gx:" in the subject.
>
> On 21/10/2019 07:59, Jianxin Pan wrote:
>> From: Nan Li
>>
Has this been properly reviewed? I do not see any Acks nor Reviewed-bys.
On Fri 18-10-19 20:19:39, Andrew Morton wrote:
> From: "Aneesh Kumar K.V"
> Subject: mm/memunmap: don't access uninitialized memmap in memunmap_pages()
>
> Patch series "mm/memory_hotplug: Shrink zones before removing memor
Currently proc-self-map-files-002.c sets va_max (max test address
of user virtual address) to 4GB, but it is too big for 32bit
arch and 1UL << 32 is overflow on 32bit long.
Make va_max 1GB on 32bit arch like i386 and arm.
Signed-off-by: Masami Hiramatsu
Cc: Alexey Dobriyan
---
Changes in v2:
Has this been reviewed properly? I do not see any Acks nor Reviewed-bys.
Did Aneesh gave it some testing?
On Fri 18-10-19 20:19:33, Andrew Morton wrote:
> From: David Hildenbrand
> Subject: mm/memory_hotplug: don't access uninitialized memmaps in
> shrink_pgdat_span()
>
> We might use the nid o
Use size_t and ssize_t correctly for counting send file size
instead of unsigned long and long, because long is 32bit on
32bit arch, which is not enough for counting long file size (>4GB).
Signed-off-by: Masami Hiramatsu
Cc: Eric Dumazet
Cc: David S. Miller
---
tools/testing/selftests/net/tcp_
Fix printf format warnings on arm (and other 32bit arch).
- udpgso.c and udpgso_bench_tx use %lu for size_t but it
should be unsigned long long on 32bit arch.
- so_txtime.c uses %ld for int64_t, but it should be
unsigned long long on 32bit arch.
Signed-off-by: Masami Hiramatsu
Cc: Wille
Fix warnings on __u64 and pointer translation on arm and
other 32bit architectures. Since the pointer is 32bits on
those archs, we should not directly cast those types.
Signed-off-by: Masami Hiramatsu
Cc: Emilio López
---
tools/testing/selftests/sync/sync.c |6 +++---
1 file changed, 3 inse
On 21.10.19 10:26, Michal Hocko wrote:
Has this been properly reviewed? I do not see any Acks nor Reviewed-bys.
As I modified this patch while carrying it along, it at least has my
implicit Ack/RB.
--
Thanks,
David / dhildenb
Some virtual address range tests requires 64bit address space,
and we can not build and run those tests on the 32bit machine.
Filter the 64bit architectures in Makefile and run_vmtests,
so that those tests are built/run only on 64bit archs.
Signed-off-by: Masami Hiramatsu
Cc: Anshuman Khandual
Hi,
Here are the 2nd version of kselftest fixes some on 32bit arch
(e.g. arm). In this version, I updated [1/5] to make va_max 1GB
instead of 3GB, according to Alexey's comment.
When I built the ksefltest on arm, I hit some 32bit related warnings.
Here are the patches to fix those issues.
- [1
Chris Chiu writes:
> On Thu, Oct 17, 2019 at 10:26 AM Chris Chiu wrote:
>>
>> On Wed, Oct 16, 2019 at 9:54 AM Chris Chiu wrote:
>> >
>> > The RTL8723BU has problems connecting to AP after each warm reboot.
>> > Sometimes it returns no scan result, and in most cases, it fails
>> > the authentica
On 18/10/2019 18:29, Christian Hewitt wrote:
> Move VIM3 audio nodes to meson-khadas-vim3.dtsi to enable audio for all
> boards in the VIM3 family including VIM3L.
>
> This change depends on [1] being merged/applied first.
>
> [1] https://patchwork.kernel.org/patch/11198535/
>
> Signed-off-by: C
Hi
On Mon, Oct 21, 2019 at 7:39:19, Dilip Kota
wrote:
> Add support to PCIe RC controller on Intel Gateway SoCs.
> PCIe controller is based of Synopsys DesignWare pci core.
>
> Intel PCIe driver requires Upconfig support, fast training
> sequence configuration and link speed change. So adding
Hi Gustavo Pimentel,
On 10/21/2019 4:08 PM, Gustavo Pimentel wrote:
Hi,
On Mon, Oct 21, 2019 at 7:39:17, Dilip Kota
wrote:
Intel PCIe is synopsys based controller utilizes the Designware
Please do this general replacement in all your patches.
s/synopsys/Synopsys
and
s/Designware/DesignW
On Mon 21-10-19 10:28:16, David Hildenbrand wrote:
> On 21.10.19 10:26, Michal Hocko wrote:
> > Has this been properly reviewed? I do not see any Acks nor Reviewed-bys.
> >
>
> As I modified this patch while carrying it along, it at least has my
> implicit Ack/RB.
OK, thanks!
--
Michal Hocko
SU
commit d44248a41337 ("perf/core: Rework memory accounting in perf_mmap()")
breaks auxiliary trace buffer tracking.
I run command 'perf record -e rbd000' to record samples and saving
them in the **auxiliary** trace buffer. The value of 'locked_vm' becomes
negative after all trace buffers have been
On 21.10.19 10:28, Michal Hocko wrote:
Has this been reviewed properly? I do not see any Acks nor Reviewed-bys.
Did Aneesh gave it some testing?
No explicit ACK/RB. I know that Aneesh at leasted reviewed parts of the
v4/v5 series and gave it a test (which resulted in "[patch 07/26]
mm/memunma
On Sun, Oct 20, 2019 at 08:46:10AM -0700, Tom Rix wrote:
> On PREEMPT_RT_FULL while running netperf, a corruption
> of the skb queue causes an oops.
>
> This appears to be caused by a race condition here
> __skb_queue_tail(&trans->queue, skb);
> tasklet_schedule(&trans->tasklet);
>
On Mon, Oct 21, 2019 at 5:49 AM Ran Wang wrote:
>
> Some user might want to go through all registered wakeup sources
> and doing things accordingly. For example, SoC PM driver might need to
> do HW programming to prevent powering down specific IP which wakeup
> source depending on. So add this API
On Mon, 21 Oct 2019, tglx wrote:
>On Mon, 21 Oct 2019, Miaohe Lin wrote:
>> If we reach here with r = 0, we will reassign r = 0 unnecesarry, then
>> do the label set_irqchip_out work.
>> If we reach here with r != 0, then we will do the label work directly.
>> So this if statement and r = 0 ass
On Mon, Oct 21, 2019 at 7:39:20, Dilip Kota
wrote:
> PCIe RC driver on Intel Gateway SoCs have a requirement
> of changing link width and speed on the fly.
> So add the sysfs attributes to show and store the link
> properties.
> Add the respective link resize function in pcie DesignWare
> framew
Hi Boris,
> > > > > > Then fill-in these two hooks from the manufacturer code,
without
> > the
> > > > > > postponed init.
> > > > > >
> > > > >
> > > > > But in the final of nand_scan_tail(), mtd->_lock/_unlock will be
> > > > > filled by NULL, right ?
> > > >
> > > > The NAND core shou
On 18/10/2019 15:49, Adam Ford wrote:
The OMAP36xx and AM/DM37x TRMs say that the maximum divider for DSS fclk
(in CM_CLKSEL_DSS) is 32. Experimentation shows that this is not
correct, and using divider of 32 breaks DSS with a flood or underflows
and sync losts. Dividers up to 31 seem to work fin
On Fri, Oct 18, 2019 at 03:31:26PM +, Ghannam, Yazen wrote:
> From: Yazen Ghannam
>
> Split out gathering hardware information from init_one_instance() into a
> separate function get_hardware_info().
>
> This is necessary so that the information can be cached earlier and used
> to check if m
Hi,
On Mon, 2019-10-21 at 09:52 +0300, Andy Shevchenko wrote:
> On Sun, Oct 20, 2019 at 05:22:30PM +, Anatol Belski wrote:
> > From: Anatol Belski
>
> Better to add commit message even for small patches like this.
> Do you have compiler / sparse / etc warning? Cite it here as well!
>
yes,
On 18/10/2019 16:05, Adam Ford wrote:
The OMAP36xx and AM/DM37x TRMs say that the maximum divider for DSS fclk
(in CM_CLKSEL_DSS) is 32. Experimentation shows that this is not
correct, and using divider of 32 breaks DSS with a flood or underflows
and sync losts. Dividers up to 31 seem to work fin
On Mon, 21 Oct 2019 at 09:50, Ingo Molnar wrote:
>
>
> * Vincent Guittot wrote:
>
> > Several wrong task placement have been raised with the current load
> > balance algorithm but their fixes are not always straight forward and
> > end up with using biased values to force migrations. A cleanup an
On 18/10/2019 23.52, Li Yang wrote:
> On Fri, Oct 18, 2019 at 3:54 PM Rasmus Villemoes
> wrote:
>>
>> On 18/10/2019 22.16, Leo Li wrote:
>>>
There have been several attempts in the past few years to allow building
the
QUICC engine drivers for platforms other than PPC. This is
On 13/10/19 11:15, Like Xu wrote:
> Currently, a host perf_event is created for a vPMC functionality emulation.
> It’s unpredictable to determine if a disabled perf_event will be reused.
> If they are disabled and are not reused for a considerable period of time,
> those obsolete perf_events would
RK3308 GRF is divided into four sections: GRF, SGRF,
DETECTGRF, COREGRF. This patch add documentation for
it.
Signed-off-by: Andy Yan
---
Changes in v2: None
.../devicetree/bindings/soc/rockchip/grf.txt | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/de
On Fri, Oct 18, 2019 at 4:13 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:8ada228a Add linux-next specific files for 20191011
> git tree: linux-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=144265ab60
> kernel config: https:
Add compatible for RK3308 Evaluation board
Signed-off-by: Andy Yan
---
Changes in v2:
- Split with the dts file
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml
b/Documentation/dev
This board use uart4 as debug port and arm core voltage
is modulated by pwm, logic voltage is fixed to 1.05V.
Signed-off-by: Andy Yan
---
Changes in v2:
- Split binding to a separate patch
- Power tree update.
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/r
On Sat 19-10-19 09:26:19, Dan Williams wrote:
> Check for NULL entries before checking the entry order, otherwise NULL
> is misinterpreted as a present pte conflict. The 'order' check needs to
> happen before the locked check as an unlocked entry at the wrong order
> must fallback to lookup the cor
* Peter Zijlstra wrote:
> --- a/arch/x86/kernel/jump_label.c
> +++ b/arch/x86/kernel/jump_label.c
> @@ -35,18 +35,19 @@ static void bug_at(unsigned char *ip, in
> BUG();
> }
>
> -static void __jump_label_set_jump_code(struct jump_entry *entry,
> -enu
RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
As the clk and pinctrl drivers are landed, we post
the basic dts support, make it convenient for other
module de
On 10/16/2019 5:53 PM, Simon Horman wrote:
Hi Zhu,
thanks for your patch.
On Wed, Oct 16, 2019 at 09:03:18AM +0800, Zhu Lingshan wrote:
This commit introduced IFC VF operations for vdpa, which complys to
vhost_mdev interfaces, handles IFC VF initialization,
configuration and removal.
Signed
Hi Robin,
On Thu, 17 Oct 2019 16:31:42 +0100
Robin Murphy wrote:
> The short-circuit call to fixup_exception() from kprobe_fault_handler()
> poses a problem now that the former wants to consume the fault address
> too, since the common kprobes API offers us no way to pass it through.
> Fortunate
RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
This patch add basic core dtsi file for it.
Signed-off-by: Andy Yan
---
Changes in v2:
- Address Heiko's com
If we reach here with r = 0, we will reassign r = 0
unnecesarry, then do the label set_irqchip_out work.
If we reach here with r != 0, then we will do the label
work directly. So this if statement and r = 0 assignment
is redundant. We remove them and therefore we can get rid
of odd set_irqchip_out
From: zhuguangqing
After commit 00ee22c28915 (PM / wakeup: Use seq_open()
to show wakeup stats), print_wakeup_source_stats(m, &deleted_ws)
is deleted in function wakeup_sources_stats_seq_show().
Because deleted_ws is one of wakeup sources, so it should
also be showed. This patch add it to the en
On Mon, 2019-10-21 at 08:52 +0200, Julia Lawall wrote:
> > btw2:
> >
> > I really dislike all the code inconsistencies and
> > unnecessary code duplication with miscellaneous changes
> > in the rtl staging drivers
> >
> > Horrid stuff.
>
> I'm not sure what you mean by "miscellaneous changes
On Fri, Oct 18, 2019 at 11:54:58AM -0700, Greg Kroah-Hartman wrote:
> On Fri, Oct 18, 2019 at 05:19:55PM +0200, Johan Hovold wrote:
> > The custom ring-buffer implementation was merged without any locking
> > whatsoever, but a spinlock was later added by commit 9d33efd9a791
> > ("USB: ldusb bugfix"
On Mon, 21 Oct 2019 16:40:57 +0800
masonccy...@mxic.com.tw wrote:
> Hi Boris,
>
>
> > > > > > > Then fill-in these two hooks from the manufacturer code,
> without
> > > the
> > > > > > > postponed init.
> > > > > > >
> > > > > >
> > > > > > But in the final of nand_scan_tail(), mtd->_
On 21/10/19 10:16, Thomas Gleixner wrote:
> Can you please get rid of that odd jump label completely?
>
> if (irqchip_kernel(kvm))
> r = kvm_vm_ioctl_set_irqchip(kvm, chip);
Keeping the label has the advantage of making the get and set cases a
bit more similar
Hi Daniel,
On 18.10.2019 23:24, Daniel Lezcano wrote:
> Hi Claudiu,
>
> On 15/10/2019 11:23, claudiu.bez...@microchip.com wrote:
>
> [ ... ]
>
>> The timer clock source could be divided by MR.PRES + 1.
>>
>> So, I used the clock-frequency DT binding to let user choose the timer's
>> frequency.
* Peter Zijlstra wrote:
>* Second step: update all but the first byte of the patched range.
>*/
> for (do_sync = 0, i = 0; i < nr_entries; i++) {
> - if (tp[i].len - sizeof(int3) > 0) {
> + int len = text_opcode_size(tp[i].opcode);
> +
> +
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