Hi Stephen,
Can you please try the patch below, thank you.
net/mlx5: Remove include ib_verbs.h in rdma_counter.h
rdma_counter.h include ib_verbs.h which in turn needs rdma_port_counter
from rdma_counter.h, but it is not defined yet.
Fixes: 413d3347503b ("RDMA/counter: Add set/clear per-port aut
Hi Christoph,
On Mon, Jul 8, 2019 at 11:23 PM Christoph Hellwig wrote:
> On Mon, Jul 08, 2019 at 10:39:48PM +0200, Geert Uytterhoeven wrote:
> > On Mon, Jul 8, 2019 at 7:51 PM Christoph Hellwig wrote:
> > >
> > > m68k only provides the dma_prep_coherent symbol when an mmu is enabled
> >
> > arch
>
>Hi,
>
>Pawel Laszczak writes:
IRQF_ONESHOT can be used only in threaded handled.
"
* IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler
finished.
*Used by threaded interrupts which need to keep the
*irq line dis
Hi Marcel,
On 19-07-08 17:09, Marcel Ziswiler wrote:
> Hi Marco
>
> On Tue, 2019-07-02 at 14:51 +0200, Marco Felsch wrote:
> > Hi Igor,
> >
> > On 19-07-02 09:42, Igor Opaniuk wrote:
> > > Hi Marco,
> > >
> > > On Tue, Jul 2, 2019 at 10:27 AM Marco Felsch <
> > > m.fel...@pengutronix.de> wrote:
>
> Hi all,
>
> On Thu, 20 Jun 2019 15:35:52 +1000 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the char-misc tree got a conflict in:
> >
> > drivers/misc/mei/debugfs.c
> >
> > between commit:
> >
> > 5666d896e838 ("mei: no need to check return value of debugfs_create
> > fu
Currently, $(objtree)/modules.order is touched in two places.
In the 'prepare0' rule, scripts/Makefile.build creates an empty
modules.order while processing 'obj=.'
In the 'modules' rule, the top-level Makefile overwrites it with
the correct list of modules.
While this might be a good side-effec
>
> This is the start of the stable review cycle for the 4.14.133 release.
> There are 56 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses should be made by Wed 10 Jul 2019 03:03:52 PM UTC
Rename 'share_count_dcss' to 'share_count_disp', since the
DCSS module does not exist on imx8mm platform. So rename it
to avoid any unnecessary confusion.
Signed-off-by: Fancy Fang
---
drivers/clk/imx/clk-imx8mm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/dri
On 08.07.2019 22:08, Liu Bo wrote:
On Mon, Jul 08, 2019 at 06:29:57PM +0300, Konstantin Khlebnikov wrote:
After commit 991f61fe7e1d ("Blk-throttle: reduce tail io latency when iops
limit is enforced") wait time could be zero even if group is throttled and
cannot issue requests right now. As a re
Rename 'lcdif' pixel clock related names to 'disp' names, since:
First, the lcdif pixel clock is not supplied to LCDIF controller
directly, but to some LPCG clock in display mix. So rename it to
'disp' pixel clock is more accurate.
Second, in the imx8mn CCM specification which is designed after
i
On Tue, Jul 09, 2019 at 10:04:16AM +0300, Mark Zhang wrote:
> Hi Stephen,
Stephen,
For some reason, I wasn't in initial email report, can you please check why?
I need to be aware of any issues related to patches with my name on it
for tracking and improving internal submission flows/checks.
>
>
From: Anson Huang
Add opp-suspend property to each OPP, the of opp core will
select the OPP HW supported and with highest rate to be
suspend opp, it will speed up the suspend/resume process.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 3 +++
1 file changed, 3 ins
From: Anson Huang
Add opp-suspend property to each OPP, the of opp core will
select the OPP HW supported and with highest rate to be
suspend opp, it will speed up the suspend/resume process.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 4
1 file changed, 4 in
From: Anson Huang
With property "opp-supported-hw" introduced, the OPP table
in DT could be a large OPP table and ONLY a subset of OPPs
are available, based on the version of the hardware running
on. That introduces restriction of using "opp-suspend"
property to define the suspend OPP, as we are
Hi,
Pawel Laszczak writes:
> IRQF_ONESHOT can be used only in threaded handled.
> "
> * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler
> finished.
> *Used by threaded interrupts which need to keep the
> *irq line
Hello,
> From: Jose Abreu
> Date: Mon, 8 Jul 2019 16:08:07 +
>
> > From: Ilias Apalodimas | Date: Fri, Jul
> > 05, 2019 at 16:24:53
> >
> >> Well ideally we'd like to get the change in before the merge window
> >> ourselves,
> >> since we dont want to remove->re-add the same function in
> > On 7/8/2019 10:55 AM, anson.hu...@nxp.com wrote:
> > > To reduce the suspend/resume latency, CPU's max supported frequency
> > > should be used during low level suspend/resume phase, "opp-suspend"
> > > property is NOT feasible since OPP defined in DT could be NOT
> > > supported according to
On Tue, Jul 9, 2019 at 2:12 PM Thomas Gleixner wrote:
>
> On Tue, 9 Jul 2019, Pingfan Liu wrote:
> > On Mon, Jul 8, 2019 at 5:35 PM Thomas Gleixner wrote:
> > > It can and it does.
> > >
> > > That's the whole point why we bring up all CPUs in the 'nosmt' case and
> > > shut the siblings down aga
Add support for controlling and communicating with mt8183's system
control processor (SCP), using the remoteproc & rpmsg framework.
And also add a cros_ec driver for CrOS EC host command over rpmsg.
The overall structure of the series is:
* remoteproc/mtk_scp.c: Control the start / stop of SCP (Pa
On Sun, 7 Jul 2019 at 23:48, Saravana Kannan wrote:
>
> On Thu, Jul 4, 2019 at 12:12 AM Vincent Guittot
> wrote:
> >
> > On Wed, 3 Jul 2019 at 23:33, Saravana Kannan wrote:
> > >
> > > On Tue, Jul 2, 2019 at 11:45 PM Vincent Guittot
> > > wrote:
> > > >
> > > > On Wed, 3 Jul 2019 at 03:10, Sara
From: Erin Lo
Add a DT binding documentation of SCP for the
MT8183 SoC from Mediatek.
Signed-off-by: Erin Lo
Signed-off-by: Pi-Hsun Shih
Reviewed-by: Rob Herring
---
Changes from v12, v11, v10, v9, v8, v7, v6:
- No change.
Changes from v5:
- Remove dependency on CONFIG_RPMSG_MTK_SCP.
Chan
On 08-07-19, 16:13, Pavel Machek wrote:
> On Mon 2019-07-08 14:58:40, Viresh Kumar wrote:
> > Though it makes me wonder why I didn't hit this thing. I was using the
> > cpu_cooling device the other day, which calls cpufreq_update_policy()
> > very frequently on heat-up. And I had a hair dryer blowi
From: Erin Lo
Add memory table mapping API for other driver to lookup
reserved physical and virtual memory
Signed-off-by: Erin Lo
Signed-off-by: Pi-Hsun Shih
---
Changes from v12:
- Reformat a line to fit 80 character width.
Changes from v11:
- No change.
Changes from v10:
- Fix some type
Add a simple rpmsg support for mt8183 SCP, that use IPI / IPC directly.
Signed-off-by: Pi-Hsun Shih
---
Changes from v12:
- Use strscpy instead of strncpy.
Changes from v11:
- Fix a bug that when rproc_boot fails, the ns_ept won't be properly
destroyed, causing memory leak.
- Add documenta
From: Eddie Huang
Add scp node to mt8183 and mt8183-evb
Signed-off-by: Erin Lo
Signed-off-by: Pi-Hsun Shih
Signed-off-by: Eddie Huang
---
Changes from v12, v11, v10:
- No change.
Changes from v9:
- Remove extra reserve-memory-vpu_share node.
Changes from v8:
- New patch.
---
arch/arm64/
From: Eugen Hristev
WDD value must be always set to max (0xFFF) otherwise the hardware
block will reset the board on the first ping of the watchdog.
Reviewed-by: Guenter Roeck
Signed-off-by: Eugen Hristev
---
drivers/watchdog/sama5d4_wdt.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions
From: Erin Lo
Provide a basic driver to control Cortex M4 co-processor
Signed-off-by: Erin Lo
Signed-off-by: Nicolas Boichat
Signed-off-by: Pi-Hsun Shih
---
Changes from v12:
- Initialize cache before firmware load, to avoid problem while loading
large firmware.
- Disable watchdog before
On Thu, Jun 27, 2019 at 11:27 AM Sebastian Reichel wrote:
>
> Hi,
>
> On Wed, Jun 12, 2019 at 01:44:04AM -0700, Andrey Smirnov wrote:
> > Add code implementing HWMON adapter/compatibility layer to allow
> > expositing various sensors present on power supply devices via HWMON
> > subsystem. This is
>
>
>Hi,
>
>Pawel Laszczak writes:
>> IRQF_ONESHOT can be used only in threaded handled.
>> "
>> * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler
>> finished.
>> *Used by threaded interrupts which need to keep the
>> *
On 7/8/19 11:13 PM, Chris Packham wrote:
> On 9/07/19 8:43 AM, Chris Packham wrote:
>> On 8/07/19 8:18 PM, Eric Dumazet wrote:
>>>
>>>
>>> On 7/8/19 12:53 AM, Chris Packham wrote:
tipc_named_node_up() creates a skb list. It passes the list to
tipc_node_xmit() which has some code paths
This patchstack adjusts the already existing naming for the PHYTEC
phyBOARD-Segin to the PHYTEC naming scheme that is already used with the
phyCORE-i.MX 6 and the phyBOARD-Mira.
Furthermore it introduces some small fixes and adds support for the PHYTEC
phyCORE-i.MX 6ULL which also comes with the p
There is now a PHYTEC phyCORE-i.MX 6UL with eMMC instead of NAND flash
available. The dts filename needs to reflect that to differentiate both.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/Makefile | 2 +-
...l-phytec-segin-ff-rdk.dts => imx6u
Fix node name for the user LEDs to prevent the pinctrl of the phyCORE's
leds node from being overwritten. Also use more generic names for user
LEDs.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 3 +--
arch/arm/boot/dts/imx6ul-phytec-segin-peb-ev
Reduce the drive strength for the MDC, MDIO and TX pins of FEC1 and FEC2
on the phyBOARD-Segin to improve signal quality and EMC. Also disable
internal pull-ups on the MDC and MDIO pins.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 12 ++--
arc
Use the same name scheme for the phyBOARD-Segin and the phyCORE-i.MX
6UL as is used for the PHYTEC phyBOARD-Mira and phyCORE-i.MX 6.
This is only a cosmetic change and there is no functional change
intended.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/Makefile
In addition to the PHYTEC phyCORE-i.MX 6UL the PHYTEC phyBOARD-Segin is
also available with the PHYTEC phyCORE-i.MX 6ULL. So this adds support
for this SOM and its baseboards.
It comes in a full featured option with either NAND flash or eMMC and in
a low cost option only available with NAND flash.
To disable Ethernet interfaces in case they are not populated
make the FEC and Ethernet PHY status configurable in the dts files.
Also change the Ethernet PHYs labels to make them correspond to
the MDIO address.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.d
Move the imx6ul.dtsi include to the dts files so it is easier to reuse
the SOM dtsi for e.g. an i.MX 6ULL SOM.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 1 -
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts | 1 +
2 files changed, 1 insert
The phyCORE-i.MX 6UL/ULL now can have eMMC instead of the NAND flash
memory. Add the eMMC node and disable it by default so it can be enabled
in case it is populated.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 24
1 file chan
The ECSPI interface is available on the expansion connector of every
PHYTEC phyBOARD-Segin. Move its definition to the board include file
for better reuse.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts | 14 --
arch/arm/boot/dts/imx6ul-ph
The phyCORE-i.MX 6UL/ULL now comes either with NAND flash or eMMC. We
have to configure the populated memory type in the device tree files. So
the GPMI node gets disabled by default and only enabled if populated.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.d
From: Ilias Apalodimas | Date: Tue, Jul 09, 2019
at 08:23:56
> The patch from Ivan did get merged, can you change the free call to
> page_pool_destroy and re-spin? You can add my acked-by
Yes, I will re-spin then. Thanks!
---
Thanks,
Jose Miguel Abreu
Changes in v4 (address comments from Masahiro Yamada)
- Use arch from debian/arch and no longer forward it from mkdebian to
builddep since it may be found there
Changes in v3 (address comments from Ben Hutchings)
- add Multi-Arch: same to debian/control for linux-libc-dev
- forward debarc
Debian-based distributions place libc header files in a machine
specific directory (/usr/include/) instead of
/usr/include/asm to support installation of the linux-libc-dev
package from multiple architectures. Move headers installed by
"make headers_install" accordingly using Debian's tuple from
dp
On 7/1/19 9:11 AM, Miquel Raynal wrote:
Hi Christophe,
Christophe Kerello wrote on Fri, 21 Jun
2019 16:43:09 +0200:
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
drivers/mtd/nand/raw/stm32_fmc2_nand.c: In function ‘stm32_fmc2_calc_timings’:
driv
On 09-07-19, 15:10, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> With property "opp-supported-hw" introduced, the OPP table
> in DT could be a large OPP table and ONLY a subset of OPPs
> are available, based on the version of the hardware running
> on. That introduces restriction of using "
On 2019-05-14 16:38, Igor Opaniuk wrote:
> Introduce DTS for Colibri iMX6S/DL V1.1x re-design, where UHS-I support was
> added. Provide proper configuration for VGEN3, which allows that rail to
> be automatically switched to 1.8 volts for proper UHS-I operation mode.
>
> Signed-off-by: Igor Opaniu
Hi, Viresh
> On 09-07-19, 15:10, anson.hu...@nxp.com wrote:
> > From: Anson Huang
> >
> > With property "opp-supported-hw" introduced, the OPP table in DT could
> > be a large OPP table and ONLY a subset of OPPs are available, based on
> > the version of the hardware running on. That introduces r
Hi Felipe,
On Monday, June 24, 2019 13:58, Felipe Balbi wrote:
>
> Hi,
>
> Ran Wang writes:
> >> >> > >> >> > /* Global Debug Queue/FIFO Space Available Register */
> >> >> > >> >> > #define DWC3_GDBGFIFOSPACE_NUM(n)((n) & 0x1f)
> >> >> > >> >> > #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n
Hi Christophe,
Christophe Kerello wrote on Tue, 9 Jul 2019
09:50:10 +0200:
> On 7/1/19 9:11 AM, Miquel Raynal wrote:
> > Hi Christophe,
> >
> > Christophe Kerello wrote on Fri, 21 Jun
> > 2019 16:43:09 +0200:
> >
> >> This patch solves warnings detected by setting W=1 when building.
> >>
>
Some performace improvements (01/03 and 03/03) and a fix (02/03), all for -next.
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: Maxime Ripard
Cc: Chen-Yu Tsai
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.co
On Mon, Jul 08, 2019 at 08:29:26PM -0400, Jon Masters wrote:
> On 7/8/19 8:25 PM, Jon Masters wrote:
> > On 7/2/19 10:45 PM, qi.f...@fujitsu.com wrote:
> >
> >> However, we found that with the increase of that the TLB flash was called,
> >> the noise was also increasing. Here we understood that th
Add support for coalescing RX path by specifying number of frames which
don't need to have interrupt on completion bit set.
This is only available when RX Watchdog is enabled.
Acked-by: Jakub Kicinski
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
C
Mapping and unmapping DMA region is an high bottleneck in stmmac driver,
specially in the RX path.
This commit introduces support for Page Pool API and uses it in all RX
queues. With this change, we get more stable troughput and some increase
of banwidth with iperf:
- MAC1000 - 950 Mbps
Commit a993db88d17d ("net: stmmac: Enable support for > 32 Bits
addressing in XGMAC"), introduced support for > 32 bits addressing in
XGMAC but the conversion of descriptors to dma_addr_t was left out.
As some devices assing coherent memory in regions > 32 bits we need to
set lower and upper value
The cpu variable is still being used in the of_get_property() call
after the of_node_put() call, which may result in use-after-free.
Fixes: a9acc26b75f ("cpufreq/pasemi: fix possible object reference leak")
Signed-off-by: Wen Yang
Cc: "Rafael J. Wysocki"
Cc: Viresh Kumar
Cc: Michael Ellerman
C
From: Anson Huang
Update opp-suspend property's description to support multiple
opp-suspend properties defined in DT, the OPP with highest opp-hz
and with opp-suspend property present will be used as suspend opp.
Signed-off-by: Anson Huang
---
New patch.
---
Documentation/devicetree/bindings/o
From: Anson Huang
With property "opp-supported-hw" introduced, the OPP table
in DT could be a large OPP table and ONLY a subset of OPPs
are available, based on the version of the hardware running
on. That introduces restriction of using "opp-suspend"
property to define the suspend OPP, as we are
From: Anson Huang
Add opp-suspend property to each OPP, the of opp core will
select the OPP HW supported and with highest rate to be
suspend opp, it will speed up the suspend/resume process.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 4
1 fi
From: Anson Huang
Add opp-suspend property to each OPP, the of opp core will
select the OPP HW supported and with highest rate to be
suspend opp, it will speed up the suspend/resume process.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 3 +++
1 fil
kmsg_dump_get_buffer() is supposed to select the youngest log messages
which fit into the provided buffer. When that function determines the
correct start index, by looping and calling msg_print_text() with a NULL
buffer, msg_print_text() calculates a length which would allow the
youngest log mess
On 09-07-19, 16:04, Wen Yang wrote:
> The cpu variable is still being used in the of_get_property() call
> after the of_node_put() call, which may result in use-after-free.
>
> Fixes: a9acc26b75f ("cpufreq/pasemi: fix possible object reference leak")
> Signed-off-by: Wen Yang
> Cc: "Rafael J. Wys
Hi!
> There is no deallocation of fusb300->ep[i] elements, allocated at
> fusb300_probe.
>
> The patch adds deallocation of fusb300->ep array elements.
...
> diff --git a/drivers/usb/gadget/udc/fusb300_udc.c
> b/drivers/usb/gadget/udc/fusb300_udc.c
> index 263804d154a7..00e3f66836a9 100644
> --
On 09-07-19, 16:00, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Update opp-suspend property's description to support multiple
> opp-suspend properties defined in DT, the OPP with highest opp-hz
> and with opp-suspend property present will be used as suspend opp.
>
> Signed-off-by: Anson H
On 09/07/2019 06:59, Shenhar, Talel wrote:
> Marc, should I publish those fixes as new patch that updates the
> dt-bindings or new patchset to this list?
If you are going to update the binding, please submit a patch on top of
mainline, as it's been merged already.
Thanks,
M.
--
Jazz i
Thanks, will do.
On 7/9/2019 11:15 AM, Marc Zyngier wrote:
On 09/07/2019 06:59, Shenhar, Talel wrote:
Marc, should I publish those fixes as new patch that updates the
dt-bindings or new patchset to this list?
If you are going to update the binding, please submit a patch on top of
mainline, as
On Fri, Jul 5, 2019 at 11:58 AM Mika Westerberg
wrote:
>
> Ice Lake Thunderbolt controller includes two new device property
> compatible properties that we need to be able to extract in the driver
> so add them to the growing array of GUIDs.
>
> Signed-off-by: Mika Westerberg
> ---
> drivers/acp
Hi all,
Today's linux-next merge of the char-misc tree got a conflict in:
Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
between commit:
8c21ead3ea5d ("dt-bindings: watchdog: move i.MX system controller watchdog
binding to SCU")
from the watchdog tree and commit:
c2a6ea23a
arm64 shares some code under arch/arm/xen, including mm.c.
However ZONE_DMA is removed by commit
ad67f5a6545("arm64: replace ZONE_DMA with ZONE_DMA32").
So to ARM64, need use __GFP_DMA32.
Signed-off-by: Peng Fan
---
arch/arm/xen/mm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Hi Yamada-san,
On Sun, Apr 7, 2019 at 12:45 PM Masahiro Yamada
wrote:
> After cross-compiling the kernel, "make mrproper" should be executed
> with the proper ARCH= option. Otherwise, stale objects will remain
> under arch/$(SRCARCH)/.
>
> One bad scenario is like this:
>
> $ make ARCH=arm defc
If CONFIG_PM is not set, build warnings:
drivers/dma/tegra210-adma.c:747:12: warning: tegra_adma_runtime_resume defined
but not used [-Wunused-function]
static int tegra_adma_runtime_resume(struct device *dev)
drivers/dma/tegra210-adma.c:715:12: warning: tegra_adma_runtime_suspend defined
but n
On Mon, Jul 8, 2019 at 10:31 PM Arnd Bergmann wrote:
> llvm gets confused by inline asm with .rep directives,
Are the LLVM developers aware of the bug?
It seems like something we can work around but should
eventually be fixed properly in LLVM, right?
> which
> can lead to miscalculating the num
Hi,
Considering i have arch/arm/configs/abc_defconfig, I can run "make
abc_defconfig" repeatedly, and always get output
# configuration written to .config
or
# No change to .config
But if I now change arch/arm/configs/abc_defconfig, even just the
modification date, then "make abc_defconfig" no
-"Leon Romanovsky" wrote: -
>To: "Stephen Rothwell"
>From: "Leon Romanovsky"
>Date: 07/09/2019 08:43AM
>Cc: "Doug Ledford" , "Jason Gunthorpe"
>, "David Miller" ,
>"Networking" , "Linux Next Mailing List"
>, "Linux Kernel Mailing List"
>, "Bernard Metzler"
>
>Subject: [EXTERNAL] Re: lin
On Tue 2019-07-09 03:34:43, John Ogness wrote:
> On 2019-07-08, Petr Mladek wrote:
> >> 1. The code claims that the cmpxchg(seq_newest) in prb_reserve_desc()
> >> guarantees that "The descriptor is ours until the COMMITTED bit is
> >> set." This is not true if in that wind seq_newest wraps, allow
On Tue, 9 Jul 2019 at 00:48, Douglas Anderson wrote:
>
> In commit 46d179525a1f ("mmc: dw_mmc: Wait for data transfer after
> response errors.") we fixed a tuning-induced hang that I saw when
> stress testing tuning on certain SD cards. I won't re-hash that whole
> commit, but the summary is that
Hi Rob,
On Mon, 2019-07-08 at 16:30 -0600, Rob Herring wrote:
> On Tue, Jun 04, 2019 at 07:39:14PM +0800, min@mediatek.com wrote:
> > From: Min Guo
> >
> > This adds support for MediaTek musb controller in
> > host, peripheral and otg mode.
> >
> > Signed-off-by: Min Guo
> > ---
> > changes
On Thu, Jun 27, 2019 at 11:33 PM Doug Berger wrote:
> A timing hazard exists when an early fork/exec thread begins
> exiting and sets its mm pointer to NULL while a separate core
> tries to update the section information.
>
> This commit ensures that the mm pointer is not NULL before
> setting it
On Tue, Jul 09, 2019 at 10:41:05AM +0200, Linus Walleij wrote:
> I guess this brings up the old question whether the compiler should
> be worked around or just considered immature, but as it happens this
> other day I was grep:ing around to find "the 8 NOP" that is so
> compulsively inserted in ARM
On Mon 01-07-19 16:35:00, Minchan Kim wrote:
> >From 39df9f94e6204b8893f3f3feb692745657392657 Mon Sep 17 00:00:00 2001
> From: Minchan Kim
> Date: Fri, 24 May 2019 13:47:54 +0900
> Subject: [PATCH v3 1/5] mm: introduce MADV_COLD
>
> When a process expects no accesses to a certain memory range, it
checkpatch.pl complains when adding executable "debian/rules",
obviously a false alarm. Therefore add an exception for that.
Signed-off-by: Enrico Weigelt, metux IT consult
---
scripts/checkpatch.pl | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
Add new environment variable KDEB_RULES for controlling where the
generated debian rules are written to. By defaults, it's debian/rules,
but packagers might override it for providing their own rules file.
Signed-off-by: Enrico Weigelt, metux IT consult
---
scripts/package/mkdebian | 5 -
1 f
Adding a generic debian rule file, so we can build the directly
via usual Debian package build tools (eg. git-buildpackage,
dck-buildpackage, etc). It expects the .config file already
placed in the source tree.
The rule file contains a rule for creating debian/control and
other metadata - this is
trivial rule to print out the kernel arch and localversion, so
external tools, like distro packagers, can easily get it.
Signed-off-by: Enrico Weigelt, metux IT consult
---
Makefile | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Makefile b/Makefile
index 3e4868a..5afc3de 100644
--- a/
On Sun, 7 Jul 2019 14:57:36 +0300
Hanna Hawa wrote:
> Adds support for Amazon's Annapurna Labs L1 EDAC driver to detect and
> report L1 errors.
>
> Signed-off-by: Hanna Hawa
A quick drive by review as I was feeling curious.
Just a couple of trivial queries and observation on the fact it
might
Hello!
On 09.07.2019 6:31, Jiangfeng Xiao wrote:
HI13X1_GMAC delete request for soft reset at first,
otherwise, the subsequent initialization will not
take effect.
Signed-off-by: Jiangfeng Xiao
---
drivers/net/ethernet/hisilicon/hip04_eth.c | 24
1 file changed, 24
On Thu 27-06-19 20:54:03, Minchan Kim wrote:
> The isolate counting is pecpu counter so it would be not huge gain
> to work them by batch. Rather than complicating to make them batch,
> let's make it more stright-foward via adding the counting logic
> into [isolate|putback]_lru_page API.
>
> * v1
On Tue, Jul 09, 2019 at 11:04:21AM +0800, Wei Wang wrote:
> On 07/08/2019 10:48 PM, Peter Zijlstra wrote:
> > *WHY* does the host need to save/restore? Why not make VMENTER/VMEXIT do
> > this?
>
> Because the VMX transition is much more frequent than the vCPU switching.
> On SKL, saving 32 LBR en
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
drivers/mtd/nand/raw/stm32_fmc2_nand.c: In function ‘stm32_fmc2_calc_timings’:
drivers/mtd/nand/raw/stm32_fmc2_nand.c:1417:23: warning: comparison is
always false due to limited range of data type [-Wtype-lim
On Tue, Jul 09, 2019 at 10:58:46AM +0800, Wei Wang wrote:
> On 07/08/2019 10:29 PM, Peter Zijlstra wrote:
>
> Thanks for the comments.
>
> >
> > > diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> > > index 0ab99c7..19e6593 100644
> > > --- a/include/linux/perf_event.h
> > >
Le samedi 22 juin 2019 à 11:21 +0100, Jonathan Cameron a écrit :
> On Tue, 18 Jun 2019 11:06:39 +0200
> Fabien Lahoudere wrote:
>
> > The documentation give some exemple on what format can be expected
> > from sampling_frequency_available sysfs attribute
> >
> > Signed-off-by: Fabien Lahoudere
Welcome to Atm card payment center Benin Republic'
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Hi all,
Today's linux-next merge of the hyperv tree got a conflict in:
arch/x86/include/asm/mshyperv.h
between commit:
dd2cb348613b ("clocksource/drivers: Continue making Hyper-V clocksource ISA
agnostic")
from Linus' tree and commit:
765e33f5211a ("Drivers: hv: vmbus: Break out ISA in
On Thu 27-06-19 20:54:04, Minchan Kim wrote:
> When a process expects no accesses to a certain memory range
> for a long time, it could hint kernel that the pages can be
> reclaimed instantly but data should be preserved for future use.
> This could reduce workingset eviction so it ends up increasi
Hi Rob,
> -Original Message-
> From: openbmc
> [mailto:openbmc-bounces+george.hung=quantatw@lists.ozlabs.org] On
> Behalf Of Rob Herring
> Sent: Tuesday, July 09, 2019 9:41 AM
> To: George Hung
> Cc: Mark Rutland; Linus Walleij; Tali Perry; paul...@linux.ibm.com;
> w...@google.com; be
There are several reports that the BUG_ON on unsupported command in
mv_qc_prep can be triggered under some circumstances:
https://bugzilla.suse.com/show_bug.cgi?id=1110252
https://serverfault.com/questions/97/raid-problems-after-power-outage
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/
ata_qc_prep no longer exists, there are ata_bmdma_qc_prep and
ata_bmdma_dumb_qc_prep instead. And most drivers do not use them, so
reword the paragraph.
ata_qc_issue_prot was renamed to ata_sff_qc_issue. ->tf_load is now
->sff_tf_load. Fix them.
And fix spelling supercede -> supersede.
Signed-of
In case a driver wants to return an error. sata_mv is one of those --
see the next patch.
Signed-off-by: Jiri Slaby
Cc: Jens Axboe
Cc: linux-...@vger.kernel.org
---
Documentation/driver-api/libata.rst | 2 +-
drivers/ata/acard-ahci.c| 6 --
drivers/ata/libahci.c
On 08/07/2019 00:12, Dmitry Osipenko wrote:
> The I2C driver fails to probe if CONFIG_PM_SLEEP=n because runtime PM
> doesn't depend on the PM sleep and in this case the runtime PM ops are
> not included in the driver, resulting in I2C clock not being enabled.
> It's much cleaner to simply allow
On (07/09/19 10:10), Vincent Whitchurch wrote:
> A dump of a 64-byte buffer filled by kmsg_dump_get_buffer(), before this
> patch:
>
> : 3c 30 3e 5b 20 20 20 20 36 2e 35 32 32 31 39 37 <0>[6.522197
> 0010: 5d 20 41 41 41 41 41 41 41 41 41 41 41 41 41 0a ] A.
>
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