From: Chen Hu
Hi Rafael,
I run several popular Android performance benchmarks on teov7, using kernel
4.19.0 as my baseline because I happen to work on it. To backport teov7 to
kernel 4.19.0, I also backport patch 5f26bdc: "cpuidle: menu: Fix wakeup
statistics updates for polling state". The teov
Hi Schrempf, Clément,
Schrempf Frieder wrote on Mon, 3 Dec 2018
08:01:38 +:
> From: Frieder Schrempf
>
> When reading the status of the on-chip ECC, the Toshiba chip returns
> two different states for reporting corrected bitflips. We should check
> for both of them.
>
> Also return the fr
Hi all,
Changes since 20181206:
The arm64 tree gained a conflict against Linus' tree.
The risc-v tree gained a conflict against the dma-mapping tree.
The jc_docs tree gained a conflict against the fscrypt tree.
The thermal tree gained a build failure so I used the version from
next-20181206.
Hi Tony,
Tony Lindgren wrote on Fri, 23 Nov 2018 09:03:33
-0800:
> * Boris Brezillon [181121 14:56]:
> > On Wed, 21 Nov 2018 12:08:02 +0100
> > Janusz Krzysztofik wrote:
> >
> > > Finalize implementation of the idea suggested by Artem Bityutskiy and
> > > Tony Lindgren, described in commit
On Thu 06-12-18 14:00:20, David Rientjes wrote:
> This reverts commit 89c83fb539f95491be80cdd5158e6f0ce329e317.
>
> There are a couple of issues with 89c83fb539f9 independent of its partial
> revert in 2f0799a0ffc0 ("mm, thp: restore node-local hugepage
> allocations"):
>
> Firstly, the interac
Add binding documentation for mmc host controllers present on TI's AM654
SOCs.
Signed-off-by: Faiz Abbas
---
.../devicetree/bindings/mmc/sdhci-am654.txt | 37 +++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-am654.txt
diff --
Commit 26a4f38d1316 ("dt-bindings: mmc: sdhci-of-arasan: Add new
compatible for AM654 MMC PHY") added a new compatible for supporting
controllers on TI's AM65x SOCs. It turns out that the controller is
not compatible with the arasan driver's phy and consumer model as it
requires some phy registers
The host controllers on TI's AM654 SOCs are not compatible with
the phy and consumer model of the sdhci-of-arasan driver. It turns out
that for optimal operation at higher speeds, a special tuning procedure
needs to be implemented which involves configuration of platform
specific phy registers.
Th
The following patches add driver support for MMCSD on TI's AM654
platforms.
Previously I had added the support to sdhci-of-arasan driver with
a separate phy driver[1]. Since then it has turned out that tuning
operation (for HS200, HS400 and SDR104 speed modes) will require
configuration of phy reg
On 2018-12-06 21:07:22 [+0100], Borislav Petkov wrote:
> > @@ -314,41 +312,34 @@ static int __fpu__restore_sig(void __user *buf, void
> > __user *buf_fx, int size)
> > * thread's fpu state, reconstruct fxstate from the fsave
> > * header. Validate and sanitize the copied
On Fri, Dec 7, 2018 at 9:00 AM Chen, Hu wrote:
>
> From: Chen Hu
>
> Hi Rafael,
>
> I run several popular Android performance benchmarks on teov7, using kernel
> 4.19.0 as my baseline because I happen to work on it. To backport teov7 to
> kernel 4.19.0, I also backport patch 5f26bdc: "cpuidle: me
On Thu, 6 Dec 2018 at 20:11, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.19.8 release.
> There are 41 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Respo
On Fri, Nov 30, 2018 at 3:45 AM Evan Green wrote:
>
> Move #clock-cells into the child node and set it to 0 to conform to the
> proper binding specification.
>
> Signed-off-by: Evan Green
> ---
>
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-
On Fri, Nov 30, 2018 at 3:46 AM Evan Green wrote:
>
> Register a simple clock provider for the PHY pipe clock sources so that
> device tree users can point at these clocks via phandles to the lane
> nodes.
>
> Signed-off-by: Evan Green
> ---
>
> drivers/phy/qualcomm/phy-qcom-qmp.c | 23 +
Dear,
Please accept my apologies I do not intend to invade your privacy, I
wrote to you earlier, but no answer, in my first post I told you about
my late client who bears the same surname with you, I received
several letters from the bank, where he made a deposit of 7.2 million
Euros before his
On 12/06/2018 06:25 PM, Catalin Marinas wrote:
On Mon, Dec 03, 2018 at 01:55:18PM +, Julien Thierry wrote:
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 07c3408..cabfcae 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uac
On Thu, 6 Dec 2018 at 20:12, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.87 release.
> There are 55 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Resp
The following patches add dt support for MMCSD on the AM65x-evm.
THe series depends on driver support[1] and pinmux support[2] posted
separately.
[1] https://patchwork.kernel.org/project/linux-mmc/list/?series=53185
[2] https://lore.kernel.org/patchwork/project/lkml/list/?series=372649
Faiz Abba
On the am654x-evm, sdhci0 node is connected to an eMMC while sdhci1
is connected to an SD card slot. Add nodes and pinmuxes for the same.
Signed-off-by: Faiz Abbas
---
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 46 +++
1 file changed, 46 insertions(+)
diff --git a/arch/arm6
There are two MMC host controller instances present on the TI's
Am654 SOCs. Add device tree nodes for the same.
Signed-off-by: Faiz Abbas
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main
From: Srinivas Kandagatla
gpll0_out_main parent is cxo so fix it.
Fixes: 652f1813c113 ("clk: qcom: gcc: Add global clock controller driver for
QCS404")
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
v2: add qc404 in title and review tag by Bjor
On Thu, 6 Dec 2018 at 22:59, Stephen Boyd wrote:
>
> This flag doesn't look to be used by any code, just set in the clk init
> structure and then never tested again. Remove it from this drivers as it
> doesn't provide any benefit.
>
> Cc: Kukjin Kim
> Cc: Krzysztof Kozlowski
> Cc: Sylwester Nawr
On Thu, Dec 06, 2018 at 01:19:46PM -0500, Steven Rostedt wrote:
> On Thu, 6 Dec 2018 09:34:00 +0100
> Peter Zijlstra wrote:
>
> > >
> > > I don't understand this.. why are we using schedule_timeout() and all
> > > that?
> >
> > Urgh.. in fact, the more I look at this the more I hate it.
> >
On Fri, Dec 7, 2018 at 5:06 AM Evan Green wrote:
>
> Utilize the newly fixed up DT bindings to get the tx2 and rx2 register
> regions for the second lane of dual-lane PHYs. Before this change,
> the driver was simply using lane one's register region and adding
> 0x400, which reached well beyond th
The register range for the RTC extends beyond 0x54.
Use the size from the user manual's memory map instead.
Fixes: 9765d2d94309 ("rtc: sun6i: Add sun6i RTC driver")
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 2 +-
1 file changed, 1 insertion(+), 1 delet
applied. But please do remember to send the patches to linux-pm mailing
list next time so that I can catch them via patchwork.
thanks,
rui
On 五, 2018-12-07 at 12:25 +0530, Amit Kucheria wrote:
> (Apologies for the build failure. My scripts to enable these configs
> and
> build-test them failed. T
Introduce _SPLIT_ and/or _PACKED_ variants for VRING_DESC_F_*,
VRING_AVAIL_F_NO_INTERRUPT and VRING_USED_F_NO_NOTIFY. These
variants are defined as shifts instead of shifted values for
consistency with other _F_ flags.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Tiwei Bie
---
include/uapi/l
On Thu, Dec 06, 2018 at 10:38:00AM -0500, Waiman Long wrote:
> On 12/06/2018 03:41 AM, Peter Zijlstra wrote:
> > On Wed, Dec 05, 2018 at 02:49:28PM -0500, Waiman Long wrote:
> >> Since conditional STIBP is the default, it should be treated as
> >> the likely case. Changes the use of static_branch_u
On Thu, Dec 06, 2018 at 01:19:46PM -0500, Steven Rostedt wrote:
> On Thu, 6 Dec 2018 09:34:00 +0100
> Peter Zijlstra wrote:
>
> > >
> > > I don't understand this.. why are we using schedule_timeout() and all
> > > that?
> >
> > Urgh.. in fact, the more I look at this the more I hate it.
> >
Hi Tudor,
On Thu, 6 Dec 2018 14:43:39 +
wrote:
> /**
> * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
> * @nor: pointer to a 'struct spi_nor'
> @@ -3276,6 +3462,10 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor,
> err = s
On 06/12/2018 14:37, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.144 release.
> There are 101 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
This patch supports dynamic generate got and plt sections mechanism on
rv32. It contains the modification as follows:
- Always enable MODULE_SECTIONS (both rv64 and rv32)
- Change the fixed size type.
This patch had been tested by following modules:
btrfs 6795991 0 - Live 0xa544b000
test_static
On 12/7/18 8:49 AM, Michal Hocko wrote:
>> But *that* in turn makes for other possible questions:
>>
>> - if the reason we couldn't get a local hugepage is that we're simply
>> out of local memory (huge *or* small), then maybe a remote hugepage is
>> better.
>>
>>Note that this now implies tha
Hi Christophe,
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
> +/* FMC2 Controller Registers */
> +#define FMC2_BCR1 0x0
> +#define FMC2_PCR 0x80
(...)
> +/* Register: FMC2_BCR1 */
> +#define FMC2_BCR1_FMC2EN BIT(31)
Well this
>From the da7219 spec, the button A, B, C and D are remapped to
0, 1, 2 and 3 respectively where button A is KEY_PLAYPAUSE,
B is KEY_VOLUMEUP, C is KEY_VOLUMEDOWN and D is KEY_VOICECOMMAND
Change-Id: I67f929f226883bd289cb7beb0a7b23f40e7121e2
Signed-off-by: Zhuohao Lee
Signed-off-by: Max Chang
-
On Thu, 6 Dec 2018 at 20:15, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.9.144 release.
> There are 101 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
> Hi Jian Hong,
>
> I call our agent guy @ WTMEC.
> Please modify as bellowing then test again.
> Remove EAPD control by hidden.
> If this modify patch was pass audio test, please regenerate patch to Takashi.
> If this patch will solve the speaker no sound issue, I think the model name
> maybe cou
Hi Maxime
On Fri, Dec 7, 2018 at 8:47 AM Maxime Ripard wrote:
>
> On Thu, Dec 06, 2018 at 06:07:59PM +0100, Michael Nazzareno Trimarchi wrote:
> > On Thu, Dec 6, 2018 at 4:34 PM Maxime Ripard
> > wrote:
> > > On Thu, Dec 06, 2018 at 06:53:05PM +0530, Jagan Teki wrote:
> > > > Allwinner A64 CSI
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
> This patch adds the manual mode, a basic mode that do not need
> any DMA channels. This mode is also useful for debug purpose.
>
> Signed-off-by: Christophe Kerello
This is a bit of drive-by comment, but "manual mode" usually
means the
Add Realtek ALC294 quirks for ASUS X542UN, UX533FD, UX433FN and UX333FA laptops.
Chris Chiu (1):
ALSA: hda/realtek: ALC294 mic and headset-mode fixups for ASUS X542UN
Jian-Hong Pan (2):
ALSA: hda/realtek: Enable audio jacks of ASUS UX533FD with ALC294
ALSA: hda/realtek: Enable audio jacks o
From: Chris Chiu
The known ALC256_FIXUP_ASUS_MIC fixup can fix the headphone jack
sensing and enable use of the internal microphone on this laptop
X542UN. However, it's ALC294 so create a new fixup named
ALC294_FIXUP_ASUS_MIC to avoid confusion.
Signed-off-by: Jian-Hong Pan
Signed-off-by: Danie
The ASUS UX433FN and UX333FA with ALC294 cannot detect the headset MIC
and output through the internal speaker and the headphone until
ALC294_FIXUP_ASUS_SPK and ALC294_FIXUP_ASUS_HEADSET_MIC quirk applied.
Signed-off-by: Daniel Drake
Signed-off-by: Jian-Hong Pan
---
v2:
- Add UX333FA support. A
The ASUS UX533FD with ALC294 cannot detect the headset MIC and outputs
through the internal speaker and the headphone until
ALC294_FIXUP_ASUS_SPK and ALC294_FIXUP_ASUS_HEADSET_MIC quirk applied.
Signed-off-by: Daniel Drake
Signed-off-by: Jian-Hong Pan
---
v2:
- Modify the HDA verbs for UX333FA s
On 6/12/18 7:01 PM, Arnaldo Carvalho de Melo wrote:
> Em Mon, Nov 19, 2018 at 09:06:17PM -0800, Andi Kleen escreveu:
>> From: Andi Kleen
>>
>> This is a fix for another instance of the skid problem Milian
>> recently found [1]
>
> Milian, have you tested this?
>
> Adrian, can I have your Reviewe
On Sat, Nov 24, 2018 at 5:34 PM Nicholas Mc Guire wrote:
> devm_kasprintf() may return NULL on failure of internal allocation
> thus the assignments are not safe if not checked. On error
> rza1_pinctrl_register() respectively rza1_parse_gpiochip() return
> negative values so -ENOMEM in the (unlik
Hi Jianxin,
Looks good to me overall, a few comments inline.
Jianxin Pan wrote on Sat, 17 Nov 2018
00:40:38 +0800:
> From: Liang Yang
>
> Add initial support for the Amlogic NAND flash controller which found
> in the Meson-GXBB/GXL/AXG SoCs.
>
> Signed-off-by: Liang Yang
> Signed-off-by: Yi
On Mon, Nov 26, 2018 at 9:16 AM Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> I'll be getting all GPIO e-mail now, so remove my name from reviewers
> of gpio-mockup.
>
> Signed-off-by: Bartosz Golaszewski
It doesn't hurt but OK, patch applied!
Yours,
Linus Walleij
On Fri, Dec 07, 2018 at 07:14:10AM +0100, Oscar Salvador wrote:
>
>> > +
>>
>> This one maybe not necessary.
>
>Yeah, that is a remind of an include file I used for time measurement.
>I hope Andrew can drop that if this is taken.
>
>> > /*
>> > * Kmemleak configuration and common defines.
>> > *
On 07.12.18 06:46, Yogesh Narayan Gaur wrote:
> Hi Frieder,
>
>> -Original Message-
>> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
>> Sent: Tuesday, December 4, 2018 7:45 PM
>> To: linux-...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
>> s...@vger.kernel.org; M
On 07/12/2018 16:47:19+0800, Chen-Yu Tsai wrote:
> The register range for the RTC extends beyond 0x54.
> Use the size from the user manual's memory map instead.
>
> Fixes: 9765d2d94309 ("rtc: sun6i: Add sun6i RTC driver")
> Signed-off-by: Chen-Yu Tsai
> ---
> Documentation/devicetree/bindings/rt
On 11/14/2018 02:55 PM, Liu Xiang wrote:
> The is25lp256 supports 4-byte opcodes and quad output.
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Liu Xiang
Reviewed-by: Tudor Ambarus
> ---
> drivers/mtd/spi-nor/spi-nor.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
Hi Fabio,
> Hi Lukasz,
>
> On Thu, Dec 6, 2018 at 11:08 AM Lukasz Majewski wrote:
>
> > I will check this latter this week...
>
> Reading the spi dt-binding it states that the spi slave node is
> optional.
>
> If I remove it like this, then the warning is gone:
Unfortunately, the "slave" n
Hi Miquèl,
On 07.12.18 09:00, Miquel Raynal wrote:
> Hi Schrempf, Clément,
>
> Schrempf Frieder wrote on Mon, 3 Dec 2018
> 08:01:38 +:
>
>> From: Frieder Schrempf
>>
>> When reading the status of the on-chip ECC, the Toshiba chip returns
>> two different states for reporting corrected bitf
Hi Nicholas,
On Sat, Nov 24, 2018 at 5:35 PM Nicholas Mc Guire wrote:
> devm_kasprintf() may return NULL on failure of internal allocation
> thus the assignments are not safe if not checked. On error
> rza1_pinctrl_register() respectively rza1_parse_gpiochip() return
> negative values so -ENOMEM
On Fri, 7 Dec 2018, Peter Zijlstra wrote:
> On Thu, Dec 06, 2018 at 10:38:00AM -0500, Waiman Long wrote:
> > On 12/06/2018 03:41 AM, Peter Zijlstra wrote:
> > > On Wed, Dec 05, 2018 at 02:49:28PM -0500, Waiman Long wrote:
> > >> Since conditional STIBP is the default, it should be treated as
> > >>
Hi Nicholas, Linus,
I'm sorry I might have missed this
On Sat, Nov 24, 2018 at 05:30:33PM +0100, Nicholas Mc Guire wrote:
> devm_kasprintf() may return NULL on failure of internal allocation
> thus the assignments are not safe if not checked. On error
> rza1_pinctrl_register() respectively rza1
On 06/12/2018 11:36:59+0100, Geert Uytterhoeven wrote:
> > +The following properties may not be supported by all drivers. However, if a
> > +driver wants to support one of the below features, it should adapt the
> > bindings
> > +below.
> > +- trickle-resistor-ohms : Selected resistor for trickle
On 06/12/2018 14:38, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.87 release.
> There are 55 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
Add DT entry for ECAP0 PWM node present in main domain
Signed-off-by: Vignesh R
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 916434839603..0a0a8
Couple of patches to add ECAP PWM support for AM654 SoC. Based on top of
git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux.git
4.20-rc1-am65x-queue
Vignesh R (2):
arm64: dts: ti: k3-am65-main: Add ECAP PWM node
arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
arch/arm64/boot/dt
Enable ECAP PWM which is used for LCD backlight.
Signed-off-by: Vignesh R
---
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index bd5
Hi Chen,
On Friday 07 Dec 2018 at 15:58:35 (+0800), Chen, Hu wrote:
> From: Chen Hu
>
> Hi Rafael,
>
> I run several popular Android performance benchmarks on teov7, using kernel
> 4.19.0 as my baseline because I happen to work on it. To backport teov7 to
> kernel 4.19.0, I also backport patch
Hi Schrempf, Clement,
Schrempf Frieder wrote on Fri, 7 Dec 2018
09:31:47 +:
> Hi Miquèl,
>
> On 07.12.18 09:00, Miquel Raynal wrote:
> > Hi Schrempf, Clément,
> >
> > Schrempf Frieder wrote on Mon, 3 Dec 2018
> > 08:01:38 +:
> >
> >> From: Frieder Schrempf
> >>
> >> When reading t
On Fri, Dec 7, 2018 at 3:53 PM Michal Hocko wrote:
>
> On Fri 07-12-18 10:56:51, Pingfan Liu wrote:
> [...]
> > In a short word, the fix method should consider about the two factors:
> > semantic of online-node and the effect on all archs
>
> I am pretty sure there is a lot of room for unification
Hi Jianxin,
Miquel Raynal wrote on Fri, 7 Dec 2018
10:24:56 +0100:
> Hi Jianxin,
>
> Looks good to me overall, a few comments inline.
>
> Jianxin Pan wrote on Sat, 17 Nov 2018
> 00:40:38 +0800:
>
> > From: Liang Yang
> >
> > Add initial support for the Amlogic NAND flash controller which f
On Wed, Nov 21, 2018 at 7:12 PM Nicholas Mc Guire wrote:
> kasprintf() may return NULL on failure of internal allocation thus the
> assigned label is not safe if not explicitly checked. On error
> mediatek_gpio_bank_probe() returns negative values so -ENOMEM in the
> (unlikely) failure case sho
Hi Alexandre,
On Fri, Dec 7, 2018 at 10:34 AM Alexandre Belloni
wrote:
> On 06/12/2018 11:36:59+0100, Geert Uytterhoeven wrote:
> > > +The following properties may not be supported by all drivers. However,
> > > if a
> > > +driver wants to support one of the below features, it should adapt the
On Tue, Nov 27, 2018 at 6:06 PM Nicholas Mc Guire wrote:
> The error cases of mediatek_gpio_bank_probe() would go unnoticed (except
> for the dev_err() messages). The probe function should return an error
> if one of the banks failed to initialize properly indicated by
> not returning non-0.
>
>
On Thu, Dec 06, 2018 at 02:19:18PM +0100, Oscar Salvador wrote:
> kmemleak_scan() goes through all online nodes and tries
> to scan all used pages.
> We can do better and use pfn_to_online_page(), so in case we have
> CONFIG_MEMORY_HOTPLUG, offlined pages will be skiped automatically.
> For boxes w
When kernel panic happens, it will first print the panic call stack,
then the ending msg like:
[ 35.743249] ---[ end Kernel panic - not syncing: Fatal exception
[ 35.749975] [ cut here ]
The above message are very useful for debugging.
But if system is configured to n
On Thu, Dec 6, 2018 at 9:54 PM Michal Simek wrote:
>
> On 06. 12. 18 6:27, Masahiro Yamada wrote:
> > Hi Michal,
> >
> > On Thu, Dec 6, 2018 at 12:41 AM Michal Simek wrote:
> >>
> >> On 03. 12. 18 8:50, Masahiro Yamada wrote:
> >>> "make ARCH=microblaze help" mentions simpleImage..unstrip,
> >>>
On Fri 30-11-18 14:58:10, Josef Bacik wrote:
> If we do not have a page at filemap_fault time we'll do this weird
> forced page_cache_read thing to populate the page, and then drop it
> again and loop around and find it. This makes for 2 ways we can read a
> page in filemap_fault, and it's not rea
hi,
[kernel-4.9, kernel-4.14]
When preemption disable in schedule(),
Current linux design will panic when panic_on_warn=1
However,
default setting, panic_on_warn=0, and
if panic_on_warn=1 , and call panic() after printing out WARN()
location. It affects too much cases.
Could p
ROHM bd71837 and bd71847 contain 32768Hz clock gate. Support the clock
using generic clock framework. Note, only bd71837 is tested but bd71847
should be identical what comes to clk parts.
Signed-off-by: Matti Vaittinen
---
This is a split from series
https://lore.kernel.org/linux-clk/20181204114
On Thu, 2018-12-06 at 14:08 -0800, Stephen Boyd wrote:
> Sorry this email is long.
I tried reply the best I could to your use cases
>
> TL;DR is that I don't think we need to revert the patch as you suggest.
> Instead, we should fix the driver to indicate NULL as the parent name of
> the index i
i.MX7ULP has a Cortex-A7 CPU which can run in RUN mode
or HSRUN mode, it is controlled in SMC1 module. The RUN
mode and HSRUN mode will use different clock source for
ARM, "divcore" for RUN mode and "hsrun_divcore" for HSRUN
mode, so the control bits in SMC1 module can be abstracted
as a HW clock m
There are HSRUN mode clock mux and divider in SCG1 module,
and SMC1 can control i.MX7ULP CPU to run in RUN mode or
HSRUN mode, the mode switch bits are actually a clock mux,
add these clocks for clock driver and dtb to use.
Signed-off-by: Anson Huang
---
include/dt-bindings/clock/imx7ulp-clock.h
i.MX7ULP can switch CPU between RUN mode and HSRUN mode
by programming SMC1 register, different clock sources
will be used for CPU in different modes, so SMC1 can be
abstracted as a clock controller for CPU clock switch,
this patch adds support for it.
Signed-off-by: Anson Huang
---
This patch is
Hi Greg and Evan,
On 12/6/18 16:55, Greg KH wrote:
> On Wed, Dec 05, 2018 at 12:41:35PM -0800, Evan Green wrote:
>> On Tue, Nov 27, 2018 at 10:03 AM Georgi Djakov
>> wrote:
>>>
>>> Modern SoCs have multiple processors and various dedicated cores (video,
>>> gpu,
>>> graphics, modem). These core
On Thu, Nov 29, 2018 at 2:31 PM Linus Walleij wrote:
> This addresses a bug in the irqchip core that was triggered
> by new code assuming a strict semantic order of the irqchip
> calls:
>
> .irq_request_resources()
> .irq_enable()
> .irq_disable()
> .irq_release_resources()
>
> Mostly this is
This reverts the main change of commit bff23714bc36 ("leds: leds-gpio:
Set of_node for created LED devices") because of_node assignment is
handled by core since commit 7ea79ae86c28 ("leds: gpio: use OF variant
of LED registering function"). Basically the code was overwriting the
of_node with same
On Fri, Nov 30, 2018 at 5:22 PM Yangtao Li wrote:
> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>
> Signed-off-by: Yangtao Li
Patch applied.
Yours,
Linus Walleij
On Fri, Nov 30, 2018 at 5:36 PM Yangtao Li wrote:
> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>
> Signed-off-by: Yangtao Li
Patch applied.
Yours,
Linus Walleij
Set "nvidia,thermtrips" property, it used to set
HW shutdown temperatures.
Signed-off-by: Wei Ni
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts/nvidia
Currently the critical trip points in thermal framework are the only
way to specify a temperature at which HW should shutdown. This is
insufficient for certain platforms which would want an orderly
software shutdown in addition to HW shutdown.
This change support to parse "nvidia, thermtrips" prop
Add optional property "nvidia,thermtrips".
If present, these trips will be used as HW shutdown trips,
and critical trips will be used as SW shutdown trips.
Signed-off-by: Wei Ni
---
.../bindings/thermal/nvidia,tegra124-soctherm.txt| 20 +---
1 file changed, 17 insertions(+),
Add "nvidia,thermtrip" property to implement HW and SW
shutdown.
Wei Ni (3):
of: add nvidia,thermtrips property
thermal: tegra: support hw and sw shutdown
arm64: dts: tegra210: set thermtrip
.../bindings/thermal/nvidia,tegra124-soctherm.txt | 20 -
arch/arm64/boot/dts/nvidia/tegra210.
On Sat, Dec 1, 2018 at 1:03 PM Nicholas Mc Guire wrote:
> devm_kzalloc(), devm_kstrdup() and devm_kasprintf() all can
> fail internal allocation and return NULL. Using any of the assigned
> objects without checking is not safe. As this is early in the boot
> phase and these allocations really sho
On Sat, Dec 1, 2018 at 5:56 PM Jonathan Cameron wrote:
> +CC Linus Walleij as one of his files doesn't have a license...
Sorry about that. I am fine with GPL-2.0 or GPL-2.0+ on
any of "my" files. Feel free to add it with my Acked-by.
Yours,
Linus Walleij
Hi Christophe,
Christophe Kerello wrote on Thu, 29 Nov
2018 17:41:02 +0100:
> The driver adds the support for the STMicroelectronics FMC2 NAND
> Controller found on STM32MP SOCs.
>
> This patch is based on FMC2 command sequencer.
> The purpose of the command sequencer is to facilitate the progr
On Thu, Dec 06, 2018 at 11:12:31AM -0800, ndesaulni...@google.com wrote:
> These are implied by the target architecture and for x86_64 match the
> max-page-size. The default for non-NaCl x86_64 is 0x1000 (4096).
>
> In bfd the common page size is defined as 0x1000 (4096) for non-NaCl
Sodium Chlor
On Fri, Dec 07, 2018 at 09:17:13AM +0100, Sebastian Andrzej Siewior wrote:
> You mean:
> struct user_i387_ia32_struct env;
> +union fpregs_state *state;
> +void *tmp;
> int err = 0;
> ?
Yap.
Thx.
--
Regards/Gruss,
Boris.
Good mailing pr
This is trival fix for lib/kobject_uevent.c file.
Bo YU (2):
kobject: use pr_warn to replace printk
kobject: drop newline from msg string
lib/kobject_uevent.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
--
2.11.0
This is a fix to replace printk with pr_warn
Signed-off-by: Bo YU
---
lib/kobject_uevent.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/kobject_uevent.c b/lib/kobject_uevent.c
index 63d0816ab23b..b7c088c902a2 100644
--- a/lib/kobject_uevent.c
+++ b/lib/kobject_uevent.c
On Thu, Dec 06, 2018 at 05:11:40PM -0800, Bart Van Assche wrote:
> The next patch in this series uses the class name in code that
> detects calls to lock_acquire() while a class key is being freed. Hence
> retain the class name for lock classes that are being freed.
>From readin the discussion wit
On Thu, Dec 6, 2018 at 9:54 PM Michal Simek wrote:
>
> On 06. 12. 18 6:27, Masahiro Yamada wrote:
> > Hi Michal,
> >
> > On Thu, Dec 6, 2018 at 12:41 AM Michal Simek wrote:
> >>
> >> On 03. 12. 18 8:50, Masahiro Yamada wrote:
> >>> "make ARCH=microblaze help" mentions simpleImage..unstrip,
> >>>
There is currently a missing terminating newline in non-switch case
match, when msg == NULL.
Signed-off-by: Bo YU
---
Changes in v3:
Improve the commit log,requested by rafael.
Changes in v2:
According to Joe's suggestion,drop newline from msg
lib/kobject_uevent.c | 11 ++-
1 file chan
On 12/7/18 10:06 AM, Linus Walleij wrote:
> Hi Christophe,
>
> On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
> wrote:
>
>> +/* FMC2 Controller Registers */
>> +#define FMC2_BCR1 0x0
>> +#define FMC2_PCR 0x80
> (...)
>> +/* Register: FMC2_BCR1 */
>>
Hi Anson,
On Thu, Dec 6, 2018 at 4:25 AM Anson Huang wrote:
> @@ -1533,6 +1535,14 @@ static int mma8452_probe(struct i2c_client *client,
> data->client = client;
> mutex_init(&data->lock);
> data->chip_info = match->data;
> + data->vcc_reg = devm_regulator_get_optio
Hi Anson,
On Thu, Dec 6, 2018 at 3:05 AM Anson Huang wrote:
> static int mag3110_request(struct mag3110_data *data)
> @@ -469,17 +471,27 @@ static int mag3110_probe(struct i2c_client *client,
> struct iio_dev *indio_dev;
> int ret;
>
> + indio_dev = devm_iio_device_alloc(&
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