Hi Lina,
Quoting Lina Iyer (2018-10-10 17:29:58)
> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> domain can wakeup the SoC, when interrupts and GPIOs are routed to its
> interrupt controller. Only select GPIOs that are deemed wakeup capable
> are routed to specific PDC
On 10/26/18 6:11 PM, Vincent Guittot wrote:
[...]
static int select_idle_sibling(struct task_struct *p, int prev_cpu, int cpu);
static unsigned long task_h_load(struct task_struct *p);
@@ -764,7 +763,7 @@ void post_init_entity_util_avg(struct sched_entity *se)
* suc
On Thu, Oct 18, 2018 at 09:45:04AM +0200, Frieder Schrempf wrote:
> Some SOCs in the i.MX6 family have a USB host controller that is
> only capable of the HSIC interface and has no on-board PHY.
>
> To be able to use these controllers, we need to add "usb-nop-xceiv"
> dummy PHYs.
>
> Signed-off-b
This fix two issues in clk_boston_setup() function:
- possible memory leak of 'onecell'
- registered clks not unregister when error happens
Changes from v2:
- include smatch to the commit
- unregister clks which registered before going out
Yi Wang (2):
clk: boston: fix possible memory leak in c
Smatch report warnings:
drivers/clk/imgtec/clk-boston.c:76 clk_boston_setup() warn: possible memory
leak of 'onecell'
drivers/clk/imgtec/clk-boston.c:83 clk_boston_setup() warn: possible memory
leak of 'onecell'
drivers/clk/imgtec/clk-boston.c:90 clk_boston_setup() warn: possible memory
leak of
The registered clks should unregister when something wrong happens
before going out in function clk_boston_setup().
Signed-off-by: Yi Wang
---
drivers/clk/imgtec/clk-boston.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/imgtec/clk-boston.c b
On 16-10-18, 00:10, Amit Kucheria wrote:
> Add support for the Qualcomm QCS404 platform that contains v1 of the TSENS
> IP. Introduce a fallback binding to handle "v1" functionality.
Reviewed-by: Vinod Koul
Tested-by: Vinod Koul
--
~Vinod
On 16-10-18, 00:10, Amit Kucheria wrote:
> qcs404 has a single TSENS IP block with 10 sensors. The calibration data
> is stored in an eeprom (qfprom) that is accessed through the nvmem
> framework. We add the qfprom node to allow the tsens sensors to be
> calibrated correctly.
Andy,
These have de
Add more chip-specific compatible strings to support more Socs.
Signed-off-by: Yuantian Tang
---
v3:
- undo deleting old bindings
- split dts and driver code to different patchset
v2:
- remove all legacy code
drivers/clk/clk-qoriq.c | 11 +++
1 files changed, 11 insertions(+), 0
From: Daniel Wagner
Sebastian writes:
"""
We reproducibly observe cache line starvation on a Core2Duo E6850 (2
cores), a i5-6400 SKL (4 cores) and on a NXP LS2044A ARM Cortex-A72 (4
cores).
The problem can be triggered with a v4.9-RT kernel by starting
cyclictest -S -p98 -m -i2000 -b 200
On 10/30/2018 8:52 PM, Jarkko Sakkinen wrote:
On Tue, 30 Oct 2018, Roberto Sassu wrote:
This patch ensures that the digest size returned by the TPM during a PCR
read matches the size of the algorithm passed as argument to
tpm2_pcr_read(). The check is performed after information about the PCR
ba
On 10/30/18 6:48 PM, Roman Gushchin wrote:
> Yongqin reported that /proc/zoneinfo format is broken in 4.14
> due to commit 7aaf77272358 ("mm: don't show nr_indirectly_reclaimable
> in /proc/vmstat")
>
> Node 0, zone DMA
> per-node stats
> nr_inactive_anon 403
> nr_active_anon 89
clk-max77686 never clean clkdev lookup at remove. This can cause
oops if clk-max77686 is removed and inserted again. Fix leak by
using new devm clkdev lookup registration. Simplify also error
path by using new devm_of_clk_add_parent_hw_provider.
Signed-off-by: Matti Vaittinen
---
drivers/clk/clk
The Keystone QMSS driver is pretty damaged, in the sense that it
does things like this:
irq_set_affinity_hint(irq, to_cpumask(&cpu_map));
where cpu_map is a local variable. As we leave the function, this
will point to nowhere-land, and things will end-up badly.
Instead, let's use a prope
Thumb-2 functions have the lowest bit set in the symbol value in the
symtab. When kallsyms are generated for the vmlinux, the kallsyms are
generated from the output of nm, and nm clears the lowest bit.
$ arm-linux-gnueabihf-readelf -a vmlinux | grep show_interrupts
95947: 8015dc89 686 FUNC
On Tue, 2018-10-30 at 09:15 +0100, Michal Hocko wrote:
> On Tue 30-10-18 14:55:51, Miles Chen wrote:
> [...]
> > It's a real problem when using page_owner.
> > I found this issue recently: I'm not able to read page_owner information
> > during a overnight test. (error: read failed: Out of memory).
when xfer_len is greater than 64 bytes and use fifo mode
to transfer, the actual length from the third time is mata->xfer_len
but not len in mtk_spi_interrupt().
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drive
On Mon, Oct 22, 2018 at 9:44 AM Baolin Wang wrote:
> This patch adds the Spreadtrum SC27XX serial PMICs fuel gauge support,
> which is used to calculate the battery capacity.
>
> Original-by: Yuanjiang Yu
> Signed-off-by: Baolin Wang
> Acked-by: Linus Walleij
> ---
> Changes from v5:
> - Save
On Mon, Oct 22, 2018 at 2:08 PM William Breathitt Gray
wrote:
> The implementation for several drivers' get_multiple callbacks return
> additional input states that were not requested by the mask passed in.
> Although the current caller in the kernel does not care, it would be
> prudent to ensure
On Mon, Oct 15, 2018 at 06:42:37PM +0200, Martin Schwidefsky wrote:
> Add three architecture overrideable function to test if the
> p4d, pud, or pmd layer of a page table is folded or not.
>
> Signed-off-by: Martin Schwidefsky
> ---
> include/linux/mm.h | 40 +
On Mon, Oct 15, 2018 at 06:42:38PM +0200, Martin Schwidefsky wrote:
> The common mm code calls mm_dec_nr_pmds() and mm_dec_nr_puds()
> in free_pgtables() if the address range spans a full pud or pmd.
> If mm_dec_nr_puds/mm_dec_nr_pmds are non-empty due to configuration
> settings they blindly subtr
On Tue, Oct 30, 2018 at 04:28:16PM +, Will Deacon wrote:
> On Tue, Oct 30, 2018 at 04:58:41PM +0100, Peter Zijlstra wrote:
> > Like mentioned elsewhere; if you do write_enable() + write_disable()
> > thingies, it all becomes:
> >
> > write_enable();
> > atomic_foo(&bar);
> > write_
thread__resolve() is used in the sample_addr_correlates_sym() cases where
'addr' is a destination of a branch which does not necessarily have the
same cpumode as the 'ip'. Use the fallback function in that case.
This patch depends on patch "perf tools: Add fallback functions for cases
where cpumod
Branch stacks do not necessarily have the same cpumode as the 'ip'. Use the
fallback functions in those cases.
This patch depends on patch "perf tools: Add fallback functions for cases
where cpumode is insufficient".
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org # 4.19
---
tools/perf/
Hi
These patches probably deal with most cases except the one fixed by David
Miller's "perf callchain: Honour the ordering of
PERF_CONTEXT_{USER,KERNEL,etc}" patch, and also cat_backtrace() which looks
like it has the same problem, and the cs-etm fix.
Adrian Hunter (5):
perf tools: Add fal
In the absence of a fallback, samples must provide a correct cpumode for
the 'ip'. Do that now there is no fallback.
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org # 4.19
---
tools/perf/util/intel-bts.c | 17 -
tools/perf/util/intel-pt.c | 22 +-
2 f
For branch stacks or branch samples, the sample cpumode might not be
correct because it applies only to the sample 'ip' and not necessary to
'addr' or branch stack addresses. Add fallback functions that can be used
to deal with those cases
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org #
In the absence of a fallback, callchains must encode also the callchain
context. Do that now there is no fallback.
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org # 4.19
---
tools/perf/util/intel-pt.c | 6 +++--
tools/perf/util/thread-stack.c | 44 +++---
On 10/30/18 7:11 AM, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to clean up an indentation issue, remove space
>
> Signed-off-by: Colin Ian King
Thanks Colin,
I have pulled this into apparmor-next
> ---
> security/apparmor/apparmorfs.c | 2 +-
> 1 file changed, 1 insertion(+),
Hi Dietmar,
On Wed, 31 Oct 2018 at 08:20, Dietmar Eggemann wrote:
>
> On 10/26/18 6:11 PM, Vincent Guittot wrote:
>
> [...]
>
> > static int select_idle_sibling(struct task_struct *p, int prev_cpu, int
> > cpu);
> > static unsigned long task_h_load(struct task_struct *p);
> > @@ -764,7 +763,
On Di, 2018-10-30 at 21:57 +, Maximilian Heyne wrote:
> commit e259221763a40403d5bb232209998e8c45804ab8 ("fs: simplify the
> generic_write_sync prototype") reworked callers of generic_write_sync(),
> and ended up dropping the error return for the directio path. Prior to
> that commit, in dio_co
Hi,
On 31-10-18 07:02, Mogens Jensen wrote:
‐‐‐ Original Message ‐‐‐
On Tuesday, October 30, 2018 7:10 PM, Hans de Goede wrote:
Hi,
On 30-10-18 19:56, Mogens Jensen wrote:
‐‐‐ Original Message ‐‐‐
On Tuesday, October 30, 2018 4:04 PM, Hans de Goede hdego...@redhat.com wrote
This serie adds the support of the hardware semaphore block for stm32mp1 SoC.
The last patch isn't related to the hardware itself but propose a way to test
hwspinlocks.
Benjamin Gaignard (5):
dt-bindings: hwlock: Document STM32 hwspinlock bindings
hwspinlock: add STM32 hwspinlock device
ARM:
Add bindings for STM32 hardware spinlock device
Signed-off-by: Benjamin Gaignard
---
.../bindings/hwlock/st,stm32-hwspinlock.txt| 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt
diff --git
Enable hwspinlock on stm32mp157c-ed1
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index f77bea49c079..158a337b3129 100644
--- a/arc
Declare hwspinlock device for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 185541a5b69f..9b16c28f8ac3 100644
--- a
Create a test module to perform simple unitary tests on hwspinlock.
It doesn't cover all the possibles cases but at least allow to test
that very basic features are working.
Signed-off-by: Benjamin Gaignard
---
drivers/hwspinlock/Kconfig | 9 +++
drivers/hwspinlock/Makefile
This patch adds support of hardware semaphores for stm32mp1 SoC.
The hardware block provides 32 semaphores.
Signed-off-by: Benjamin Gaignard
---
drivers/hwspinlock/Kconfig| 9 +++
drivers/hwspinlock/Makefile | 1 +
drivers/hwspinlock/stm32_hwspinlock.c | 147 +++
On Wed, 31 Oct 2018 12:02:55 +0300
"Kirill A. Shutemov" wrote:
> On Mon, Oct 15, 2018 at 06:42:37PM +0200, Martin Schwidefsky wrote:
> > Add three architecture overrideable function to test if the
> > p4d, pud, or pmd layer of a page table is folded or not.
> >
> > Signed-off-by: Martin Schwidef
+++ Ke Wu [22/10/18 15:26 -0700]:
Make mod_verify_sig to use all trusted keys. This allows keys in
secondary_trusted_keys to be used to verify PKCS#7 signature on a
kernel module.
Signed-off-by: Ke Wu
Thanks for the ping, I had missed this patch.
David, could I get an ACK please?
Thanks!
J
This patch adds f2fs_dio_submit_bio() to hook submit_io/end_io functions
in direct IO path, in order to account DIO.
Later, we will add this count into is_idle() to let background GC/Discard
thread be aware of DIO.
Signed-off-by: Chao Yu
---
fs/f2fs/data.c | 51
On Tue, 30 Oct 2018 10:02:16 -0700
Linus Torvalds wrote:
> As an explanation, the above kind of sucks. "SDT"? I had to look it
> up. I added a note to the commit message, but please, don't use random
> acronyms in kernel explanations unless they are industry-standard and
> comprehensible to kerne
On Wed, 31 Oct 2018 07:46:47 +0100
Martin Schwidefsky wrote:
> On Wed, 31 Oct 2018 14:43:38 +0800
> Li Wang wrote:
>
> > On Wed, Oct 31, 2018 at 2:31 PM, Martin Schwidefsky
> > wrote:
> >
> > > BUG: non-zero pgtables_bytes on freeing mm: -16384
> > >
> >
> > Okay, the problem is still
On Tue, Oct 23, 2018 at 9:07 PM Manivannan Sadhasivam
wrote:
> This patchset adds Pinctrl and GPIO support for HI3670 SoC from HiSilicon
> found in the HiKey970 developement board. Also, the remaining UARTs are
> enabled and GPIO line names are added based on the Schematics and the
> 96Boards Con
On Wed, Oct 31, 2018 at 4:18 AM, Matthew Wilcox wrote:
> On Tue, Oct 30, 2018 at 08:00:03AM -0700, syzbot wrote:
>> syzbot found the following crash on:
>>
>> HEAD commit:4b42745211af Merge tag 'armsoc-soc' of git://git.kernel.or..
>> git tree: upstream
>> console output: https://syzkall
On Tue, Oct 23, 2018 at 6:03 PM Jerome Brunet wrote:
> If a bias is enabled on a pin of an Amlogic SoC, calling .pin_config_set()
> with PIN_CONFIG_BIAS_DISABLE will not disable the bias. Instead it will
> force a pull-down bias on the pin.
>
> Instead of the pull type register bank, the driver s
On Wed, Oct 31, 2018 at 4:18 AM, Matthew Wilcox wrote:
> On Tue, Oct 30, 2018 at 08:00:03AM -0700, syzbot wrote:
>> syzbot found the following crash on:
>>
>> HEAD commit:4b42745211af Merge tag 'armsoc-soc' of git://git.kernel.or..
>> git tree: upstream
>> console output: https://syzkall
I greet you!
I have bad news for you.
06/28/2018 - on this day I hacked your operating system and got full access to
your account linux-kernel@vger.kernel.org
On that day your account (linux-kernel@vger.kernel.org) password was: qwerty
It is useless to change the password, my malware intercepts
On Wed, Oct 31, 2018 at 10:35:36AM +0100, Martin Schwidefsky wrote:
> > Maybe
> > return __is_defined(__PAGETABLE_P4D_FOLDED);
> >
> > ?
>
> I have tried that, doesn't work. The reason is that the
> __PAGETABLE_xxx_FOLDED defines to not have a value.
>
> #define __PAGETABLE_P4D_FOLDED
> #de
On Tue, Oct 30, 2018 at 02:55:50PM +, Wolfram Sang wrote:
>
> > No, that's fine. Now I get this, and I totally agree with the approach:
> >
> > Reviewed-by: Benjamin Tissoires
>
> Thanks! If one of you could provide me with a Fixes tag (for this. or
> both patches?), that would be most help
On 2018/09/10 16:31, syzbot wrote:
> HEAD commit: 9a5682765a2e Merge branch 'x86-urgent-for-linus' of git://..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=1624858e40
> kernel config: https://syzkaller.appspot.com/x/.config?x=8f59875069d721b6
> dash
> It's a bit of a long chain and fairly tricky to say exactly when
> the bug was introduced but I think this is probably the closest
> match:
>
> Fixes: 2fd36c552649 ("i2c: core: Map OF IRQ at probe time")
Thank you for checking! Then, I'll just leave it and cc stable so it can
be applied as lon
On 31-10-18, Hans de Goede wrote:
> Hi,
>
> On 31-10-18 07:02, Mogens Jensen wrote:
> > ‐‐‐ Original Message ‐‐‐
> > On Tuesday, October 30, 2018 7:10 PM, Hans de Goede
> > wrote:
> >
> > > Hi,
> > >
> > > On 30-10-18 19:56, Mogens Jensen wrote:
> > >
> > > > ‐‐‐ Original Message
Hi!
On 10/25/18 9:38 PM, John Paul Adrian Glaubitz wrote:
> Tested-by: John Paul Adrian Glaubitz
>
> Michael wants to make some changes to the driver though, I think. He has
> access
> to the Amiga 4000, in any case, so he can also test them.
@Michael: Can you post an updated version of the dr
On Wed, Oct 31, 2018 at 07:31:49AM +0100, Martin Schwidefsky wrote:
> Thanks for testing. Unfortunately Heiko reported another issue yesterday
> with the patch applied. This time the other way around:
>
> BUG: non-zero pgtables_bytes on freeing mm: -16384
>
> I am trying to understand how this ca
On Wed 31-10-18 16:47:17, Miles Chen wrote:
> On Tue, 2018-10-30 at 09:15 +0100, Michal Hocko wrote:
> > On Tue 30-10-18 14:55:51, Miles Chen wrote:
> > [...]
> > > It's a real problem when using page_owner.
> > > I found this issue recently: I'm not able to read page_owner information
> > > during
On Wed, 2018-10-31 at 11:15 +0100, Michal Hocko wrote:
> On Wed 31-10-18 16:47:17, Miles Chen wrote:
> > On Tue, 2018-10-30 at 09:15 +0100, Michal Hocko wrote:
> > > On Tue 30-10-18 14:55:51, Miles Chen wrote:
> > > [...]
> > > > It's a real problem when using page_owner.
> > > > I found this issue
The patch
spi: mediatek: use correct mata->xfer_len when in fifo transfer
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
Hi Muchun,
thanks for your patch!
On Wed, Oct 24, 2018 at 3:41 PM Muchun Song wrote:
> gpiod_request_commit() copies the pointer to the label
> passed as an argument only to be used later. But there's a
> chance the caller could immediately free the passed string
> (e.g., local variable). This
On Wed, Oct 24, 2018 at 7:29 PM Manivannan Sadhasivam
wrote:
> Keeping the irq_chip definition static will make it shared with multiple
> giochips in the system. This practice is considered to be bad and now we
> will get the below warning from gpiolib core:
>
> "detected irqchip that is shared w
RISC-V permits each vendor to develop respective extension ISA based
on RISC-V standard ISA. This means that these vendor-specific features
may be compatible to their compiler and CPU. Therefore, each vendor may
be considered a sub-architecture of RISC-V. Currently, vendors do not
have the approp
Currently, DMA operations in RISC-V ports assume the cache coherent
agent is supported. In other words, the functions in struct dma_map_ops
cannot work if the cache coherent agent is unsupported. In RISCV-NDS
extension ISA, the AndeStart RISC-V CPU provides a solution to overcome
this limitatio
On Wed, Oct 31, 2018 at 11:09:44AM +0100, Heiko Carstens wrote:
> On Wed, Oct 31, 2018 at 07:31:49AM +0100, Martin Schwidefsky wrote:
> > Thanks for testing. Unfortunately Heiko reported another issue yesterday
> > with the patch applied. This time the other way around:
> >
> > BUG: non-zero pgtab
RISC-V permits each vendor to develop respective extension ISA based on
RISC-V standard ISA. This means that these vendor-specific features may be
compatible to their compiler and CPU. Therefore, each vendor may be
considered a sub-architecture of RISC-V. Currently, vendors do not have the
approp
On 30/10/2018 11:00, Thomas Gleixner wrote:
> On Mon, 29 Oct 2018, Paolo Bonzini wrote:
>> On 24/10/2018 12:13, Alexander Shishkin wrote:
>>> Luwei Kang writes:
+ /*
+ * Set guest state of MSR_IA32_RTIT_CTL MSR (PT will be disabled
+ * on VM entry when it has been disabled in g
Introduce RMTFS qmi lookup client to synchronize bring up/down modem
with the REMOTE FS QMI service.
Signed-off-by: Sibi Sankar
---
The currently implemented workaround in the Linaro QCOMLT releases is to
blacklist the qcom_q6v5_pil kernel module and load this explicitly after rmtfs
has been star
On 30/10/2018 12:26, Alexander Shishkin wrote:
>>> affects directly whether the tracing CPUID leaf can be added to the
>>> guest. Therefore it's not perf that can decide whether to turn it on;
>>> KVM must know it when /dev/kvm is opened, which is why it is a module
>>> parameter.
>
> There is a
From: Emil Renner Berthing
The spi_enable_chip function takes a boolean
argument. Change the type to reflect that.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/spi-rockchip.
From: Emil Renner Berthing
Hi,
I took another look at the rockchip spi driver and ended up
with more cleanups and implementing an interrupt handler
to fill/empty the tx and rx fifos rather than busy-looping.
I have two question though:
The driver sets the SPI_LOOP flag in master->mode_bits,
bu
From: Emil Renner Berthing
The driver previously checked each transfer if the
requested speed was higher than possible with the
current spi clock rate and raised the clock rate
accordingly.
However, there is no check to see if the spi clock
was actually set that high and no way to dynamically
lo
From: Emil Renner Berthing
In almost all cases we already have a pointer to the
spi master structure where we have the driver data.
The only exceptions are the dma callbacks which are
easily fixed by passing them the master and using
spi_master_get_devdata to retrieve the driver data.
Signed-of
From: Emil Renner Berthing
The hardware supports 4, 8 and 16bit spi words,
so add the missing support for 4bit words.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 41 +++---
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/
From: Emil Renner Berthing
Now that we no longer potentially change spi clock
at runtime we can precompute the rx sample delay
at probe time rather than for each transfer.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 36 ++--
1 file chang
From: Emil Renner Berthing
Successful transfers leave the spi disabled, so if
we just make sure to disable the spi on error
there should be no need to disable the spi from
master->unprepare_message.
This also flushes the tx and rx fifos,
so no need to do that manually.
Signed-off-by: Emil Renne
From: Emil Renner Berthing
Register an interrupt handler to fill/empty the
tx and rx fifos rather than busy-looping.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 155 ++---
1 file changed, 92 insertions(+), 63 deletions(-)
diff --git a/d
From: Emil Renner Berthing
The spi master (aka spi controller) structure already
has two fields for storing the rx and tx dma channels.
Just use them rather than duplicating them in driver data.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 76 +--
From: Emil Renner Berthing
We only need to know if we're using dma when setting
up the transfer, so just use a local variable for
that.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/dri
From: Emil Renner Berthing
Just read transfer info directly from the spi device
and transfer structures rather than storing it in
driver data first.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 70 +-
1 file changed, 24 insertions(+),
From: Emil Renner Berthing
The state field is currently only used to make sure
only the last of the tx and rx dma callbacks issue
an spi_finalize_current_transfer.
Rather than using a spinlock we can get away
with just turning the state field into an atomic_t.
Signed-off-by: Emil Renner Berthing
From: Emil Renner Berthing
Add missing support for lsb-first mode.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 9e47e81553a1..3912526ead66
From: Emil Renner Berthing
The hardware supports 3 different variants of SPI
and there were some code around it, but nothing
to actually set it to anything but "Motorola SPI".
Just drop that code and always use that mode.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 17
From: Emil Renner Berthing
Use C99 designated initializers for dma slave config
structures. This also makes sure uninitialized fields
are zeroed so we don't need an explicit memset.
Signed-off-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 26 ++
1 file chang
On 10/8/2018 8:38 PM, Leonard Crestez wrote:
> Enable PCI suspend/resume support on imx6sx socs. This is similar to
> imx7d with a few differences:
>
> * The PM_Turn_Off bit is exposed through an IOMUX GPR, like all other
> pcie control bits on 6sx.
> * The pcie_inbound_axi clk needs to be turned
This HP DL365 G5 is the second old server where I see massive W+X mapped pages.
Is it some BIOS defect?
[0.714956] x86/mm: Found insecure W+X mapping at address 0x8ed98000
[0.715101] WARNING: CPU: 0 PID: 1 at arch/x86/mm/dump_pagetables.c:266
note_page+0x4c7/0x780
[0.715298]
Hi,
On 30-10-18 17:15, Dean Wallace wrote:
On 30-10-18, Hans de Goede wrote:
Hi,
On 30-10-18 16:46, Hans de Goede wrote:
Hi,
On 30-10-18 16:04, Pierre-Louis Bossart wrote:
In addition I am not aware of any baytrail device using plt_clk_0,
so moving a common machine driver such a cht_bsw_max
GCC 4.6 is the minimum supported now.
Signed-off-by: Mathieu Malaterre
---
scripts/mod/file2alias.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index 28a61665bb9c..4b59564d4706 100644
--- a/scripts/mod/file2alias.c
On Wed, Oct 31, 2018 at 4:06 PM Vincent Chen wrote:
>
> RISC-V permits each vendor to develop respective extension ISA based
> on RISC-V standard ISA. This means that these vendor-specific features
> may be compatible to their compiler and CPU. Therefore, each vendor may
> be considered a sub-ar
Am Mittwoch, 31. Oktober 2018, 11:56:57 CET schrieb Emil Renner Berthing:
> Emil Renner Berthing (14):
> spi: rockchip: make spi_enable_chip take bool
> spi: rockchip: use designated init for dma config
> spi: rockchip: always use SPI mode
> spi: rockchip: use atomic_t state
> spi: rockch
On Wed, Oct 31, 2018 at 12:18 PM Mathieu Malaterre wrote:
>
> GCC 4.6 is the minimum supported now.
>
> Signed-off-by: Mathieu Malaterre
> ---
> scripts/mod/file2alias.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alia
Paolo Bonzini writes:
> On 30/10/2018 12:26, Alexander Shishkin wrote:
>> There is a control in the perf event attribute that enables tracing the
>> guest. If this control is enabled, the kvm needs to stay away from any
>> PT related MSRs.
>
> This cannot happen once the guest has been told it ca
On Wed 31-10-18 18:19:42, Miles Chen wrote:
> On Wed, 2018-10-31 at 11:15 +0100, Michal Hocko wrote:
> > On Wed 31-10-18 16:47:17, Miles Chen wrote:
> > > On Tue, 2018-10-30 at 09:15 +0100, Michal Hocko wrote:
> > > > On Tue 30-10-18 14:55:51, Miles Chen wrote:
> > > > [...]
> > > > > It's a real p
On 10/31/18, Anup Patel wrote:
> On Wed, Oct 31, 2018 at 4:06 PM Vincent Chen
> wrote:
>>
>> RISC-V permits each vendor to develop respective extension ISA based
>> on RISC-V standard ISA. This means that these vendor-specific features
>> may be compatible to their compiler and CPU. Therefore,
Paolo Bonzini writes:
> On 30/10/2018 11:00, Thomas Gleixner wrote:
>> So at least we need a way for perf on the host to programmatically detect,
>> that 'guest traces itself' is enabled, so it can inject that information
>> into the host data and post processing can tell that. W/o something like
On Mon, 29 Oct 2018 23:35:39 +0100
Rasmus Villemoes wrote:
Hi Rasmus,
I'm currently traveling. I'll try to take a look at these later. If you
don't hear from me by next week, feel free to send me a gentle
reminder ;-)
-- Steve
> Playing around with -Wformat-nonliteral, I stumbled on two insta
Hi!
> > > > https://github.com/hackerspace/olpc-xo175-linux/wiki/How-to-run-an-up-to-date-Linux-on-a-XO-1.75
> > > >
> > > > I didn't test it yet -- will do when I get home in the evening.
> > > > But
> > > > chances are it's good enough and I guess you'd be able to get it
> > > > working even if
On 31/10/2018 12:38, Alexander Shishkin wrote:
>> There is no standard way to tell the guest that the host overrode its
>> choice to use PT. However, the host will get a PGD/PGE packet around
>> vmentry and vmexit, so there _will_ be an indication that the guest
>> owned the MSRs for that period o
Hi Torsten,
On Fri, Oct 26, 2018 at 04:21:48PM +0200, Torsten Duwe wrote:
> Use -fpatchable-function-entry (gcc8) to add 2 NOPs at the beginning
> of each function. Replace the first NOP thus generated with a quick LR
> saver (move it to scratch reg x9), so the 2nd replacement insn, the call
> to
On Fri, Oct 26, 2018 at 12:28:55PM +, Kirill A. Shutemov wrote:
> + va = (unsigned long)ldt_slot_va(ldt->slot);
> + flush_tlb_mm_range(mm, va, va + nr_pages * PAGE_SIZE, 0, false);
I've got it wrong on rebase. It has to be PAGE_SHIFT instead of 0.
Here's the fix up.
diff --git a/arch/
From: Daniel Colascione
> Sent: 29 October 2018 17:53
>
> This patch adds a new file under /proc/pid, /proc/pid/exithand.
> Attempting to read from an exithand file will block until the
> corresponding process exits, at which point the read will successfully
> complete with EOF. The file descript
On Thu 2018-10-25 19:10:36, Sergey Senozhatsky wrote:
> >From printk()/serial console point of view panic() is special, because
> it may force CPU to re-enter printk() or/and serial console driver.
> Therefore, some of serial consoles drivers are re-entrant. E.g. 8250:
>
> serial8250_console_write
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