Re: [PATCH] binder: use standard functions to allocate fds

> config ANDROID_BINDER_IPC > bool "Android Binder IPC Driver" > - depends on MMU > + depends on MMU && !CPU_CACHE_VIVT Thats is a purely arm specific symbol which should not be used in common code. Nevermind that there generally should be no good reason for it. > + fixup->off

[PATCH]] kvm: selftests: use -pthread instead of -lpthread

I run into the following error testing/selftests/kvm/dirty_log_test.c:285: undefined reference to `pthread_create' testing/selftests/kvm/dirty_log_test.c:297: undefined reference to `pthread_join' collect2: error: ld returned 1 exit status my gcc version is gcc version 4.8.4 "-pthread" would wo

[PATCH V7 0/9] mmc: add support for sdhci 4.0

>From the SD host controller version 4.0 on, SDHCI implementation either is version 3 compatible or version 4 mode. This patch-set covers those changes which are common for SDHCI 4.0 version, regardless of whether they are used with SD or eMMC storage devices. This patchset also added a new sdhci

[PATCH V7 1/9] mmc: sdhci: Add version V4 definition

Added definitions for v400, v410, v420. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 2 +- drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 97e4efa..01bf88c 100644 --- a/driver

[PATCH V7 3/9] mmc: sdhci: Change SDMA address register for v4 mode

According to the SD host controller specification version 4.10, when Host Version 4 is enabled, SDMA uses ADMA System Address register (05Fh-058h) instead of using SDMA System Address register to support both 32-bit and 64-bit addressing. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c

[PATCH V7 2/9] mmc: sdhci: Add sd host v4 mode

For SD host controller version 4.00 or later ones, there're two modes of implementation - Version 3.00 compatible mode or Version 4 mode. This patch introduced an interface to enable v4 mode. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 29 + drivers/m

[PATCH V7 9/9] dt-bindings: sdhci-sprd: Add bindings for the sdhci-sprd controller

From: Chunyan Zhang This patch adds the device-tree binding documentation for Spreadtrum SDHCI driver. Signed-off-by: Chunyan Zhang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 41 ++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/

[PATCH V7 7/9] mmc: sdhci: SDMA may use Auto-CMD23 in v4 mode

When Host Version 4 Enable is set to 1, SDMA uses ADMA System Address register (05Fh-058h) instead of using register (000h-004h) to indicate its system address of data location. The register (000h-004h) is re-assigned to 32-bit Block Count and Auto CMD23 argument, so then SDMA may use Auto CMD23.

[PATCH V7 4/9] mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode

ADMA2 64-bit addressing support is divided into V3 mode and V4 mode. So there are two kinds of descriptors for ADMA2 64-bit addressing i.e. 96-bit Descriptor for V3 mode, and 128-bit Descriptor for V4 mode. 128-bit Descriptor is aligned to 8-byte. For V4 mode, ADMA2 64-bit addressing is enabled vi

[PATCH V7 6/9] mmc: sdhci: Add Auto CMD Auto Select support

As SD Host Controller Specification v4.10 documents: Host Controller Version 4.10 defines this "Auto CMD Auto Select" mode. Selection of Auto CMD depends on setting of CMD23 Enable in the Host Control 2 register which indicates whether card supports CMD23. If CMD23 Enable =1, Auto CMD23 is used and

[PATCH V7 8/9] mmc: sdhci-sprd: Add Spreadtrum's initial host controller

From: Chunyan Zhang This patch adds the initial support of Secure Digital Host Controller Interface compliant controller found in some latest Spreadtrum chipsets. This patch has been tested on the version of SPRD-R11 controller. R11 is a variant based on SD v4.0 specification. With this driver,

[PATCH V7 5/9] mmc: sdhci: Add 32-bit block count support for v4 mode

Host Controller Version 4.10 re-defines SDMA System Address register as 32-bit Block Count for v4 mode, and SDMA uses ADMA System Address register (05Fh-058h) instead if v4 mode is enabled. Also when using 32-bit block count, 16-bit block count register need to be set to zero. Since using 32-bit B

Re: [PATCH v1 1/7] extcon: Make static analyzer happy about union assignment

Hi, On 2018년 08월 28일 00:35, Andy Shevchenko wrote: > When assign unions we need to supply non-scalar value, otherwise > static analyzer is not happy: > > CHECK drivers/extcon/extcon.c > drivers/extcon/extcon.c:631:22: warning: cast to non-scalar > > Signed-off-by: Andy Shevchenko > --- > dri

Re: [PATCH v2] x86/dumpstack: don't dump kernel memory based on usermode RIP

On Tue, Aug 28, 2018 at 06:29:43PM +0200, Jann Horn wrote: > No, you can also get user opcode bytes printed by WARN() and friends. > When you add a WARN() in the pagefault handler, you get something like Ok, let's always do the checking then - who knows in what context we might be dumping opcodes

[PATCH v2] dt-binding: arm/cpus.txt: fix dynamic-power-coefficient unit

The unit of dynamic-power-coefficient is described as mW/MHz/uV^2 whereas its usage in the code assumes that unit is uW/MHz/V^2 In drivers/thermal/cpu_cooling.c, the code is : power = (u64)capacitance * freq_mhz * voltage_mv * voltage_mv; do_div(power, 10); which can be summarized as : p

Re: [PATCH v2] x86/dumpstack: don't dump kernel memory based on usermode RIP

On Tue, Aug 28, 2018 at 05:49:01PM +0200, Jann Horn wrote: > show_opcodes() is used both for dumping kernel instructions and for dumping > user instructions. If userspace causes #PF by jumping to a kernel address, > show_opcodes() can be reached with regs->ip controlled by the user, > pointing to k

Re: [PATCH v2 1/3] arm64: implement ftrace with regs

On Fri, Aug 17, 2018 at 12:27:24PM +0200, Torsten Duwe wrote: > Check for compiler support of -fpatchable-function-entry and use it > to intercept functions immediately on entry, saving the LR in x9. > Disable ftracing in efi/libstub, because this triggers cross-section > linker errors now (-pg is

Re: [PATCH 1/1] axi-i2s: set period size register

Hi, On 27/08/2018 18:51, Lars-Peter Clausen wrote: > On 08/27/2018 06:22 PM, Luca Ceresoli wrote: >> Hi, >> >> thanks for your feedback. >> >> [Adding Michal Simek (Xilinx maintainer) in Cc] >> >> On 27/08/2018 14:27, Lars-Peter Clausen wrote: >>> On 08/24/2018 06:04 PM, Luca Ceresoli wrote:

Re: [PATCH 0/1] Fix ADI axi-i2s + Xilinx AXI-DMA capture

Hi Mark, On 28/08/2018 20:58, Mark Brown wrote: > On Fri, Aug 24, 2018 at 06:04:29PM +0200, Luca Ceresoli wrote: >> Hi, >> >> here is a fix for a nasty audio capture problem when the axi-i2s >> output stream is fed to a Xilinx AXI-DMA. > > Please don't send cover letters for single patches, if th

Re: [PATCH RESEND 0/7] switch several architectures NO_BOOTMEM

Any updates on this? On Fri, Aug 03, 2018 at 10:58:43PM +0300, Mike Rapoport wrote: > > Hi, > > These patches perform conversion to NO_BOOTMEM of hexagon, nios2, uml and > unicore32. The architecture maintainers have acked the patches, but, since > I've got no confirmation the patches are going

Re: [PATCH v2 00/32] Device Tree Updates for GTA04 (A3/A4/A5 variants)

Hi OMAP3 DTS Maintainers, is there any progress in merging this patch series? We have some more patches in our queue which depend on them. BR and thanks, Nikolaus Schaller > Am 31.07.2018 um 09:11 schrieb H. Nikolaus Schaller : > > * Sebastian Reichel > asked why we have reg=<0> for port@1.

[PATCH] x86/mm: Fix typo in arch/x86/mm/extable.c

Signed-off-by: Takuya Yamamoto --- arch/x86/mm/extable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c index 45f5d6cf65ae..9ceb940334cd 100644 --- a/arch/x86/mm/extable.c +++ b/arch/x86/mm/extable.c @@ -230,7 +230,7 @@ void __ini

[PATCH] x86/mm: Fix typo in arch/x86/mm/extable.c

Signed-off-by: Takuya Yamamoto --- arch/x86/mm/extable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c index 45f5d6cf65ae..9ceb940334cd 100644 --- a/arch/x86/mm/extable.c +++ b/arch/x86/mm/extable.c @@ -230,7 +230,7 @@ void __ini

RE: [PATCH v13 10/13] x86/sgx: Add sgx_einit() for initializing enclaves

[snip..] > > > > > > @@ -38,6 +39,18 @@ static LIST_HEAD(sgx_active_page_list); static > > > DEFINE_SPINLOCK(sgx_active_page_list_lock); > > > static struct task_struct *ksgxswapd_tsk; static > > > DECLARE_WAIT_QUEUE_HEAD(ksgxswapd_waitq); > > > +static struct notifier_block sgx_pm_notifier; st

[PATCH] PM / devfreq: Add new name attribute for sysfs

commit 4585fbcb5331 ("PM / devfreq: Modify the device name as devfreq(X) for sysfs") changed the node name to devfreq(x). After this commit, it is not possible to get the device name through /sys/class/devfreq/devfreq(X)/*. Add new name attribute in order to get device name. Cc: sta...@vger.kerne

Re: [PATCH v4 0/5] Add Actions Semi S700 pinctrl support

On Tue, Jul 31, 2018 at 9:48 PM Saravanan Sekar wrote: > This patchset adds pinctrl support for Actions Semi S700 SoC. > Pinmux functions are only accessible for pin groups while pinconf > parameters are available for both pin groups and individual pins. > > pinctrl driver is verified using the C

RE: [PATCH v13 02/13] x86/cpufeature: Add SGX and SGX_LC CPU features

> -Original Message- > From: Jarkko Sakkinen [mailto:jarkko.sakki...@linux.intel.com] > Sent: Tuesday, August 28, 2018 7:17 PM > To: Huang, Kai > Cc: x...@kernel.org; platform-driver-...@vger.kernel.org; Hansen, Dave > ; Christopherson, Sean J > ; nhor...@redhat.com; > npmccal...@redhat.co

Re: [PATCH v3 1/3] pinctrl: msm: Really mask level interrupts to prevent latching

On Thu, Aug 16, 2018 at 10:06 PM Stephen Boyd wrote: > The interrupt controller hardware in this pin controller has two status > enable bits. The first "normal" status enable bit enables or disables > the summary interrupt line being raised when a gpio interrupt triggers > and the "raw" status en

Re: [RFC PATCH] EDAC, ghes: Enable per-layer error reporting for ARM

On Tue, Aug 28, 2018 at 06:09:24PM +0100, James Morse wrote: > Does x86 have another source of memory-topology information it needs to > correlate smbios with? Bah, pinpointing the DIMM on x86 is a mess. There's no reliable way to say which DIMM it is in certain cases (interleaving, mirrorring, ..

Re: [PATCH v4 0/5] Add Actions Semi S700 pinctrl support

On Wed, Aug 29, 2018 at 09:35:38AM +0200, Linus Walleij wrote: > On Tue, Jul 31, 2018 at 9:48 PM Saravanan Sekar wrote: > > > This patchset adds pinctrl support for Actions Semi S700 SoC. > > Pinmux functions are only accessible for pin groups while pinconf > > parameters are available for both p

Re: [PATCH v3 2/3] pinctrl: msm: Mux out gpio function with gpio_request()

On Thu, Aug 16, 2018 at 10:06 PM Stephen Boyd wrote: > We rely on devices to use pinmuxing configurations in DT to select the > GPIO function (function 0) if they're going to use the gpio in GPIO > mode. Let's simplify things for driver authors by implementing > gpio_request_enable() for this pin

Re: [PATCH v3 3/3] pinctrl: msm: Configure interrupts as input and gpio mode

On Thu, Aug 16, 2018 at 10:06 PM Stephen Boyd wrote: > When requesting a gpio as an interrupt, we should make sure to mux the > pin as the GPIO function and configure it to be an input so that various > functions or output signals don't affect the interrupt state of the pin. > So far, we've relie

Re: [PATCH v3 1/3] pinctrl: msm: Really mask level interrupts to prevent latching

On Wed, Aug 29, 2018 at 9:40 AM Linus Walleij wrote: > This patch applied for fixes with Doug and Bjorn's ACKs. > > I suppose you will respin the two others and obtain buy-in from > the same people for these. Scrap that. I saw Bjorn has ACKed the two others so applied them for next (v4.20). You

Re: [PATCH] memory: Convert to using %pOFn instead of device_node.name

On Tue, 28 Aug 2018 at 03:54, Rob Herring wrote: > > In preparation to remove the node name pointer from struct device_node, > convert printf users to use the %pOFn format specifier. > > Cc: Roger Quadros > Cc: Tony Lindgren > Cc: Kukjin Kim > Cc: Krzysztof Kozlowski > Cc: Thierry Reding > Cc

Re: [PATCH] regulator: Convert to using %pOFn instead of device_node.name

On Tue, 28 Aug 2018 at 03:55, Rob Herring wrote: > > In preparation to remove the node name pointer from struct device_node, > convert printf users to use the %pOFn format specifier. > > Cc: Liam Girdwood > Cc: Mark Brown > Cc: Sangbeom Kim > Cc: Krzysztof Kozlowski > Cc: Bartlomiej Zolnierkie

Re: [PATCH] clk: ti: fix OF child-node lookup

On Tue, Aug 28, 2018 at 03:32:03PM -0700, Stephen Boyd wrote: > Quoting Johan Hovold (2018-08-22 02:03:19) > > Fix child-node lookup which by using the wrong OF helper was searching > > the whole tree depth-first, something which could end up matching an > > unrelated node. > > > > Also fix the re

Re: [PATCH v2 7/9] net: stmmac: dwmac-sun8i: fix OF child-node lookup

On Tue, Aug 28, 2018 at 10:06:24AM +0200, Corentin Labbe wrote: > On Mon, Aug 27, 2018 at 10:21:51AM +0200, Johan Hovold wrote: > > Use the new of_get_compatible_child() helper to lookup the mdio-internal > > child node instead of using of_find_compatible_node(), which searches > > the entire tree

Re: [PATCH RESEND 1/2] gpio: mvebu: Add support for multiple PWM lines per GPIO chip

On Mon, Aug 6, 2018 at 4:31 AM Aditya Prayoga wrote: > Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip. > > based on initial work on LK4.4 by Alban Browaeys. > URL: https://github.com/helios-4/linux-marvell/commit/743ae97 > [Aditya Prayoga: forward port, cleanup] > Signed-off-by

Re: arch/powerpc/boot/../../../lib/xz/xz_crc32.c:18:10: fatal error: linux/crc32poly.h: No such file or directory

On Thu, 23 Aug 2018 at 05:44, kbuild test robot wrote: > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git > master > head: 815f0ddb346c196018d4d8f8f55c12b83da1de3f > commit: faa16bc404d72a5afb857c924c83a5f691f83386 lib: Use existing define > with polynomial > date:

Re: [PATCH v4 0/5] Add Actions Semi S700 pinctrl support

Hi Mani, On 08/29/2018 09:41 AM, Manivannan Sadhasivam wrote: On Wed, Aug 29, 2018 at 09:35:38AM +0200, Linus Walleij wrote: On Tue, Jul 31, 2018 at 9:48 PM Saravanan Sekar wrote: This patchset adds pinctrl support for Actions Semi S700 SoC. Pinmux functions are only accessible for pin group

Re: [RFT] powerpc/boot: Fix missing crc32poly.h when building with KERNEL_XZ

On Wed, 29 Aug 2018 at 09:32, Krzysztof Kozlowski wrote: > > After commit faa16bc404d7 ("lib: Use existing define with > polynomial") the lib/xz/xz_crc32.c includes a header from include/linux > directory thus any other user of this code should define proper include > path. > > This fixes the buil

[PATCH v6 3/9] soc: qcom: smp2p: Add select IRQ_DOMAIN

Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN. This is needed in order to be able to remove the depends on ARCH_QCOM. drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’: drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function ‘irq_domain_ad

[PATCH v6 1/9] soc: qcom: smem: Add missing include of sizes.h

Add missing include of sizes.h. drivers/soc/qcom/smem.c: In function ‘qcom_smem_get_ptable’: drivers/soc/qcom/smem.c:666:64: error: ‘SZ_4K’ undeclared ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K; ^ Signe

[PATCH v6 4/9] soc: qcom: smsm: Add select IRQ_DOMAIN

Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN. This is needed in order to be able to remove the depends on ARCH_QCOM. drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’: drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function ‘irq_domain_add_linear

[PATCH v6 0/9] soc: qcom: Allow COMPILE_TEST of qcom SoC Kconfigs

Since commit cab673583d96 ("soc: Unconditionally include qcom Makefile"), we unconditionally include the soc/qcom/Makefile. This opens up the possibility to compile test the code even when building for other architectures. This patch series prepares and enables all but two Kconfigs to be compile

Re: [PATCH v6 1/2] dt-binding: pinctrl: Add NPCM7xx pinctrl and GPIO documentation

On Wed, Aug 8, 2018 at 11:25 AM Tomer Maimon wrote: > Added device tree binding documentation for Nuvoton BMC > NPCM750/730/715/705 pinmux and GPIO controller. > > Signed-off-by: Tomer Maimon > Reviewed-by: Rob Herring Patch applied, bindings are clearly finished! Yours, Linus Walleij

[PATCH v6 7/9] soc: qcom: wcnss_ctrl: Avoid string overflow

'chinfo.name' is used as a NUL-terminated string, but using strncpy() with the length equal to the buffer size may result in lack of the termination: drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel': drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32

[PATCH v6 8/9] soc: qcom: apr: Avoid string overflow

'adev->name' is used as a NUL-terminated string, but using strncpy() with the length equal to the buffer size may result in lack of the termination: In function 'apr_add_device', inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7, inlined from 'apr_probe' at drivers//s

[PATCH v6 2/9] soc: qcom: llcc-slice: Add missing include of sizes.h

Add missing include of sizes.h. drivers/soc/qcom/llcc-slice.c: In function ‘llcc_update_act_ctrl’: drivers/soc/qcom/llcc-slice.c:41:44: error: ‘SZ_4K’ undeclared #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K) ^ Signed-off-by: Niklas Cassel Revi

[PATCH v6 5/9] soc: qcom: Remove bogus depends on OF from QCOM_SMD_RPM

QCOM_SMD_RPM builds perfectly fine without CONFIG_OF set. Remove the bogus depends on OF. Signed-off-by: Niklas Cassel Reviewed-by: Vivek Gautam Reviewed-by: Vinod Koul --- drivers/soc/qcom/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/qcom/Kconfig b/d

[PATCH v6 6/9] soc: qcom: Remove depends on OF from QCOM_RPMH

QCOM_RPHM already selects ARM64, which always selects OF. Additionally, the rpmh driver only uses linux/of.h, which has dummy definitions for all functions, in order for code to to be able to build without CONFIG_OF set. Remove the superfluous depends on OF. Signed-off-by: Niklas Cassel --- dr

[PATCH v6 9/9] soc: qcom: Allow COMPILE_TEST of qcom SoC Kconfigs

Since commit cab673583d96 ("soc: Unconditionally include qcom Makefile"), we unconditionally include the soc/qcom/Makefile. This opens up the possibility to compile test the code even when building for other architectures. Allow COMPILE_TEST for all qcom SoC Kconfigs, except for two Kconfigs that

Re: [PATCH RESEND 1/2] gpio: mvebu: Add support for multiple PWM lines per GPIO chip

Hello Linus, On Wed, 29 Aug 2018 09:54:04 +0200, Linus Walleij wrote: > On Mon, Aug 6, 2018 at 4:31 AM Aditya Prayoga wrote: > > > Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip. > > > > based on initial work on LK4.4 by Alban Browaeys. > > URL: https://github.com/helios-4/lin

[PATCH]] zram: kselftests: correct README

CONFIG_ZRAM=y should be CONFIG_ZRAM=m it obviously uses zram kernel module in the testing Signed-off-by: Lei Yang --- tools/testing/selftests/zram/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/zram/README b/tools/testing/selftests/zram/README

Re: [PATCH RESEND 1/2] gpio: mvebu: Add support for multiple PWM lines per GPIO chip

Hi Linus, On mer., août 29 2018, Linus Walleij wrote: > On Mon, Aug 6, 2018 at 4:31 AM Aditya Prayoga wrote: > >> Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip. >> >> based on initial work on LK4.4 by Alban Browaeys. >> URL: https://github.com/helios-4/linux-marvell/commit

Re: [PATCH v4 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cylic mode align split descriptors

On Mon, Aug 27, 2018 at 7:30 AM Vinod wrote: > > On 02-08-18, 16:10, Andrea Merello wrote: > > s/cylic/cyclic in patch title OK > > Whenever a single or cyclic transaction is prepared, the driver > > could eventually split it over several SG descriptors in order > > to deal with the HW maximum t

[RFC PATCH 4/6] x86/alternatives: initializing temporary mm for patching

To prevent improper use of the PTEs that are used for text patching, we want to use a temporary mm struct. We initailize it by copying the init mm. The address that will be used for patching is taken from the lower area that is usually used for the task memory. Doing so prevents the need to freque

[RFC PATCH 1/6] x86/alternative: assert text_mutex is taken

Use lockdep to ensure that text_mutex is taken when text_poke() is called. Actually it is not always taken, specifically when it is called by kgdb, so take the lock in these cases. Cc: Andy Lutomirski Cc: Masami Hiramatsu Cc: Kees Cook Suggested-by: Peter Zijlstra Signed-off-by: Nadav Amit -

[RFC PATCH 0/6] x86: text_poke() fixes

This patch-set addresses some issues that were raised in the recent correspondence and might affect the security and the correctness of code patching. (Note that patching performance is not addressed by this patch-set). The main issue that the patches deal with is the fact that the fixmap PTEs tha

[RFC PATCH 5/6] x86/alternatives: use temporary mm for text poking

text_poke() can potentially compromise the security as it sets temporary PTEs in the fixmap. These PTEs might be used to rewrite the kernel code from other cores accidentally or maliciously, if an attacker gains the ability to write onto kernel memory. Moreover, since remote TLBs are not flushed a

[RFC PATCH 2/6] x86/mm: temporary mm struct

From: Andy Lutomirski Sometimes we want to set a temporary page-table entries (PTEs) in one of the cores, without allowing other cores to use - even speculatively - these mappings. There are two benefits for doing so: (1) Security: if sensitive PTEs are set, temporary mm prevents their use in ot

[RFC PATCH 6/6] x86/alternatives: remove text_poke() return value

The return value of text_poke() is meaningless - it is one of the function inputs. One day someone may allow the callers to deal with text_poke() failures, if those actually happen. In the meanwhile, remove the return value. Cc: Andy Lutomirski Cc: Masami Hiramatsu Cc: Kees Cook Cc: Peter Zijl

[PATCH 09/31] ARM: tegra: colibri_t20: add missing regulators

From: Marcel Ziswiler Add missing regulators: - reg_lan_v_bus being USB Ethernet chip vbus supply - carrier board reg_3v3 to be used as backlight and panel power supply - carrier board HDMI supply being reg_5v0 - reg_usbc_vbus being the USB vbus supply of the EHCI instance 0 Signed-off-by: Marce

[RFC PATCH 3/6] fork: provide a function for copying init_mm

Provide a function for copying init_mm. This function will be later used for setting a temporary mm. Cc: Andy Lutomirski Cc: Masami Hiramatsu Cc: Kees Cook Cc: Peter Zijlstra Signed-off-by: Nadav Amit --- include/linux/sched/task.h | 1 + kernel/fork.c | 24 ++--

[PATCH 01/31] ARM: tegra: colibri_t20: move aliases from module to carrier board

From: Marcel Ziswiler Move RTC aliases from module to carrier board to be more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++ arch/arm/boot/dts/tegra20-colibri.dtsi | 5 - 2 files changed, 2 insertions(+)

Re: [PATCH v4 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property

On Mon, Aug 27, 2018 at 7:31 AM Vinod wrote: > > On 02-08-18, 16:10, Andrea Merello wrote: > > The width of the "length register" cannot be autodetected, and it is now > > specified with a DT property. Add DOC for it. > > Add Documentation for it... OK > > > > Cc: Rob Herring > > Cc: Mark Rutla

[PATCH 07/31] ARM: tegra: colibri_t20: iris: use no-1-8-v

From: Marcel Ziswiler Use no-1-8-v property rather than vmmc/vqmmc supplies and drop now obsolete and anyway non-existent vcc_sd. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 13 + 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/ar

[PATCH 12/31] ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-up

From: Marcel Ziswiler Cleaning up indentation, line-feed and white-space. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 18 ++ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/

[PATCH 11/31] ARM: tegra: colibri_t20: remove phy-reset-gpio from controller node

From: Marcel Ziswiler Remove the phy-reset-gpio from the USB controller node as it is already specified in the PHY node. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/ar

[PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support

This series is a major overhaul and adds support for the Colibri Evaluation Board device tree. Marcel Ziswiler (31): ARM: tegra: colibri_t20: move aliases from module to carrier board ARM: tegra: colibri_t20: iris: integrate i2c real time clock support ARM: tegra: colibri_t20: iris: annot

[PATCH 08/31] ARM: tegra: colibri_t20: regulator clean-up

From: Marcel Ziswiler Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 20 ++-- arch/arm/boot/dts/tegra20-colibri.dtsi | 147 +++-- 2 files changed, 66 insertions(+), 101 deletions(-) diff --git a/

[PATCH 04/31] ARM: tegra: colibri_t20: iris: add missing aliases

From: Marcel Ziswiler Add rtc0 being the ultra low-power I2C one as found on the carrier board and the 3rd UART being NVIDIA's UARTB. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/tegra

[PATCH] MAINTAINERS: remove myself as FBTFT maintainer

Even though I did introduce the fbtft code in staging a while ago to stop seeing this being developed out-of-tree, I don't intend to maintain it, and I don't use it actively. So be honest and remove myself from the MAINTAINERS file for this subsystem. Signed-off-by: Thomas Petazzoni --- MAINTAIN

[PATCH 15/31] ARM: tegra: colibri_t20: add missing pinmux

From: Marcel Ziswiler Explicitly add pinmux' for all T20 SoC ball groups now: - Colibri Address/Data Bus (GMI) further pins used as GPIOs - Colibri BL_ON - Colibri EXT_IO* - Colibri L_BIAS, LCD_M1 is muxed with LCD_DE today's display need DE, disable LCD_M1 - more Colibri LCD pins (L_* resp. LD

[PATCH 17/31] ARM: tegra: colibri_t20: iris: annotate uarts

From: Marcel Ziswiler Annotate UART-A and UART-B. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index e5e26a6c2861..9

[PATCH 25/31] ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers

From: Marcel Ziswiler Add GPIO hogs for GMI_WR_N buffers: - tri-stating GMI_WR_N on SODIMM pin 99 nPWE - not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 16 1 file changed, 16 insertions(+) diff --g

[PATCH 30/31] ARM: tegra: colibri_t20: iris: add colibri ssp support

From: Marcel Ziswiler Add Colibri SSP aka SPI support using the SPI4 instance. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colib

[PATCH 26/31] ARM: tegra: colibri_t20: annotate/move sd card detect

From: Marcel Ziswiler Annotate the SD card, its detect pin and move the SD card detect GPIO definition from the module to the carrier board more in-line with our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++ arch/arm/boot/dts/tegra2

[PATCH 27/31] ARM: tegra: colibri_t20: add compatibility comment

From: Marcel Ziswiler Add compatibility comment. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi index 057147565b1e..1204aa9e1d

[PATCH 29/31] ARM: tegra: colibri_t20: iris: simplify model and compatible properties

From: Marcel Ziswiler Simplify model and compatible by dropping the 256/512 MB from the model, -512 from the compatible and rename that property from toradex,iris to toradex,colibri_t20-iris to be more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/

[PATCH 23/31] ARM: tegra: colibri_t20: add i2c-thermtrip

From: Marcel Ziswiler Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE register of the TPS658643 PMIC. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.

[PATCH 31/31] ARM: tegra: colibri_t20: add eval board device tree

From: Marcel Ziswiler Add an evaluation board device tree more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 266 ++ 2 files changed, 2

[PATCH 19/31] ARM: tegra: colibri_t20: use high speed uart driver

From: Marcel Ziswiler Use high speed UART driver compatible nvidia,tegra20-hsuart. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri

[PATCH 18/31] ARM: tegra: colibri_t20: iris: add uart-c

From: Marcel Ziswiler Add UART-C. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index 96d633622f94..a2364e39c131 1

[PATCH 22/31] ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor

From: Marcel Ziswiler Rename and annotate LM95245 temperature sensor more in-line with our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra20-colibri.dts

[PATCH 21/31] ARM: tegra: colibri_t20: iris: add dr_mode property

From: Marcel Ziswiler Add dr_mode property to the USB controller. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index f

[PATCH 24/31] ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip

From: Marcel Ziswiler Add GPIO hog to unreset ASIX AX88772B USB Ethernet chip. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dt

[PATCH 28/31] ARM: tegra: colibri_t20: simplify model and compatible properties

From: Marcel Ziswiler Simplify model and compatible by dropping the 256/512 MB from the model and -512 from the compatible properties to be more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ++-- 1 file changed, 2 inse

[PATCH 20/31] ARM: tegra: colibri_t20: iris: add gpio wakeup key

From: Marcel Ziswiler Add SODIMM pin 45 as GPIO wakeup key. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dt

Re: [PATCH] xen-blkback: Switch to closed state after releasing the backing device

On 29/08/18 08:52, Valentin Vidic wrote: > Switching to closed state earlier can cause the block-drbd > script to fail with 'Device is held open by someone': > > root: /etc/xen/scripts/block-drbd: remove XENBUS_PATH=backend/vbd/6/51712 > kernel: [ .278235] block drbd6: State change failed: Dev

[PATCH 16/31] ARM: tegra: colibri_t20: iris: display controller rgb panel support

From: Marcel Ziswiler Add display controller parallel RGB panel support incl. backlight PWM. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 31 ++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iri

[PATCH 14/31] ARM: tegra: colibri_t20: pinmux clean-up

From: Marcel Ziswiler Just cosmetic pinmux clean-up. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 10 +- arch/arm/boot/dts/tegra20-colibri.dtsi | 283 - 2 files changed, 200 insertions(+), 93 deletions(-) diff --git a/arch/

[PATCH 13/31] ARM: tegra: colibri_t20: update sound nvidia,model

From: Marcel Ziswiler Update sound nvidia,model to be more in-line with our other device trees. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boo

[PATCH 05/31] ARM: tegra: colibri_t20: add local-mac-address property

From: Marcel Ziswiler Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boo

[PATCH 02/31] ARM: tegra: colibri_t20: iris: integrate i2c real time clock support

From: Marcel Ziswiler Integrate support for GEN1_I2C aka I2C_SDA/SCL on SODIMM pin 194/196 and the M41T0M6 real time clock on the carrier board. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 15 +++ 1 file changed, 15 insertions(+) diff --git a/

[PATCH 10/31] ARM: tegra: colibri_t20: annotate usb ehci instances

From: Marcel Ziswiler Annotate USB EHCI instances. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++ arch/arm/boot/dts/tegra20-colibri.dtsi | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boo

[PATCH 03/31] ARM: tegra: colibri_t20: iris: annotate i2c busses

From: Marcel Ziswiler Annotate I2C busses: GEN2_I2C and CAM_I2C (I2C3) being unused and DDC_CLOCK/DATA on X3 pin 15/16 e.g. used for display EDID. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff -

[PATCH 06/31] ARM: tegra: colibri_t20: reorder host1x/hdmi properties

From: Marcel Ziswiler Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra20-colibri.dtsi | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi index

[PATCH v5 1/5] pinctrl: actions: define constructor generic to Actions Semi SoC's

Move generic defines common to the Owl family out of S900 driver. Signed-off-by: Parthiban Nallathambi Signed-off-by: Saravanan Sekar --- drivers/pinctrl/actions/pinctrl-owl.h | 131 +++ drivers/pinctrl/actions/pinctrl-s900.c | 139 ++---

[PATCH v5 5/5] arm64: dts: actions: Add pinctrl node for Actions Semi S700

Add pinctrl nodes for Actions Semi S700 SoC Signed-off-by: Parthiban Nallathambi Signed-off-by: Saravanan Sekar --- arch/arm64/boot/dts/actions/s700.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s7

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