From: Todd Poynor
Fix multi-line alignment formatting to look like:
int ret = long_function_name(device, VARIABLE1, VARIABLE2,
VARIABLE3, VARIABLE4);
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_sysfs.c | 26 +++---
drive
From: Todd Poynor
Remove forward declarations of static functions, move code to avoid
forward references, for kernel style.
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_interrupt.c | 499 +++---
1 file changed, 242 insertions(+), 257 deletions(-)
diff --git a/d
From: Todd Poynor
The static function declarations are removed, remove the TODO file entry
for this.
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/TODO | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/gasket/TODO b/drivers/staging/gasket/TODO
index 7f4c13ce021b..6aa2a
On Mon, Jul 16, 2018 at 3:11 AM, Ulf Hansson wrote:
> On 12 July 2018 at 21:59, Kees Cook wrote:
>> Looks like the adjusted syntax wasn't fully build tested. This fixes
>> failures with powerpc builds:
>>
>> drivers/mmc/host/mxcmmc.c: In function ‘mxcmci_swap_buffers’:
>> drivers/mmc/host/mxcmmc.
On 2018-07-31 08:54 AM, Alex Bounine wrote:
On 2018-07-31 04:41 AM, Will Deacon wrote:
On Mon, Jul 30, 2018 at 06:50:34PM -0400, Alexei Colin wrote:
Platforms with a PCI bus will be offered the RapidIO menu since they may
be want support for a RapidIO PCI device. Platforms without a PCI bus
tha
On 31/07/2018 17:23:04+0300, Andy Shevchenko wrote:
> On Tue, 2018-07-31 at 17:02 +0300, Andy Shevchenko wrote:
> > On Tue, 2018-07-31 at 15:47 +0200, Alexandre Belloni wrote:
> > > Switch to device_get_match_data in probe to match the device
> > > specific
> > > data
> > > instead of using the acp
On Fri, Jul 27, 2018 at 01:17:57PM +0100, Srinivas Kandagatla wrote:
> This patch adds bindings for wcd9335 audio codec which can support both
> SLIMbus
> and I2S/I2C interface.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> .../devicetree/bindings/sound/qcom,wcd9335.txt | 123
> ++
On Fri, Jul 27, 2018 at 01:17:59PM +0100, Srinivas Kandagatla wrote:
> WCD9335 supports two lines of irqs INTR1 and INTR2.
> Multiple interrupts are muxed via these lines.
> INTR1 consists of all possible interrupt sources like:
> Ear OCP, HPH OCP, MBHC, MAD, VBAT, and SVA
> INTR2 is a subset of fi
On Tue, Jul 31, 2018 at 04:29:56PM -0400, Alex Bounine wrote:
> On 2018-07-31 08:54 AM, Alex Bounine wrote:
> > On 2018-07-31 04:41 AM, Will Deacon wrote:
> > > On Mon, Jul 30, 2018 at 06:50:34PM -0400, Alexei Colin wrote:
> > > > Platforms with a PCI bus will be offered the RapidIO menu since they
On Tue, Jul 31, 2018 at 11:23:33AM -0400, Pavel Tatashin wrote:
> Yes we free meminit when no CONFIG_MEMORY_HOTPLUG
> See here:
> http://src.illumos.org/source/xref/linux-master/include/asm-generic/vmlinux.lds.h#107
Oh, I got the point now.
Somehow I missed that we were freeing up the memory when
On Mon, Jul 30, 2018 at 10:12:01AM +0800, d...@t-chip.com.cn wrote:
> From: Levin Du
>
> ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board
> computer with USB 3.0 and Gigabit Ethernet in a form factor
> compatible with the Raspberry Pi. It is based on the Rockchip
> RK3399 SoC, powered b
On Tue, Jul 31, 2018 at 10:13 AM wrote:
>
> Xunlei Pang writes:
>
> > On 7/31/18 1:55 AM, Cong Wang wrote:
> >> On Sun, Jul 29, 2018 at 10:29 PM Xunlei Pang
> >> wrote:
> >>>
> >>> Hi Cong,
> >>>
> >>> On 7/28/18 8:24 AM, Cong Wang wrote:
> Each time we sync cfs_rq->runtime_expires with cf
How would you handle translations to languages where the word order is
different, such that you have to switch the parameters round? In such cases
you might be able to simply translate the format string - you may also have to
rearrange the parameters.
IIRC, Windows DLL translation tables get arou
Rename TSInfo, the memeber variable of struct tspec_body to ts_info.
This change clears the checkpatch issue with CamelCase naming.
This is a coding style change which should not impact runtime code
execution.
Signed-off-by: John Whitmore
---
drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c
The only useful piece of information in the header comment of this
static function was the name of the function and parameters. That
is not useful information, given that they are in the C Source of
the function declaration, a few lines below the comment. The block
comment has been removed.
This i
A number of structures have been commented out of code. Obviously they
are not used and as a result have been removed from the code.
This is a coding style change which should have no impact on runtime
code execution.
Signed-off-by: John Whitmore
---
.../staging/rtl8192u/ieee80211/rtl819x_Qos.h
The first patch is a change to the block comment on the function
cmpk_counttxstatistic(). The function is a static to the file so the
block comment could be trimmed. Unfortunately I could find no useful
information in the block comment, apart from function name and list
of parameter types, which is
The member variables of struct qos_tsinfo all cause checkpatch issues
with CamelCase naming. As the variables are used in so few places the
changes are combined into this single patch.
Additionally the member variable usReserved is never used in code so
has been removed.
These are all coding styl
The member variables of the tspec_body have been renamed to clear the
checkpatch issue with CamelCase naming. As these member variables are
never used in the code the changes are combined into this single
patch.
These changes are coding style changes which should have no impact on
runtime code exe
The macro IsACValid is renamed to resolve the checkpatch issue with
CamelCase naming. In addition the parameter has parenthesis added to
clear the checkpatch issue with precedence issues.
These changes are coding style changes and as such should have not
impact on runtime code execution.
Signed-o
The union aci_aifsn is not used as a union, but only as a struct.
The union seems to have been used to ensure that the size of the
structure was only a single byte. That size is set by the bitfield
structure, adding a union with an unused byte adds nothing.
The union has been removed. This is a co
Rename the structure OCTET_STRING to octet_string. This is to comply
with the coding style of using lowercase for types. In addition the
typedef directive is removed to clear the checkpatch issue with
defining new types.
These are coding style changes which should have no impact on runtime
code ex
A number of block comments have been changed to comply with the coding
standard. These are coding style changes which should have no impact
on runtime code execution.
Signed-off-by: John Whitmore
---
drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h | 14 +++---
1 file changed, 7 insertio
The macro UP2AC is commented out of the header file so the macro and its
associated comment are removed.
This is a coding style change which should have no impact on runtime
code execution.
Signed-off-by: John Whitmore
---
drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h | 3 ---
1 file changed
Rename the structure octet_string's member variables Octet to octet and
Length to length. This change clears the checkpatch issue with CamelCase
naming of variables.
This is purely a coding style change which should have no impact on
runtime code execution.
Signed-off-by: John Whitmore
---
.../
The union is never used as a union but only as a bitfield struct.
One side of the union (u8 charData[3];) Only seems to be present to
ensure that the structures size is 3 bytes in length. That length, of
the structure is dictated by the largest element of the union, so the
byte array only dictates
Move the union QOS_TCLAS from the header file rtl819x_Qos.h to header
file rtl819x_TS.h, where the structure is actually used, as the member
of another structure.
This is a coding style change, which should have no impact on runtime
code execution.
Signed-off-by: John Whitmore
---
.../staging/r
The union TSPEC_BODY is never used as a union. The union comprises an
array of bytes and a bitfield structure, both of which are 55 bytes in
length, but the byte array is never used. As a result the union has
been truncated to the bitfield struct, which is actually used.
Additionally the typedef h
> --- a/drivers/i2c/busses/i2c-xlp9xx.c
> +++ b/drivers/i2c/busses/i2c-xlp9xx.c
> @@ -191,28 +191,30 @@ static void xlp9xx_i2c_drain_rx_fifo(struct
> xlp9xx_i2c_dev *priv)
> if (priv->len_recv) {
> /* read length byte */
> rlen = xlp9xx_read_i2c_reg(priv, XLP9XX_I
On Sun, Jul 22, 2018 at 06:49:36PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Support the V1.1 hardware revisions with the following change:
>
> Changed power rail for MMC1 interface to a 3.3V/1.8V switchable rail in
> order to be able to run UHS SD cards in ultra high speed 1.8V
On Tue, Jul 31, 2018 at 11:58 AM Nick Desaulniers
wrote:
>
> On Tue, Jul 31, 2018 at 10:02 AM Kees Cook wrote:
> >
> > On Tue, Jul 31, 2018 at 9:48 AM, Nick Desaulniers
> > > On Tue, Jul 31, 2018 at 3:27 AM kbuild test robot wrote:
> > >>drivers/net//wireless/intel/iwlwifi/iwl-trans.c: In fu
On Tue, Jul 31, 2018 at 2:00 PM David Howells wrote:
>
> IIRC, Windows DLL translation tables get around this by having format-string
> tables with numbered parameter substitution markers.
That's what gettext() does too.
It's one of the reasons I *really* don't want to have this be an issue
at a
On Sun, Jul 22, 2018 at 11:20:10PM +0200, Andreas Färber wrote:
> From: Govindraj Raja
>
> The SDHost currently clocks the card 4x slower than it
> should do, because there is a fixed divide by 4 in the
> sdhost wrapper that is not present in the clock tree.
> To model this, add a fixed divide by
On Mon, 23 Jul 2018, Andy Lutomirski wrote:
> On 07/23/2018 05:55 AM, Fenghua Yu wrote:
> > static void __init init_vdso_funcs_data(void)
> > {
> > + struct system_counterval_t sys_counterval;
> > +
> > if (static_cpu_has(X86_FEATURE_MOVDIRI))
> > vdso_funcs_data.movdiri_sup
On 07/31/2018 06:07 PM, Mathieu Poirier wrote:
Hello,
On Thu, Jul 26, 2018 at 01:54:40PM +0100, Suzuki K Poulose wrote:
If the ETB is already enabled in sysfs mode, the ETB reports
success even if a perf mode is requested. Fix this by checking
the requested mode.
Cc: Mathieu Poirier
Signed-of
On 07/31/2018 04:50 PM, Oscar Salvador wrote:
> On Tue, Jul 31, 2018 at 11:23:33AM -0400, Pavel Tatashin wrote:
>> Yes we free meminit when no CONFIG_MEMORY_HOTPLUG
>> See here:
>> http://src.illumos.org/source/xref/linux-master/include/asm-generic/vmlinux.lds.h#107
>
> Oh, I got the point now.
Linus Torvalds wrote:
> So the fact is, I want simple English interfaces. And people who have
> issues with that should just not use them. End of story. Use the
> existing error numbers if you want internationalization, and live with
> the fact that you only get the very limited error number.
Th
On Tue, Jul 31, 2018 at 2:22 PM, Thomas Gleixner wrote:
> On Mon, 23 Jul 2018, Andy Lutomirski wrote:
>> On 07/23/2018 05:55 AM, Fenghua Yu wrote:
>> > static void __init init_vdso_funcs_data(void)
>> > {
>> > + struct system_counterval_t sys_counterval;
>> > +
>> > if (static_cpu_has(
On Tue, Jul 24, 2018 at 12:43:06PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Add toradex,apalis-tk1-v1.2 compatible.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
> Documentation/devicetree/bindings/arm/tegra.txt | 2 ++
> arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 3 ++
The ChromiumOS LSM used by ChromeOS will provide a hook for this, in
order to enforce ChromeOS-specific policies regarding which UIDs/GIDs a
process with CAP_SET{UID/GID} can transition to. The
security_task_fix_setuid LSM hook is very helpful in enabling such a feature
for ChromeOS that governs UI
On 07/31/2018 02:47 PM, Micah Morton wrote:
> The ChromiumOS LSM used by ChromeOS will provide a hook for this, in
> order to enforce ChromeOS-specific policies regarding which UIDs/GIDs a
> process with CAP_SET{UID/GID} can transition to. The
> security_task_fix_setuid LSM hook is very helpful in
On Tue, Jul 24, 2018 at 05:02:17PM +0200, Parthiban Nallathambi wrote:
> Actions Semi OWL family SoC's provides support for external interrupt
> controller to be connected and controlled using SIRQ pins. S500, S700
> and S900 provides 3 SIRQ lines and works independently for 3 external
> interrupt
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Warning level 2 was used: -Wimplicit-fallthrough=2
Signed-off-by: Gustavo A. R. Silva
---
fs/afs/cmservice.c | 10 --
fs/afs/file.c | 2 ++
fs/afs/fsclient.c | 41
On Mon 09 Jul 02:16 PDT 2018, Bhushan Shah wrote:
> The kernel would not boot on the hammerhead hardware due to the
> following error:
>
> mmc0: Timeout waiting for hardware interrupt.
> mmc0: sdhci: SDHCI REGISTER DUMP ===
> mmc0: sdhci: Sys addr: 0x0200 | Version: 0x0
I'm currently looking into cleaning up the code duplication between
current_text_addr() and _THIS_IP_, virtually every implementation of
current_text_addr() and _THIS_IP_ itself are basically:
#define _THIS_IP_ ({ __label__ _l; _l: &&_l; })
For a few arch's, they have inline assembly instead (for
On Wed, Jul 25, 2018 at 07:40:57AM +0200, John Crispin wrote:
> This patch adds the binding documentation for the HS/SS USB PHY found
> inside Qualcom Dakota SoCs.
Qualcomm
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Signed-off-by: John Crispin
> ---
> .../bindings/phy/phy-qcom-ipq
On Wed, Jul 25, 2018 at 11:36:47AM +0200, Christoph Hellwig wrote:
> From: Palmer Dabbelt
>
> This patch adds documentation on the RISC-V local interrupt controller,
> which is a per-hart interrupt controller that manages all interrupts
> entering a RISC-V hart. This interrupt controller is pres
Hi,
This is an attempt at a solution to enable wake up from suspend and deep idle
using GPIO as a wakeup source. The 845 uses a new interrupt controller (PDC)
that lies in the always-on domain and can sense interrupts that are routed to
it, when the GIC is powered off. It would then wakeup the GIC
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2acc17ce1a9c..8ccce42885c1 10
GPIOs that are wakeup capable have interrupt lines that are routed to
the always-on interrupt controller (PDC) in parallel to the pinctrl. The
interrupts listed here are the wake up lines corresponding to GPIOs.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 69 +
Add GPIO to PDC pin map for the SDM845 SoC.
Signed-off-by: Lina Iyer
---
drivers/pinctrl/qcom/pinctrl-sdm845.c | 76 +++
1 file changed, 76 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c
b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 2ab7a8885757..e9366
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to the
its interrupt controller. Select GPIOs that are deemed wakeup capable are
routed to specific PDC pins. The PDC wakes up the GIC and replays the
interrupt a
On Wed, Jul 25, 2018 at 11:36:49AM +0200, Christoph Hellwig wrote:
> From: Palmer Dabbelt
>
> This patch adds documentation for the platform-level interrupt
> controller (PLIC) found in all RISC-V systems. This interrupt
> controller routes interrupts from all the devices in the system to each
>
On Thu, Jul 12, 2018 at 08:15:19PM +0530, Bharat Kumar Gogada wrote:
> Currently PCI_BRIDGE_CTL_SERR is being enabled only in
> ACPI flow.
> This bit is required for forwarding errors reported
> by EP devices to upstream device.
> This patch enables SERR# for Type-1 PCI device.
This does seem brok
From: Bjorn Helgaas
PCI_EXP_AER_FLAGS was defined twice (with identical definitions), once
under #ifdef CONFIG_ACPI_APEI, and again at the top level. This looks like
my merge error from these commits:
fd3362cb73de ("PCI/AER: Squash aerdrv_core.c into aerdrv.c")
41cbc9eb1a82 ("PCI/AER: Squas
On 07/27/2018 11:52 PM, Roman Gushchin wrote:
[...]
> @@ -2533,6 +2541,16 @@ static int check_helper_call(struct bpf_verifier_env
> *env, int func_id, int insn
> }
>
> regs = cur_regs(env);
> +
> + /* check that flags argument in get_local_storage(map, flags) is 0,
> + * thi
Before updating the full nohz tick or the idle time on IRQ exit, we
check first if we are not in a nesting interrupt, whether the inner
interrupt is a hard or a soft IRQ.
There is a historical reason for that: the dyntick idle mode used to
reprogram the tick on IRQ exit, after softirq processing,
Build fingerprint:
'Android-x86/android_x86/x86:8.1.0/OPM6.171019.030.B1/cwhuang0618:userdebug/test-keys'
Revision: '0'
ABI: 'x86'
pid: 2899, tid: 2899, name: zygote >>> zygote <<<
signal 7 (SIGBUS), code 2 (BUS_ADRERR), fault addr 0xec8
eax ebx f0274a40 ecx 01e0 edx 0ec8
my x86 report
isPrevious: true
Build:
Android-x86/android_x86/x86:8.1.0/OPM6.171019.030.B1/cwhuang0618:userdebug/test-keys
Hardware: unknown
Revision: 0
Bootloader: unknown
Radio: unknown
Kernel: Linux version 4.18.0-rc7-android-x86_64+ (root@localhost) (gcc
version 8.2.0 (Ubuntu 8.2.0-1ubuntu2))
On 07/31/2018 06:46 PM, Mathieu Poirier wrote:
On Thu, Jul 26, 2018 at 01:54:43PM +0100, Suzuki K Poulose wrote:
At the moment, if there is no CPU specified for a given
event, we use cpu_online_mask and try to build path for
each of the CPUs in the mask. This could prevent any CPU
that is turned
On Wed, Jul 18, 2018 at 09:40:35AM +0800, Shunyong Yang wrote:
> Current DMA direction definitions in pci-dma-compat.h and dma-direction.h
> are mirrored in value. Unifying them to enhance readability and avoid
> possible inconsistency.
>
> Cc: Joey Zheng
> Signed-off-by: Shunyong Yang
Applied
+ More maintainers and lists for visibility
On Tue, Jul 31, 2018 at 3:32 PM Nick Desaulniers
wrote:
>
> I'm currently looking into cleaning up the code duplication between
> current_text_addr() and _THIS_IP_, virtually every implementation of
> current_text_addr() and _THIS_IP_ itself are basical
The set*uid system calls all call an LSM fixup hook called
security_task_fix_setuid, which allows for altering the behavior of those
calls by a security module. Comments explaining the LSM_SETID_* constants
in /include/linux/security.h imply that the constants are to be used for
both the set*uid an
On Mon, 30 Jul 2018 11:31:13 -0400 Johannes Weiner wrote:
> Subject: [PATCH] mm: memcontrol: simplify memcg idr allocation and error
> unwinding
>
> The memcg ID is allocated early in the multi-step memcg creation
> process, which needs 2-step ID allocation and IDR publishing, as well
> as two
Added missing maintainers from the previous reply
On Sunday, 23 July 2017 16:26:55 UTC-7, Andre Przywara wrote:
>
> This mailbox driver implements a mailbox which signals transmitted data
> via an ARM smc (secure monitor call) instruction. The mailbox receiver
> is implemented in firmware and can
On Fri, Jul 27, 2018 at 06:35:10PM +0100, David Howells wrote:
> Add a system call to allow filesystem information to be queried. A request
> value can be given to indicate the desired attribute. Support is provided
> for enumerating multi-value attributes.
>
> ===
> NEW SYSTEM CALL
On Mon, Jul 30, 2018 at 06:49:31PM -0700, David Rientjes wrote:
> On Mon, 30 Jul 2018, Roman Gushchin wrote:
>
> > This is a tiny implementation of cgroup-aware OOM killer,
> > which adds an ability to kill a cgroup as a single unit
> > and so guarantee the integrity of the workload.
> >
> > Alth
From: Jason Gunthorpe
Add shift_overflow() helper to assist driver authors in ensuring that
shift operations don't cause overflows or other odd conditions.
Signed-off-by: Jason Gunthorpe
Signed-off-by: Leon Romanovsky
[kees: tweaked comments and commit log, dropped unneeded assignment]
Signed-
This adds overflow tests for the new check_shift_overflow() helper to
validate overflow, signedness glitches, storage glitches, etc.
Co-developed-by: Rasmus Villemoes
Signed-off-by: Kees Cook
---
lib/test_overflow.c | 140 +++-
1 file changed, 139 inserti
From: Leon Romanovsky
[ 61.182439] UBSAN: Undefined behaviour in
drivers/infiniband/hw/mlx5/qp.c:5366:34
[ 61.183673] shift exponent 4294967288 is too large for 32-bit type 'unsigned
int'
[ 61.185530] CPU: 0 PID: 639 Comm: qp Not tainted
4.18.0-rc1-00037-g4aa1d69a9c60-dirty #96
[ 61.18
This adds the shift overflow helper, selftests, and first usage.
-Kees
Jason Gunthorpe (1):
overflow.h: Add arithmetic shift helper
Kees Cook (1):
test_overflow: Add shift overflow tests
Leon Romanovsky (1):
RDMA/mlx5: Fix shift overflow in mlx5_ib_create_wq
drivers/infiniband/hw/mlx5/q
On Tue, 31 Jul 2018, Kirill A. Shutemov wrote:
> On Tue, Jul 31, 2018 at 09:29:27AM +0300, Kirill A. Shutemov wrote:
> > On Mon, Jul 30, 2018 at 06:01:26PM -0700, Linus Torvalds wrote:
> > >
> > > So to me it looks like a historical check that simply doesn't
> > > "normally" trigger, but there's n
On 7/31/18 9:52 AM, Christoph Hellwig wrote:
On Mon, Jul 30, 2018 at 08:21:33PM -0700, Atish Patra wrote:
I found the issue. As per PLIC documentation, a hart context is a given
privilege mode on a given hart. Thus, cpu context ID & cpu numbers are not
same. Here is the PLIC register Maps in U54
From: Roman Kiryanov
Not used by goldfish.
Signed-off-by: Roman Kiryanov
---
drivers/platform/goldfish/Kconfig| 5 -
drivers/platform/goldfish/Makefile | 1 -
drivers/platform/goldfish/pdev_bus.c | 232 ---
3 files changed, 238 deletions(-)
delete mode 100644
Hi Bjorn,
Today's linux-next merge of the pci tree got a conflict in:
drivers/pci/pci.h
between commit:
44bda4b7d26e ("PCI: Fix is_added/is_busmaster race condition")
from the pci-current tree and commit:
1e4511604dfa ("PCI/AER: Expose internal API for obtaining AER information")
from
Hi Saravanan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pinctrl/devel]
[also build test ERROR on next-20180731]
[cannot apply to v4.18-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Dear RT Folks,
I'm pleased to announce the 4.14.59-rt37 stable release.
This release is just an update to the new stable 4.14.59 version
and no RT specific changes have been made.
You can get this release via the git tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-r
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/i
Darrick J. Wong wrote:
> I only have time today to review the user interface bits...
Thanks:-)
> > + fsinfo_attr_volume_id = 7,/* Volume ID (string) */
> > + fsinfo_attr_volume_uuid = 8,/* Volume UUID (LE uuid) */
> > + fsinfo_attr_volume_name = 9,/*
On Tue, Jul 31, 2018 at 11:07:00AM +0200, Michal Hocko wrote:
> On Mon 30-07-18 11:01:00, Roman Gushchin wrote:
> > For some workloads an intervention from the OOM killer
> > can be painful. Killing a random task can bring
> > the workload into an inconsistent state.
> >
> > Historically, there ar
On 2018년 08월 01일 04:39, Matthias Kaehlcke wrote:
> On Mon, Jul 16, 2018 at 10:50:50AM -0700, Matthias Kaehlcke wrote:
>> On Thu, Jul 12, 2018 at 05:44:33PM +0900, Chanwoo Choi wrote:
>>> Hi Matthias,
>>>
>>> On 2018년 07월 07일 02:53, Matthias Kaehlcke wrote:
Hi Chanwoo,
On Wed, Jul 04,
On 07/31/2018 04:09 PM, Nick Desaulniers wrote:
> + More maintainers and lists for visibility
>
Ideally the linux-a...@vger.kernel.org mailing list would be sufficient,
but I doubt that it is. :(
--
~Randy
On 07/31/2018 05:00 PM, Kees Cook wrote:
> From: Jason Gunthorpe
>
> Add shift_overflow() helper to assist driver authors in ensuring that
> shift operations don't cause overflows or other odd conditions.
>
> Signed-off-by: Jason Gunthorpe
> Signed-off-by: Leon Romanovsky
> [kees: tweaked comm
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2acc17ce1a9c..8ccce42885c1 10
Add GPIO to PDC pin map for the SDM845 SoC.
Signed-off-by: Lina Iyer
---
drivers/pinctrl/qcom/pinctrl-sdm845.c | 76 +++
1 file changed, 76 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c
b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 2ab7a8885757..e9366
Hi,
This is an attempt at a solution to enable wake up from suspend and deep idle
using GPIO as a wakeup source. The 845 uses a new interrupt controller (PDC)
that lies in the always-on domain and can sense interrupts that are routed to
it, when the GIC is powered off. It would then wakeup the GIC
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to the
its interrupt controller. Select GPIOs that are deemed wakeup capable are
routed to specific PDC pins. The PDC wakes up the GIC and replays the
interrupt a
GPIOs that are wakeup capable have interrupt lines that are routed to
the always-on interrupt controller (PDC) in parallel to the pinctrl. The
interrupts listed here are the wake up lines corresponding to GPIOs.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 69 +
Hi,
On Tue, Jul 31, 2018 at 1:39 AM, Masahiro Yamada
wrote:
> Hi Olof,
>
>
> 2018-07-22 8:24 GMT+09:00 Masahiro Yamada :
>> Hi Olof,
>>
>> 2018-07-22 6:24 GMT+09:00 Olof Johansson :
>>> On Thu, Jul 19, 2018 at 08:05:03AM +0900, Masahiro Yamada wrote:
Hi Arnd, Olof,
Please pull UniP
On Tue, Jul 31, 2018 at 05:00:38PM -0700, Kees Cook wrote:
> + /* Overflow: high bit falls off. */
> + /* 10010110 */
> + err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
> + /* 1000100010010110 */
> + err |= TEST_ONE_SHIFT(34966, 1, u16, 0, true);
> + /* 1100100010001000
On Tue, Jul 31, 2018 at 05:00:37PM -0700, Kees Cook wrote:
> From: Jason Gunthorpe
>
> Add shift_overflow() helper to assist driver authors in ensuring that
> shift operations don't cause overflows or other odd conditions.
>
> Signed-off-by: Jason Gunthorpe
> Signed-off-by: Leon Romanovsky
> [
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Warning level 2 was used: -Wimplicit-fallthrough=2
Signed-off-by: Gustavo A. R. Silva
---
fs/nfs/blocklayout/blocklayout.c | 1 +
fs/nfs/nfs3acl.c | 2 ++
fs/nfs/nfs4file
On 2018-07-31 18:09, Can Guo wrote:
This patch series adds support for UFS QMP PHY on SDM845 and the
compatible string for it. This patch series depends on the current
proposed QMP V3 USB3 UNI PHY support for sdm845 driver [1], on
the DT bindings for the QMP V3 USB3 PHYs based dirver [2], and als
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Warning level 2 was used: -Wimplicit-fallthrough=2
Signed-off-by: Gustavo A. R. Silva
---
fs/nfsd/nfs4callback.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/nfsd/nfs4callback.
OK, no problems.
-邮件原件-
发件人: Michal Hocko
发送时间: 2018年7月31日 14:55
收件人: David Rientjes ; 禹舟健(基础平台部)
抄送: kernel test robot ; Stephen Rothwell
; Kirill A. Shutemov ;
Andrea Arcangeli ; Tetsuo Handa
; Roman Gushchin ; Yang Shi
; Andrew Morton ; LKML
; l...@01.org
主题: [此邮件疑似为垃圾邮件] Re: [
Hi,
On Tue, 31 Jul 2018 22:25:01 +0800 YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling krealloc() on pointer 'p
On 2018/7/31 22:34, Thomas Gleixner wrote:
>
>
> On Tue, 31 Jul 2018, Thomas Gleixner wrote:
>
>> On Tue, 31 Jul 2018, Xu YiPing wrote:
>>> On 2018/7/30 19:03, Thomas Gleixner wrote:
__internal_add_timer(base, timer)
{
idx = calc_wheel_index(1, 1)
{
I need your help which will be of mutual benefit, please reply for further
details. Thank You
De informatie verzonden in dit e-mailbericht is voor zover mogelijk in
overeenstemming met de waarden van OSG Sevenwolden, vertrouwelijk en is
uitsluitend bestemd voor de geadresseerde(n).
On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote:
Hi Julien,
Many thanks for your patchset and I apologize for the late reply. I tried
to use your patches on my own use case and I have the following
comments...
> Add functionality to allocate interrupt lines that will deliver IRQs
On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote:
> Add support for percpu_devid interrupts treated as NMIs.
>
> Percpu_devid NMIs need to be setup/torn down on each CPU they target.
>
> The same restrictions as for global NMIs still apply for percpu_devid NMIs.
>
> Signed-off-by:
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