On 2018년 01월 04일 02:29, Sylwester Nawrocki wrote:
> On 11/27/2017 03:31 AM, Chanwoo Choi wrote:
>> This patch just removes the unneeded enumeration for PLL index.
>>
>> Signed-off-by: Chanwoo Choi
>
>
> Thanks for the patch Chanwoo, I have applied it to my tree but
> I'm afraid it will now need
On Wed, 3 Jan 2018, Thomas Gleixner wrote:
> On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
> > On Wed, Jan 03, 2018 at 11:34:46PM +0100, Thomas Gleixner wrote:
> > > Can you please send me your .config and a full dmesg ?
> >
> > I've attached a serial log from a local QEMU. I can rerun with a hi
On Wed, Jan 3, 2018 at 11:23 AM, Mauro Carvalho Chehab
wrote:
> Em Tue, 2 Jan 2018 10:48:54 +0100
> Arnd Bergmann escreveu:
>> @@ -2965,7 +2968,6 @@ void dvb_frontend_detach(struct dvb_frontend* fe)
>> dvb_frontend_invoke_release(fe, fe->ops.release_sec);
>> dvb_frontend_invoke_rele
From: Andi Kleen
Convert all indirect jumps in xen inline assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/crypto/camellia-aesni-avx2-asm_64.S | 1 +
arch/x86/include/asm/xen/hypercall.h | 3 ++-
2
From: Andi Kleen
Convert all indirect jumps in hyperv inline asm code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/include/asm/mshyperv.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/ar
From: Andi Kleen
Convert all indirect jumps in core 32/64bit entry assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/entry/entry_32.S | 5 +++--
arch/x86/entry/entry_64.S | 12 +++-
2 files changed,
From: Andi Kleen
When the kernel or a module hasn't been compiled with a retpoline
aware compiler, print a warning and set a taint flag.
For modules it is checked at compile time, however it cannot
check assembler or other non compiled objects used in the module link.
Due to lack of better lett
From: Andi Kleen
With the indirect call thunk enabled compiler two objtool
warnings are triggered very frequently and make the build
very noisy.
I don't see a good way to avoid them, so just disable them
for now.
Signed-off-by: Andi Kleen
---
tools/objtool/check.c | 11 +++
1 file cha
From: Dave Hansen
From: David Woodhouse
Add retpoline compile option in Makefile
Update Makefile with retpoline compile options. This requires a gcc with the
retpoline compiler patches enabled.
Print a warning when the compiler doesn't support retpoline
[Originally from David and Tim, but h
From: Andi Kleen
Convert all indirect jumps in 32bit checksum assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/lib/checksum_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch
From: Andi Kleen
Convert all indirect jumps in crypto assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/crypto/aesni-intel_asm.S| 5 +++--
arch/x86/crypto/camellia-aesni-avx-asm_64.S | 3 ++-
ar
From: Dave Hansen
From: David Woodhouse
retpoline is a special sequence on Intel CPUs to stop speculation for
indirect branches.
Provide assembler infrastructure to use retpoline by the compiler
and for assembler. We add the out of line trampoline used by the
compiler, and NOSPEC_JUMP / NOSPEC
From: Andi Kleen
Convert all indirect jumps in 32bit irq inline asm code to use
non speculative sequences.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/irq_32.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index a
From: Andi Kleen
Convert all indirect jumps in ftrace assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/kernel/ftrace_32.S | 3 ++-
arch/x86/kernel/ftrace_64.S | 6 +++---
2 files changed, 5 insertions(+), 4
This is a fix for Variant 2 in
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
Any speculative indirect calls in the kernel can be tricked
to execute any kernel code, which may allow side channel
attacks that can leak arbitrary kernel data.
So we want to
merged into cifs-2.6.git for-next thx
On Mon, Dec 18, 2017 at 7:30 AM, kbuild test robot
wrote:
>
> Fixes: 07495ff5d9bc ("CIFS: SMBD: Establish SMB Direct connection")
> Signed-off-by: Fengguang Wu
> ---
> smbdirect.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/f
Hi Geert,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.15-rc6 next-20180103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On Wed, Jan 03, 2018 at 11:29:50PM +0300, Konstantin Khlebnikov wrote:
> For fixing cpu_hotplug_lock recursion in tg_set_cfs_bandwidth().
Why would that need module exports?
Am Wed, 3 Jan 2018 16:40:08 +0100
schrieb Borislav Petkov :
> On Wed, Jan 03, 2018 at 02:30:36PM +0100, Lars Wendler wrote:
> > Same problem with 4.15-rc6. So I suppose that means it's a general
> > issue.
>
> So gentoo recently broke the kernel, see
>
> 3ce120b16cc5 ("kbuild: add '-fno-stack-
On Wed, Jan 3, 2018 at 12:55 PM, Ozgur wrote:
>
>
> 03.01.2018, 21:57, "Cong Wang" :
>> On Tue, Jan 2, 2018 at 3:58 PM, syzbot
>> wrote:
>>> Hello,
>>>
>>> syzkaller hit the following crash on
>>> 61233580f1f33c50e159c50e24d80ffd2ba2e06b
>>> git://git.kernel.org/pub/scm/linux/kernel/git/torva
On Wed, 3 Jan 2018 09:46:21 + Lee Jones wrote:
> Well I guess we better at least include them in the conversation.
>
> Stephen and Andrew added.
>
> On Tue, 02 Jan 2018, Andrey Smirnov wrote:
> > On Tue, Jan 2, 2018 at 7:17 AM, Lee Jones wrote:
> > > On Wed, 20 Dec 2017, Andrey Smirnov wro
On 03.01.2018 20:05, Andy Shevchenko wrote:
> On Sat, 2017-12-30 at 22:02 +0100, Maciej S. Szmigiero wrote:
>> This commit adds GPIO driver for Winbond Super I/Os.
>>
>> Currently, only W83627UHG model (also known as Nuvoton NCT6627UD) is
>> supported but in the future a support for other Winbond m
On 03/01/2018 23:20, Andy Lutomirski wrote:
>> On Jan 2, 2018, at 5:59 AM, Paolo Bonzini wrote:
>>
>> The FS and userspace GS bases are available in current->thread, while the
>> kernel GS base is a percpu variable. Skip the expensive rdmsr and just
>> get the values from memory.
>
> That fsbase
> On Jan 3, 2018, at 2:22 PM, Thomas Gleixner wrote:
>
>> On Wed, 3 Jan 2018, Andy Lutomirski wrote:
>>
>>> On Wed, Jan 3, 2018 at 10:52 AM, Thomas Gleixner wrote:
On Wed, 3 Jan 2018, Thomas Gleixner wrote:
> On Wed, 3 Jan 2018, Lars Wendler wrote:
> Am Wed, 3 Jan 2018 13:
> On Jan 3, 2018, at 2:58 PM, Thomas Gleixner wrote:
>
>
>
>> On Wed, 3 Jan 2018, Thomas Gleixner wrote:
>>
>>> On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
On Wed, Jan 03, 2018 at 11:34:46PM +0100, Thomas Gleixner wrote:
Can you please send me your .config and a full dmesg ?
>>>
>
#syz dup: KASAN: slab-out-of-bounds Write in tcp_v6_syn_recv_sock
On Wed, Jan 03, 2018 at 10:38:27PM +, Mark Rutland wrote:
> Under speculation, CPUs may mis-predict branches in bounds checks. Thus,
> memory accesses under a bounds check may be speculated even if the
> bounds check fails, providing a primitive for building a side channel.
>
> The EBPF map co
On Wed, 3 Jan 2018, Andy Lutomirski wrote:
> > On Jan 3, 2018, at 2:58 PM, Thomas Gleixner wrote:
> >> On Wed, 3 Jan 2018, Thomas Gleixner wrote:
> >>
> >>> On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
> On Wed, Jan 03, 2018 at 11:34:46PM +0100, Thomas Gleixner wrote:
> Can you please se
Am Wed, 3 Jan 2018 19:52:04 +0100 (CET)
schrieb Thomas Gleixner :
> On Wed, 3 Jan 2018, Thomas Gleixner wrote:
>
> > On Wed, 3 Jan 2018, Lars Wendler wrote:
> > > Am Wed, 3 Jan 2018 13:05:38 +0100 (CET)
> > > schrieb Thomas Gleixner :
> > > > Also can you please try Linus v4.15-rc6 with PTI e
On Wed, Jan 03, 2018 at 03:04:36PM +0530, afzal mohammed wrote:
> Let PDF & HTML's be created out of memory-barriers Text by
> reStructuring.
>
> reStructuring done were,
> 1. Section headers modification, lower header case except start
> 2. Removal of manual index(contents section), since it now
On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
> This is a fix for Variant 2 in
> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
>
> Any speculative indirect calls in the kernel can be tricked
> to execute any kernel code, which may allow side channel
>
On 12/28/17 7:36 AM, Thomas Gleixner wrote:
On Fri, 8 Dec 2017, Yang Shi wrote:
Hi Thomas,
Waiman has reviewed the patches, any comment from you is appreciated.
I'm confused there is a V3 and a V8 of the 2/2 patch in my inbox. Can you
please resend both patches in their final version?
Tha
On Tue, Dec 19, 2017 at 02:51:01PM +0800, Jun Gao wrote:
> From: Jun Gao
>
> Add MT2712 i2c binding to binding file. Compare to MT8173 i2c
> controller, MT2712 has timing adjust registers which can adjust
> the internal divider of i2c source clock, SCL duty cycle, SCL
> compare point, start(repea
On Tue, Dec 19, 2017 at 02:51:03PM +0800, Jun Gao wrote:
> From: Jun Gao
>
> Make sure i2c module clock has been enabled before i2c registers
> access.
>
> Signed-off-by: Jun Gao
Applied to for-next, thanks!
signature.asc
Description: PGP signature
On Tue, Dec 19, 2017 at 02:51:02PM +0800, Jun Gao wrote:
> From: Jun Gao
>
> Add i2c compatible for MT2712. Compare to MT8173 i2c controller,
> internal divider of i2c source clock need to be configured for
> MT2712 i2c speed calculation.
>
> Signed-off-by: Jun Gao
Applied to for-next, thanks!
There are nested loops on debug objects free path, sometimes it may take
over hundred thousands of loops, then cause soft lockup with !CONFIG_PREEMPT
occasionally, like below:
NMI watchdog: BUG: soft lockup - CPU#15 stuck for 22s! [stress-ng-getde:110342]
Modules linked in: binfmt_misc(E) tcp_di
Currently max chain counter is exported to debugfs, it just record the
counter of inner loop, however, there might be significant iterations of
external loop then it may take significant amount of time to finish all
of the checks. This may cause lockup on !CONFIG_PREEMPT kernel build
occasionally.
Hello,
On Sat, 2017-12-30 at 21:41 +0100, Eric Leblond wrote:
> Most of the code is taken from set_link_xdp_fd() in bpf_load.c and
> slightly modified to be library compliant.
I've just discovered this patch is breaking the build of samples/bpf/
(nlattr not included at least and some int type pro
> - these workarounds should have a way to disable them.
>
> Which of the two is it?
The latter clearly - because there are processors today that don't have
those problems because they are sufficiently dumb.
As for future products - you know perfectly well that none of the vendors
can answer th
Hi!
I guess half of the lkml people already know, but others may have
noticed something funny/serious is going on with Intel CPUs in last
few days. And ... it is. Apparently you can read kernel memory from
userspace, abusing speculative execution on modern CPUs.
Issue was known for half a year no
On Wed, 3 Jan 2018 10:32:07 +0100 Michal Hocko wrote:
> I've posted this as an RFC [1] and both Mike and Naoya seem to be OK
> both with patches and the approach. I have rebased this on top of [2]
> because there is a small conflict in mm/mempolicy.c. I know it is late
> in the release cycle but
register_shrinker call is made in ashmem_init, it may return error code,
so we need to check it.
Signed-off-by: Xiongwei Song
---
drivers/staging/android/ashmem.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android
Hi Linus,
On Wed, Jan 03, 2018 at 03:51:35PM -0800, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
> > This is a fix for Variant 2 in
> > https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
> >
> > Any speculative indirect calls in th
tty_ldisc_receive_buf actually returns the number of bytes processed by
receive_buf or receive_buf2.
Signed-off-by: Samuel Thibault
---
drivers/tty/tty_buffer.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/tty/tty_buffer.c
+++ b/drivers/tty/tty_buffer.c
@@ -420,7 +420
On 2018-01-04 01:08, Wang, Haiyue wrote:
On 2018-01-04 00:43, Wang, Haiyue wrote:
On 2018-01-03 23:17, Arnd Bergmann wrote:
On Wed, Jan 3, 2018 at 3:21 AM, Wang, Haiyue
wrote:
On 2018-01-03 00:23, Arnd Bergmann wrote:
On Tue, Jan 2, 2018 at 4:36 PM, Wang, Haiyue
wrote:
On 2018-01-02 2
On Wed, 3 Jan 2018, Andi Kleen wrote:
> On Wed, Jan 03, 2018 at 03:51:35PM -0800, Linus Torvalds wrote:
> > On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
> > > This is a fix for Variant 2 in
> > > https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
> > >
> >
> It should be a CPU_BUG bit as we have for the other mess. And that can be
> used for patching.
It has to be done at compile time because it requires a compiler option.
Most of the indirect calls are in C code.
So it cannot just patched in, only partially out.
-Andi
On Wed, 2018-01-03 at 21:11 +0100, Greg Kroah-Hartman wrote:
> 4.9-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Borislav Petkov
>
>
> AMD (and possibly other vendors) are not affected by the leak
> KAISER is protecting against.
[...]
> On Jan 3, 2018, at 3:42 PM, Paolo Bonzini wrote:
>
> On 03/01/2018 23:20, Andy Lutomirski wrote:
>>> On Jan 2, 2018, at 5:59 AM, Paolo Bonzini wrote:
>>>
>>> The FS and userspace GS bases are available in current->thread, while the
>>> kernel GS base is a percpu variable. Skip the expensiv
On Wed, 3 Jan 2018 10:48:00 + Mel Gorman
wrote:
> On Wed, Jan 03, 2018 at 02:53:43PM +0800, ??(Caspar) wrote:
> >
> >
> > > ?? 2017??12??2312:16?? ??
> > >
> > > From: "shidao.ytt"
> > >
> > > in commit 441c228f817f7 ("mm: fadvise: document the
> > > fadvise(FADV_DONTNE
On Wed, 3 Jan 2018, Andi Kleen wrote:
> > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > used for patching.
>
> It has to be done at compile time because it requires a compiler option.
If gcc anotates indirect calls/jumps in a way that we could patch them
using al
On Wed, Jan 03, 2018 at 09:40:04AM +, Hugues FRUCHET wrote:
> Hi Andi,
> Thanks for the patch but I would suggest to use strlcpy instead, this
> will guard msg.name overwriting and add the NULL termination in case
> of truncation:
> - memcpy(msg.name, name, sizeof(msg.name));
> - msg.n
On Wed, Jan 3, 2018 at 4:12 PM, Thomas Gleixner wrote:
>
> It should be a CPU_BUG bit as we have for the other mess. And that can be
> used for patching.
That would definitely be the right approach.
However, that's also probably quite challenging for the gcc option.
Linus
The 'if_nospec' primitive marks locations where the kernel is disabling
speculative execution that could potentially access privileged data. It
is expected to be paired with a 'nospec_{ptr,load}' where the user
controlled value is actually consumed. Architectures can optionally
implement a speculat
Linus,
please pull the latest x86-pti-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-pti-for-linus
A couple of urgent fixes for PTI:
- Fix a PTE mismatch between user and kernel visible mapping of the cpu
entry area (differs vs. the GLB bit) and
> On Jan 3, 2018, at 2:58 PM, Thomas Gleixner wrote:
>
>
>
>> On Wed, 3 Jan 2018, Thomas Gleixner wrote:
>>
>>> On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
On Wed, Jan 03, 2018 at 11:34:46PM +0100, Thomas Gleixner wrote:
Can you please send me your .config and a full dmesg ?
>>>
>
On Wed, 3 Jan 2018, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 4:12 PM, Thomas Gleixner wrote:
> >
> > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > used for patching.
>
> That would definitely be the right approach.
>
> However, that's also probably quite cha
Stefan Schake writes:
> We were calling enable_irq on bind, where it was already enabled previously
> by the IRQ helper. Additionally, dev->irq is not set correctly until after
> postinstall and so was always zero here, triggering a warning in 4.15.
> Fix both by moving the enable to the power ma
On Wed, 3 Jan 2018, Andi Kleen wrote:
> unwind_init();
> +
> +#ifndef RETPOLINE
> + add_taint(TAINT_NO_RETPOLINE, LOCKDEP_STILL_OK);
> + pr_warn("No support for retpoline in kernel compiler\n");
> + pr_warn("Kernel may be vulnerable to data leaks.\n");
That's blantantly wrong.
T
On Wed, 3 Jan 2018, Andi Kleen wrote:
Why is this all done without any configuration options?
I was thinking of a config option, but I was struggling with a name.
CONFIG_INSECURE_KERNEL, CONFIG_LEAK_MEMORY?
CONFIG_BUGGY_INTEL_CACHE (or similar)
something that indicates that this is to sup
On Thu, 4 Jan 2018, Alan Cox wrote:
> On Wed, 3 Jan 2018 16:15:01 -0800
> Andi Kleen wrote:
>
> > > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > > used for patching.
> >
> > It has to be done at compile time because it requires a compiler option.
> >
> > Most
On Wed, 3 Jan 2018 16:15:01 -0800
Andi Kleen wrote:
> > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > used for patching.
>
> It has to be done at compile time because it requires a compiler option.
>
> Most of the indirect calls are in C code.
>
> So it cannot
On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
> Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
> is also there (or not)?
I haven't been able to reproduce this on 4.15-rc6.
--Benjamin Gilbert
On 01/03/2018 04:29 PM, Thomas Gleixner wrote:
> On Wed, 3 Jan 2018, Andi Kleen wrote:
>> unwind_init();
>> +
>> +#ifndef RETPOLINE
>> +add_taint(TAINT_NO_RETPOLINE, LOCKDEP_STILL_OK);
>> +pr_warn("No support for retpoline in kernel compiler\n");
>> +pr_warn("Kernel may be vulnerab
On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
> On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
> > Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
> > is also there (or not)?
>
> I haven't been able to reproduce this on 4.15-rc6.
Hmm. So we need to scr
> On Jan 3, 2018, at 4:33 PM, Benjamin Gilbert
> wrote:
>
>> On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
>> Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
>> is also there (or not)?
>
> I haven't been able to reproduce this on 4.15-rc6.
Ah.
On Wed, Jan 03, 2018 at 04:27:04PM -0800, Andy Lutomirski wrote:
> How much memory does the affected system have? It sounds like something
> is mapped in the LDT region and is getting corrupted because the LDT code
> expects to own that region.
We've seen this on systems from 1 to 7 GB.
--Benjam
> So you say, that we finally need a perl interpreter in the kernel to do
> alternative patching?
No but for weird cases like that
gcc -S
perl -e
as
does work.
Alan
On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams wrote:
> The 'if_nospec' primitive marks locations where the kernel is disabling
> speculative execution that could potentially access privileged data. It
> is expected to be paired with a 'nospec_{ptr,load}' where the user
> controlled value is actuall
> So you say, that we finally need a perl interpreter in the kernel to do
> alternative patching?
I don't think perl or objtool makes sense. That would be just incredibly
fragile because compilers can reorder and mix code.
It could be done with a gcc change I suppose. That should be reliable.
B
Hi,
In all my years of extensive experience writing drivers and kernels, I never
came across a situation
where you could brick an x86 CPU. Not until recently, when I was working on
debugging a piece of
code and I bricked an Intel CPU. I am not talking about an experimental
motherboard or anyt
Remove empty lines, useless comments and sort rules by alphabetical
order.
Signed-off-by: Cyrille Pitchen
---
Hi Bjorn,
This is the kernel oops I get when I test this patch.
I've applied it on top of the series for the Cadence PCIe controller.
I didn't have time to investigate more yet, sorry!
On Wed, Jan 3, 2018 at 3:51 PM, Linus Torvalds
wrote:
> On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
>> This is a fix for Variant 2 in
>> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
>>
>> Any speculative indirect calls in the kernel can be tricked
On 1/3/2018 2:40 PM, Arnd Bergmann wrote:
The uplink_rpriv variable was added at the start of the function but
only used inside of an #ifdef:
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c: In function
'mlx5e_route_lookup_ipv6':
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c:1549:25: error:
On Wed, 3 Jan 2018 16:39:31 -0800
Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams wrote:
> > The 'if_nospec' primitive marks locations where the kernel is disabling
> > speculative execution that could potentially access privileged data. It
> > is expected to be paired with
Hi Gang,
On 2018/1/3 13:14, Gang He wrote:
> Hi Alex,
>
>
>> Hi Gang,
>>
>> On 2017/12/28 18:07, Gang He wrote:
>>> Add ocfs2_overwrite_io function, which is used to judge if
>>> overwrite allocated blocks, otherwise, the write will bring extra
>>> block allocation overhead.
>>>
>>> Signed-
On 2018/1/4 2:58, Jaegeuk Kim wrote:
> Let's show precise # of blocks that user/root can use through bavail and bfree
> respectively.
>
> Signed-off-by: Jaegeuk Kim
> ---
> fs/f2fs/super.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fs/f2fs/super.c b/fs/f2fs/sup
[ adding Julia and Dan ]
On Wed, Jan 3, 2018 at 5:07 PM, Alan Cox wrote:
> On Wed, 3 Jan 2018 16:39:31 -0800
> Linus Torvalds wrote:
>
>> On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams
>> wrote:
>> > The 'if_nospec' primitive marks locations where the kernel is disabling
>> > speculative executi
Hi Geert,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.15-rc6 next-20180103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On 2018/1/4 3:06, Jaegeuk Kim wrote:
> On 01/03, Chao Yu wrote:
>> On 2018/1/3 10:21, Jaegeuk Kim wrote:
>>> This patch allows root to reserve some blocks via mount option.
>>>
>>> "-o reserve_root=N" means N x 4KB-sized blocks for root only.
>>>
>>> Signed-off-by: Jaegeuk Kim
>>> ---
>>>
>>> Chan
On 04/01/2018 01:16, Andy Lutomirski wrote:
>> Note that the value I'm storing in HOST_FS_BASE and HOST_GS_BASE is
>> only used if FS/GS selector is zero. If FS/GS selector is not
>> zero, it is not used. Does that avoid this issue?
>>
> I'm not convinced that this is correct. It's not obviousl
Mel Gorman writes:
> On Wed, Jan 03, 2018 at 08:42:15AM +0800, Huang, Ying wrote:
>> Mel Gorman writes:
>>
>> > On Tue, Jan 02, 2018 at 12:29:55PM +0100, Jan Kara wrote:
>> >> On Tue 02-01-18 10:21:03, Mel Gorman wrote:
>> >> > On Sat, Dec 23, 2017 at 10:36:53AM +0900, Minchan Kim wrote:
>> >>
On 2018/1/4 4:12, Jaegeuk Kim wrote:
> On 01/03, Chao Yu wrote:
>> If we need an array with variable size in the end of structure, we
>> can utilize flexible array feature which is supported in C99, so
>> let's change sit_nat_version_bitmap[] to flexible array in struct
>> f2fs_checkpoint for reada
On Wed, 2018-01-03 at 21:11 +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.75 release.
> There are 39 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
[...]
Hi,
2 month ago.
I start topic about replace jhash with xxhash.
That a another topic, about replace replace in memory hashing with xxhash.
Or at least make some light on that.
I use simple printk() in jhash/jhash2, to get correct input sizes,
so, at least on x86_64 systems, most of inputs are:
16
On Thu, 4 Jan 2018, Alan Cox wrote:
> There are people trying to tune coverity and other tool rules to identify
> cases,
Yeah, but that (and *especially* Coverity) is so inconvenient to be
applied to each and every patch ... that this is not the way to go.
If the CPU speculation can cause thes
Hi Shoaib,
Good to see you set out a patchset ;-)
On Tue, Jan 02, 2018 at 02:49:25PM -0800, Rao Shoaib wrote:
>
>
> On 01/02/2018 02:23 PM, Matthew Wilcox wrote:
> > On Tue, Jan 02, 2018 at 12:11:37PM -0800, rao.sho...@oracle.com wrote:
> > > -#define kfree_rcu(ptr, rcu_head)
On Wed, Jan 03, 2018 at 04:33:03PM -0800, Benjamin Gilbert wrote:
> I haven't been able to reproduce this on 4.15-rc6.
This is bad data. I was caught by the fact that 4.14.11 has
PAGE_TABLE_ISOLATION default y but 4.15-rc6 doesn't. Retesting.
--Benjamin Gilbert
On 2018/1/2 19:02, Yunlong Song wrote:
>
>
> On 2018/1/2 14:49, Chao Yu wrote:
>> On 2017/12/30 15:42, Yunlong Song wrote:
>>> In some case, the node blocks has wrong blkaddr whose segment type is
>> You mean *data block* has wrong blkaddr whose segment type is NODE?
> Yes.
>>
>>> NODE, e.g., rec
On 2018/1/4 4:13, Arnaldo Carvalho de Melo wrote:
Em Wed, Jan 03, 2018 at 03:33:07PM -0300, Arnaldo Carvalho de Melo escreveu:
Em Wed, Jan 03, 2018 at 03:27:01PM -0300, Arnaldo Carvalho de Melo escreveu:
Continuing investigation...
After applying the fallback patch to allow new tools to work
Hi Gang,
On 2017/12/14 13:14, Gang He wrote:
> As you know, ocfs2 has support trim the underlying disk via
> fstrim command. But there is a problem, ocfs2 is a shared disk
> cluster file system, if the user configures a scheduled fstrim
> job on each file system node, this will trigger multiple no
On Thu, 4 Jan 2018 02:27:54 +0100 (CET)
Jiri Kosina wrote:
> On Thu, 4 Jan 2018, Alan Cox wrote:
>
> > There are people trying to tune coverity and other tool rules to identify
> > cases,
>
> Yeah, but that (and *especially* Coverity) is so inconvenient to be
> applied to each and every pat
On 04/01/2018 00:51, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
>> This is a fix for Variant 2 in
>> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
>>
>> Any speculative indirect calls in the kernel can be tricked
>> to execut
On Wed, Jan 03, 2018 at 03:04:36PM +0530, afzal mohammed wrote:
> Let PDF & HTML's be created out of memory-barriers Text by
> reStructuring.
>
> reStructuring done were,
> 1. Section headers modification, lower header case except start
> 2. Removal of manual index(contents section), since it now
On Thu, 4 Jan 2018, Alan Cox wrote:
> > If the CPU speculation can cause these kinds of side-effects, it just must
> > not happen, full stop.
>
> At which point your performance will resemble that of a 2012 atom
> processor at best.
You know what? I'd be completely fine with that, if it's trad
On Wed, Jan 3, 2018 at 5:27 PM, Jiri Kosina wrote:
> On Thu, 4 Jan 2018, Alan Cox wrote:
>
>> There are people trying to tune coverity and other tool rules to identify
>> cases,
>
> Yeah, but that (and *especially* Coverity) is so inconvenient to be
> applied to each and every patch ... that this
On Wed, Jan 3, 2018 at 5:51 PM, Dan Williams wrote:
>
> Elena has done the work of auditing static analysis reports to a dozen
> or so locations that need some 'nospec' handling.
I'd love to see that patch, just to see how bad things look.
Because I think that really is very relevant to the inte
Hello,
on an Ivybridge CPU, I get with 4.14.11:
BUG: using smp_processor_id() in preemptible [] code:
ovsdb-server/4510
caller is native_flush_tlb_single+0x57/0xc0
CPU: 3 PID: 4510 Comm: ovsdb-server Not tainted
4.14.11-kvm-00434-gcd0b8eb84f5c #3
Hardware name: MSI MS-7798/B
> But then, exactly because the retpoline approach adds quite some cruft
> and leaves something to be desired, why even bother? Intel has also
Performance
> Also, according to Google the KVM PoC can be broken simply by clearing
> the registers on every exit to the hypervisor. Of course it's jus
From: Andi Kleen
Convert all indirect jumps in 32bit irq inline asm code to use
non speculative sequences.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/irq_32.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index a
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