On Wed, 2017-05-17 at 22:05 -0700, Bjorn Andersson wrote:
>
> It seems very important to a lot of people...
I get blinking, I guess, but I don't get toggling for every packet :)
The throughput thing we did in iwlwifi seems like a so much better
idea. Not that it really matters for this discussion
On Thu, 18 May 2017 15:27:11 +0900
Masahiro Yamada wrote:
> Hi Boris,
>
>
>
> 2017-05-15 20:54 GMT+09:00 Boris Brezillon
> :
> > Hi Masahiro,
> >
> > Sorry for the late reply.
> >
> > On Mon, 8 May 2017 12:40:47 +0900
> > Masahiro Yamada wrote:
> >
> >> Hi Boris,
> >>
> >>
> >> 2017-04-29
On Thu, 2017-05-18 at 08:26 +0200, Christoph Hellwig wrote:
> We don't use uuid_be and the UUID_BE constants in any uapi headers, so make
> them private to the kernel.
On the assumption that no user program uses them?
Is that a safe assumption?
> diff --git a/include/uapi/linux/uuid.h b/include/u
On Thu, May 18, 2017 at 12:12:45AM -0700, Joe Perches wrote:
> On Thu, 2017-05-18 at 08:26 +0200, Christoph Hellwig wrote:
> > We don't use uuid_be and the UUID_BE constants in any uapi headers, so make
> > them private to the kernel.
>
> On the assumption that no user program uses them?
> Is that
* Yury Norov wrote:
> On Tue, May 16, 2017 at 10:30:42AM +0200, Ingo Molnar wrote:
> >
> > * Yury Norov wrote:
> >
> > > I collected about 700 results in dmesg, and took 600 fastest.
> > > For the vanilla kernel, the average value is 368, and for patched
> > > kernel it is 388. It's 5% slower
On Wed, May 17, 2017 at 07:53:35PM -0700, Randy Dunlap wrote:
>
> I did a 'git pull' for updates. On the rebuild, I get this error:
>
> macro_table.c:30:31: fatal error: cwchash/hashtable.h: No such file or
> directory
> #include "cwchash/hashtable.h"
>
> My problem?
>
> thanks for your help.
Am 17.05.2017 20:13, schrieb Colin King:
> From: Colin Ian King
>
> The current for loop decrements i when it is zero and this causes
> a wrap-around back to ~0 because i is unsigned. In the unlikely event
> that mask is 0, the loop will run forever. Fix this so we can't loop
> forever.
>
> De
The Pine64 (including Pine64+) boards have an AXP803 PMIC, which is a PMIC
similar to AXP288, but tweaked to use with Allwinner SoCs rather than Intel
tablets (with DCIN and Vbus re-splitted like other AXP PMICs, and RSB bus
support added).
This patchset adds support for it and enabled it in Pine6
The A31 NMI driver seems to be using wrong base address.
As we're going to convert to use a correct NMI base address (and
correctly name it to R_INTC as the datasheet suggests), add a new
compatible string for the "correct" R_INTC, which we will use for A64
SoC.
Signed-off-by: Icenowy Zheng
Acke
The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.
Add its device node.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebase on next-20170517.
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64
* Mikulas Patocka wrote:
> On Tue, 16 May 2017, H. Peter Anvin wrote:
>
> > On 04/18/17 12:07, Mikulas Patocka wrote:
> > >
> > > However, on AMD K6-3 CPU, the processor initialization code never calls
> > > pat_init() and so __pat_enabled stays 1 and the function pat_enabled()
> > > returns t
As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
like the old DTSI files for AXP20x/22x, for the common parts of the
PMIC.
Signed-off-by: Icenowy Zheng
Acked-by: Mark Brown
---
Changes in v5:
- Added Mark Brown's ACK.
Changes in v4:
- Re-sorted the nodes.
arch/arm64/boot
AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
controllable via I2C/RSB bus.
Add support for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v4:
- Fixed somewhere which mention AXP806 before 803.
Changes in v2:
- Place AXP803 codes before AXP806/809 ones.
As axp20x-regulator now supports AXP803, add a cell for it.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v5:
- Removed wrong snippet.
Changes in v4:
- Added a trailing comma for new cell, for easier further cell addition.
Changes in v3:
- Make the new cell one-liner.
driv
Add support of AXP803 regulators in the Pine64 device tree, in order to
enable many future functionalities, e.g. Wi-Fi.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebased on next-20170517.
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 +
1 file changed, 109
The Wi-Fi module of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Add device node for it.
Although the Wi-Fi module is an external module which should be inserted
to a header, according to my personal talk with TL Lim, he does not want
this header to be used as GPIO
e wrong git tree, please drop us a note to
> > help improve the system]
> >
> > url:
> > https://github.com/0day-ci/linux/commits/Frank-Wang/add-and-fix-some-devi
> > ce-node-for-rk322x-SoC/20170518-081958 base:
> > https://git.kernel.org/pub/scm/linux/
Allwinner A64 SoC features a R_INTC controller, which controls the NMI
line, and this interrupt line is usually connected to the AXP PMIC.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v4:
- Changes it to use R_INTC binding and change node label to r_intc.
- Fixed MMIO region.
Add support for the newly imported compatible for the A64 R_INTC in
irq-sunxi-nmi driver.
Signed-off-by: Icenowy Zheng
---
Changes in v5:
- Fix A64 R_INTC compatible.
drivers/irqchip/irq-sunxi-nmi.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/irqchip/irq-sunxi-nmi
Hey Linus,
On Wed, May 17, 2017 at 10:05 PM, Linus Walleij
wrote:
> This merges the Moxa Art timer driver into the Faraday FTTMR010
> driver and replaces all Kconfig symbols to use the Faraday
> driver instead. We are now so similar that the drivers can
> be merged by just adding a few lines to t
Hello Sumit,
please Cc kernel mailing list.
Cc Petr, Peter, Steven, kernel-list
On (05/18/17 12:22), Sumit Gemini wrote:
>Hi Sergey,
>
> I read your comment on [1]https://lkml.org/lkml/2016/9/27/279. Here you were
> talking about using alt_printk instead of printk.
> I Got this crash, co
> Il giorno 17 mag 2017, alle ore 21:12, Tejun Heo ha scritto:
>
> Hello,
>
> On Mon, May 15, 2017 at 09:49:13PM +0200, Paolo Valente wrote:
>> So, unless you tell me that there are other races I haven't seen, or,
>> even worse, that I'm just talking nonsense, I have thought of a simple
>> solu
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年5月18日 4:29
收件人: songxiaowei
抄送: Bjorn Helgaas; Kishon; Jingoo Han; Tomasz Nowicki; Keith Busch;
niklas.cas...@axis.com; Duc Dang; liudongdong (C); Chenfeng (puck); Guodong Xu;
Wangbinghui; Suz
On Thu, May 18, 2017 at 11:58:06AM +0800, Chen-Yu Tsai wrote:
> +/*
> + * MMC2 supports both old and new timing modes. When the new timing
> + * mode is active, the output clock rate is halved by two. Here we
> + * treat it as a variable pre-divider. Note that the pre-divider is
> + * _not_ include
On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng wrote:
> The A31 NMI driver seems to be using wrong base address.
>
> As we're going to convert to use a correct NMI base address (and
> correctly name it to R_INTC as the datasheet suggests), add a new
> compatible string for the "correct" R_INTC, wh
On Wed, May 17, 2017 at 07:36:46PM +0200, Markus Trippelsdorf wrote:
> Since:
> commit cfafcd117da0216520568c195cb2f6cd1980c4bb
> Author: Peter Zijlstra
> Date: Wed Mar 22 11:35:58 2017 +0100
>
> futex: Rework futex_lock_pi() to use rt_mutex_*_proxy_lock()
>
> glibc's nptl/tst-robustpi8 te
On 18 May 2017 at 00:24, Greg Hackmann wrote:
> On 05/11/2017 06:51 AM, Ard Biesheuvel wrote:
> [snip]
>>
>> In my opinion, the correct fix would be to make -fpie (as opposed to
>> -fpic) imply hidden visibility, given that PIE executables don't
>> export symbols in the first place
From: Colin Ian King
Trivial fix to spelling mistake in tb_sw_warn warning message
Signed-off-by: Colin Ian King
---
drivers/thunderbolt/eeprom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c
index 6392990c984d..
On Thu, May 18, 2017 at 10:53:32AM +0800, Icenowy Zheng wrote:
> The Lichee Pi Zero Dock dtb file is not added to the Makefile, so that
> it won't be built; and the file contains a problem that prevents it
> from being correctly built.
>
> Fix these issues.
>
> Signed-off-by: Icenowy Zheng
I sq
We expect to timeout with "try" set to zero but it's a post-op so
actually it ends with it set to -1. I've fixed this by changing it to a
pre-op.
Fixes: 024812889ad1 ("phy: Add SATA3 PHY support for Broadcom NSP SoC")
Signed-off-by: Dan Carpenter
diff --git a/drivers/phy/broadcom/phy-brcm-sata.
Hisilicon PCIe Driver shares the common functions fo PCIe dw-host
The poweron functions is developed on hi3660 SoC, while Others Functions
are common for Kirin series SoCs.
Lowpower(L1ss and SR), hotplug and MSI feature are not supported
currently.
Cc: Guodong Xu
Signed-off-by: Song Xiaowei
--
On Thu, May 18, 2017 at 7:33 AM, Richard Leitner wrote:
>>> 2. What would be a good prefix for common headers/functions/macros/etc.?
>>> I thought of "mcusbhub"... Would that be OK? Or are there any
>>> conventions/better proposals on that?
>>
>>
>> If you are going to develop one driver for entir
From: Colin Ian King
Trivial fix to spelling mistake in dev_err message
Signed-off-by: Colin Ian King
---
sound/soc/generic/audio-graph-card.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/generic/audio-graph-card.c
b/sound/soc/generic/audio-graph-card.c
index
Cc: Guodong Xu
Signed-off-by: Song Xiaowei
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 7c48028ec64a..d56d8f1062ab 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfi
This patch fixes the kernel oops when release net_device reference in
advance. In function raw_sendmsg(i think the dgram_sendmsg has the same
problem), there is a race condition between dev_put and dev_queue_xmit
when the device is gong that maybe lead to dev_queue_ximt to see
an illegal net_devi
On Wed 17-05-17 11:16:39, Ross Zwisler wrote:
> We currently have two related PMD vs PTE races in the DAX code. These can
> both be easily triggered by having two threads reading and writing
> simultaneously to the same private mapping, with the key being that private
> mapping reads can be handle
Add PCIe node for hi3660, and add binding documentation.
Cc: Guodong Xu
Signed-off-by: Song Xiaowei
---
.../devicetree/bindings/pci/hisilicon-pcie.txt | 52 ++
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 31 +
2 files changed, 83 insertions(+)
diff
On Thu, May 18, 2017 at 3:39 PM, Maxime Ripard
wrote:
> On Thu, May 18, 2017 at 11:58:06AM +0800, Chen-Yu Tsai wrote:
>> +/*
>> + * MMC2 supports both old and new timing modes. When the new timing
>> + * mode is active, the output clock rate is halved by two. Here we
>> + * treat it as a variable
On Wed, May 17, 2017 at 05:50:45PM +0800, Chen-Yu Tsai wrote:
> On Wed, May 17, 2017 at 3:40 PM, Maxime Ripard
> wrote:
> > It appears that the total vertical resolution needs to be doubled when
> > we're not in interlaced. Make sure that is the case.
> >
> > Signed-off-by: Maxime Ripard
> > ---
On Thu, May 18, 2017 at 03:16:46PM +0800, Icenowy Zheng wrote:
> Add support for the newly imported compatible for the A64 R_INTC in
> irq-sunxi-nmi driver.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Maxime Ripard
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
On Thu, May 18, 2017 at 03:16:45PM +0800, Icenowy Zheng wrote:
> The A31 NMI driver seems to be using wrong base address.
>
> As we're going to convert to use a correct NMI base address (and
> correctly name it to R_INTC as the datasheet suggests), add a new
> compatible string for the "correct" R
On Thu, May 18, 2017 at 9:27 AM, Christoph Hellwig wrote:
> Everything uses uuid_t now.
>
> Signed-off-by: Christoph Hellwig
> ---
Excellent!
I reviewed the entire series. You may add
Reviewed-by: Amir Goldstein
to any of the patches as you see fit.
Now let's talk about how this is going to b
On Wed 17-05-17 20:43:16, Roman Gushchin wrote:
> On Wed, May 17, 2017 at 06:14:46PM +0200, Michal Hocko wrote:
> > On Wed 17-05-17 16:26:20, Roman Gushchin wrote:
[...]
> > > After some investigations I've found some issues:
> > >
> > > 1) Prior to commit 1af8bb432695 ("mm, oom: fortify task_will
For case 2 and 3, adjust cached32_node to the new place, case 1 keep no
change.
For example:
case1: (the right part was allocated)
|--|
|<-free>|<--new_iova-->|
|
|
cached32_node
case2: (all was allocated)
|---
Below judgement can only be satisfied at the last time, which produced 2N
judgements(suppose N times failed, 0 or 1 time successed) in vain.
if ((pfn >= iova->pfn_lo) && (pfn <= iova->pfn_hi)) {
return iova;
}
Signed-off-by: Zhen Lei
Reviewed-by: Robin Murphy
---
drivers/iommu/iova.c |
I'm not sure whether the compiler can optimize it, but move it out will
be better. At least, it does not require lock protection.
Signed-off-by: Zhen Lei
---
drivers/iommu/iova.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/iommu/iova.c b/d
Currently we always search free iova space for dma64 begin at the last
node of iovad rb-tree. In the worst case, there maybe too many nodes exist
at the tail, so that we should traverse many times for the first loop in
__alloc_and_insert_iova_range. As we traced, more than 10K times for the
case of
v2 -> v3:
It's been a long time. I have not received any advise except Robin Murphy's. So
the major changes is just deleted an old patch ("iommu/iova: fix incorrect
variable types")
and merged it into patch 5 of this version.
v1 -> v2:
Because the problem of my email-server, all patches sent to J
Reserve the first granule size memory(start at start_pfn) as boundary
iova, to make sure that iovad->cached32_node can not be NULL in future.
Meanwhile, changed the assignment of iovad->cached32_node from rb_next to
rb_prev of &free->node in function __cached_rbnode_delete_update.
Signed-off-by: Z
To make sure iovad->cached32_node and iovad->cached64_node can exactly
control dma32 and dma64 area. It also help us to remove the parameter
pfn_32bit of init_iova_domain.
Signed-off-by: Zhen Lei
---
drivers/iommu/amd_iommu.c| 7 ++-
drivers/iommu/dma-iommu.c| 21 ---
On 2017.05.18 at 09:40 +0200, Peter Zijlstra wrote:
> On Wed, May 17, 2017 at 07:36:46PM +0200, Markus Trippelsdorf wrote:
> > Since:
> > commit cfafcd117da0216520568c195cb2f6cd1980c4bb
> > Author: Peter Zijlstra
> > Date: Wed Mar 22 11:35:58 2017 +0100
> >
> > futex: Rework futex_lock_pi()
Commit d17cab4451df1 ("irqchip: Kill off set_irq_flags usage") changed
the code of armada_370_xp_mpic_irq_map() from using set_irq_flags() to
irq_set_probe().
While the commit log seems to imply that there are no functional
changes, there are indeed functional changes introduced by this commit:
th
In order to clarify to which register base the various register
definitions apply, this commit re-orders them, and adds a comment that
clearly indicate which registers are relative to "main_int_base" and
which registers are relative to "per_cpu_int_base".
Signed-off-by: Thomas Petazzoni
Acked-by:
This reverts commit 353d6d6c82e5d2533ba22e7f9fb081582bf50dc2, which is
no longer needed, now that the irq-armada-370-xp driver properly
re-enables per-CPU interrupt on both the boot CPU and secondary CPUs
after resume.
Signed-off-by: Thomas Petazzoni
---
drivers/irqchip/irq-armada-370-xp.c | 1 -
Since the overall logic of the driver to handle the global and per-CPU
masking of the interrupts is far from trivial, this commit adds a long
comment detailing how the hardware operates and what strategy the
driver implements on top of that.
Signed-off-by: Thomas Petazzoni
Acked-by: Gregory CLEME
On Wed, May 17, 2017 at 09:16:47PM +, Chris Packham wrote:
> MV64x60 is pretty old. I considered gutting mv64x60_edac.c to make a
> separate driver but that would just be more code to maintain.
Well, one thing we did with layerscape and mpc85xx EDAC modules is share
the FSL memory controller
Hello,
This is the third version of a patch series initially posted in
October 2015, under the title:
[PATCH 0/5] Fix regression introduced by set_irq_flags() removal
at the time, the regression was worked around in commit
353d6d6c82e5d2533ba22e7f9fb081582bf50dc2 ("irqchip/armada-370-xp: Fix
r
On Wed, May 17, 2017 at 1:31 PM, David Howells wrote:
> Miklos Szeredi wrote:
>
>> > (b) is internal-only at the moment, used by NFS submounts as triggered by
>> > automounts. There isn't currently any way to supply mount options to this.
>>
>> And all blockdev based fs.
>
> I see what you're ge
Hi Colin
> From: Colin Ian King
>
> Trivial fix to spelling mistake in dev_err message
>
> Signed-off-by: Colin Ian King
> ---
Grr... I want to have brown paper bag
Acked-by: Kuninori Morimoto
> sound/soc/generic/audio-graph-card.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
On 18/05/17 11:00, Byungchul Park wrote:
> On Fri, May 12, 2017 at 10:05:59AM +0900, Byungchul Park wrote:
> > pick_next_pushable_dl_task(rq) has BUG_ON(rq->cpu != task_cpu(task))
> > when it returns a task other than NULL, which means that task_cpu(task)
> > must be rq->cpu. So if task == nex
On Wed, May 17, 2017 at 10:21:09AM +0100, Anoob Soman wrote:
> On 17/05/17 09:19, Greg KH wrote:
> > Why is this a non-upstream patch? What commit in Linus's tree fixed
> > this? Why not just backport that?
> >
> > thanks,
> >
> > greg k-h
>
> Agreed, I think it is sensible to backport 52bd2d6
On 05/18/2017 09:40 AM, Peter Zijlstra wrote:
> OK, so how do I get those tests build?
>
> I did a checkout of glibc.git
>
> glibc$ mkdir build; cd build
> build$ ../configure --disable-sanity-checks ; make -j40
> build$ ./nptl/tst-robustpi8
> -bash: ./nptl/tst-robustpi8: No such file or director
On Thu, May 18, 2017 at 10:04:39AM +0200, Markus Trippelsdorf wrote:
> On 2017.05.18 at 09:40 +0200, Peter Zijlstra wrote:
> > On Wed, May 17, 2017 at 07:36:46PM +0200, Markus Trippelsdorf wrote:
> > > Since:
> > > commit cfafcd117da0216520568c195cb2f6cd1980c4bb
> > > Author: Peter Zijlstra
> > >
On Mittwoch, 17. Mai 2017 07:12:21 CEST Namhyung Kim wrote:
> On Tue, May 16, 2017 at 06:26:47PM +0200, Milian Wolff wrote:
> > On Dienstag, 16. Mai 2017 18:17:26 CEST Milian Wolff wrote:
> > > On Dienstag, 16. Mai 2017 16:38:29 CEST Namhyung Kim wrote:
> > > > On Tue, May 16, 2017 at 10:59:51AM +0
From: MaJun
Just skip the irq affinity setting when the target cpu is the same as
current setting.
This is a small optimization for irq affinity setting logic.
Signed-off-by: MaJun
---
drivers/irqchip/irq-gic-v3-its.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a
On Wed, May 17, 2017 at 02:09:52PM +0200, Petr Mladek wrote:
> On Tue 2017-05-16 13:48:06, Christoph Hellwig wrote:
> > KTHREAD_DELAYED_WORK_INIT and DEFINE_KTHREAD_DELAYED_WORK are unused
> > and are using a timer helper that's about to go away.
>
> A patch using this API is flying around, see
>
Am 17.05.2017 um 14:23 schrieb Michal Hocko:
As it turned out my allyesconfig on x86_64 wasn't sufficient and 0day
build machinery found a failure on arm architecture. It was clearly a
typo. Now I have pushed this to my build battery with cross arch
compilers and it passes so there shouldn't more
> b) give the union a name (breaks any reference to timer_list->func in C code):
>
> + union {
> + void(*func)(struct timer_list *timer);
> + void(*function)(unsigned long);
> + } u;
I'll look into that, as it seems a lot safer,
On Tue, May 16, 2017 at 09:43:34PM +0200, Arnd Bergmann wrote:
> > - * Don't use the macros below, use DECLARE_TIMER and INIT_TIMER with their
> > + * Don't use the macro below, use DECLARE_TIMER and INIT_TIMER with their
> > * improved callback signature above.
> > */
> > -#define __TIMER_INIT
Hi,
On 05/17/2017 12:16 AM, Eric Anholt wrote:
Laurent Pinchart writes:
Hi Eric,
On Tuesday 16 May 2017 09:47:49 Eric Anholt wrote:
Rob Herring writes:
On Mon, May 15, 2017 at 7:03 PM, Eric Anholt wrote:
Laurent Pinchart writes:
Hi Eric,
Thank you for the patch.
On Thursday 11 May 2
On Tue, May 16, 2017 at 10:26:39PM +0200, Arnd Bergmann wrote:
> If we keep the unusual *_timer() naming (rather than timer_*() as hrtimer
> has), we could use one of
>
> a) start_timer(struct timer_list *timer, unsigned long ms);
> b) restart_timer(struct timer_list *timer, unsigned long ms);
> c
On May 15, 2017, at 11:07, Davidlohr Bueso wrote:
>
> This replaces the in-house version, which is also derived
> from Jan's interval tree implementation.
>
> Cc: oleg.dro...@intel.com
> Cc: andreas.dil...@intel.com
> Cc: jsimm...@infradead.org
> Cc: lustre-de...@lists.lustre.org
> Signed-off-by
Change this from mpc85xx_pci_err to mv64x60_pci_err. The former is
likely a hangover from when this driver was created.
Signed-off-by: Chris Packham
---
drivers/edac/mv64x60_edac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv6
On Thu, May 18, 2017 at 10:12:04AM +0200, Florian Weimer wrote:
> On 05/18/2017 09:40 AM, Peter Zijlstra wrote:
> > OK, so how do I get those tests build?
> >
> > I did a checkout of glibc.git
> >
> > glibc$ mkdir build; cd build
> > build$ ../configure --disable-sanity-checks ; make -j40
> > bui
I'm looking at making use of the mv64x60_edac driver for the armada processors.
It appears that at least the DRAM ECC error reporting is the same block from
the old Marvell Discovery class of processors. On the ARM side I need to get
the error interrupts exposed first before I can send my second se
Signed-off-by: Chris Packham
---
drivers/edac/mv64x60_edac.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c
index 14b7e7b71eaa..454e1e26ee7c 100644
--- a/drivers/edac/mv64x60_edac.c
+++ b/drivers/edac/mv64x60_edac.c
@@ -853,8 +853,6
To allow this driver to be used on non-powerpc platforms it needs to use
io accessors suitable for all platforms.
Signed-off-by: Chris Packham
---
Notes:
Changes in v2:
- use readl/writel as suggested.
drivers/edac/mv64x60_edac.c | 84 ++---
1 fi
The newly added suspend/resume support causes harmless warnings
when CONFIG_PM is disabled:
smartpqi/smartpqi_init.c:5147:12: error: 'pqi_ctrl_wait_for_pending_io' defined
but not used [-Werror=unused-function]
smartpqi/smartpqi_init.c:2019:13: error: 'pqi_wait_until_lun_reset_finished'
defined
On 05/18/2017 10:31 AM, Peter Zijlstra wrote:
> That more or less worked, it still failed:
>
> /usr/bin/ld: /usr/local/src/glibc/build/nptl/tst-once5.o: relocation
> R_X86_64_32 against `.text' can not be used when making a shared object;
> recompile with -fPIC
> /usr/bin/ld: final link failed:
Rework the getpos() helper function and use it to remove various
open-coded implemetnations of its funtionality.
v2 -> v3:
- getfill() returns no entry if not found the fill position
v1 -> v2:
- getpos() returns no entry if not found the key
Reviewed-by: Andy Shevchenko
Signed-off-by: Leno
Signed-off-by: Leno Hou
---
lib/btree_test.c | 77
1 file changed, 77 insertions(+)
create mode 100644 lib/btree_test.c
diff --git a/lib/btree_test.c b/lib/btree_test.c
new file mode 100644
index 000..90d9048
--- /dev/null
+++ b/lib/b
OK, picked up all 4:
patches/byungchul_park-llist-provide_a_safe_version_for_llist_for_each.patch
patches/byungchul_park-sched-don_t_reinvent_the_wheel_but_use_existing_llist_api.patch
patches/byungchul_park-sched_rt-remove_unnecessary_condition_in_push_rt_task.patch
patches/byungchul_park-sched
From: Surender Polsani
Fixed the following checkpatch.pl warnings:
octal permissions are more preferable than symbolic permissions
Signed-off-by: Surender Polsani
---
drivers/staging/iio/light/tsl2x7x_core.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --g
As the documentation for dwfl_frame_pc says, frames that
are no activation frames need to have their program counter
decremented by one to properly find the function of the caller.
This fixes many cases where perf report currently attributes
the cost to the next line. I.e. I have code like this:
When a filename was found in addr2line it was duplicated via strdup
but never freed. Now we pass NULL and handle this gracefully in
addr2line.
Detected by Valgrind:
==16331== 1,680 bytes in 21 blocks are definitely lost in loss record 148 of 220
==16331==at 0x4C2AF1F: malloc (in
/usr/lib/val
On 5/18/2017 1:17 AM, Bjorn Andersson wrote:
On Mon 15 May 04:24 PDT 2017, Varadarajan Narayanan wrote:
On 5/15/2017 2:35 PM, Varadarajan Narayanan wrote:
On 5/14/2017 9:53 AM, Bjorn Andersson wrote:
On Thu 11 May 03:33 PDT 2017, Varadarajan Narayanan wrote:
On 5/11/2017 4:13 AM, Bjorn
So far, the inlined nodes where only reversed when we built perf
against libbfd. If that was not available, the addr2line fallback
code path was missing the inline_list__reverse call.
Now we always add the nodes in the correct order within
inline_list__append. This removes the need to reverse the
The very last inlined frame, i.e. the one furthest away from the
non-inlined frame, was silently dropped. This is apparent when
comparing the output of `perf script` and `addr2line`:
~~
$ perf script --inline
...
a.out 26722 80836.309329: 72425 cycles:
21493 __hypot_fin
On 5/18/2017 1:03 AM, Bjorn Andersson wrote:
On Mon 15 May 02:05 PDT 2017, Varadarajan Narayanan wrote:
On 5/14/2017 9:53 AM, Bjorn Andersson wrote:
On Thu 11 May 03:33 PDT 2017, Varadarajan Narayanan wrote:
On 5/11/2017 4:13 AM, Bjorn Andersson wrote:
On Thu 04 May 04:53 PDT 2017, Varada
On Wed, May 17, 2017 at 04:47:14PM +0200, Hans de Goede wrote:
> Hi,
>
> On 17-05-17 13:45, Heikki Krogerus wrote:
> > Hi,
> >
> > On Wed, May 17, 2017 at 12:24:52AM +0200, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 05/16/2017 02:07 PM, Heikki Krogerus wrote:
> > > But we don't really have mu
On Thu, May 18, 2017 at 10:24:48AM +0200, Christoph Hellwig wrote:
> > b) give the union a name (breaks any reference to timer_list->func in C
> > code):
> >
> > + union {
> > + void(*func)(struct timer_list *timer);
> > + void(*functio
On Thu, May 18, 2017 at 10:34:34AM +0200, Florian Weimer wrote:
> On 05/18/2017 10:31 AM, Peter Zijlstra wrote:
> > That more or less worked, it still failed:
> >
> > /usr/bin/ld: /usr/local/src/glibc/build/nptl/tst-once5.o: relocation
> > R_X86_64_32 against `.text' can not be used when making a
On Thu, May 18, 2017 at 9:45 AM, Song Xiaowei wrote:
> Hisilicon PCIe Driver shares the common functions fo PCIe dw-host
>
> The poweron functions is developed on hi3660 SoC, while Others Functions
> are common for Kirin series SoCs.
>
> Lowpower(L1ss and SR), hotplug and MSI feature are not suppo
On 05/18/2017 10:41 AM, Peter Zijlstra wrote:
> On Thu, May 18, 2017 at 10:34:34AM +0200, Florian Weimer wrote:
>> On 05/18/2017 10:31 AM, Peter Zijlstra wrote:
>>> That more or less worked, it still failed:
>>>
>>> /usr/bin/ld: /usr/local/src/glibc/build/nptl/tst-once5.o: relocation
>>> R_X86_64_
This series add initial support of mfd core driver for max7360 chip
Andrei Dranitca (1):
mfd: max7360: Add mfd core device driver
Valentin Sitdikov (1):
dt-bindings: Add DT bindings documentation for the max7360 mfd driver
Documentation/devicetree/bindings/mfd/max7360.txt | 72
driver
Hi Eric,
On 17 May 2017 at 16:45, Eric Nelson wrote:
> Hi Fawad,
>
> On 05/17/2017 06:40 AM, Fawad Lateef wrote:
>>
>> On 15 May 2017 at 16:20, Fawad Lateef wrote:
>>>
>>> Hi Eric,
>>> On 15 May 2017 at 16:12, Eric Nelson wrote:
Hi Fawad,
> 发自网易邮箱大师
> On 05/15/2017 20:44
From: Andrei Dranitca
This patch adds core/irq driver to support MAX7360 i2c chip
which contains keypad, gpio, pwm, gpo and rotary encoder submodules.
Signed-off-by: Valentin Sitdikov
Signed-off-by: Andrei Dranitca
---
drivers/mfd/Kconfig | 16 ++
drivers/mfd/Makefile| 1 +
On Thu 18-05-17 07:03:36, Tetsuo Handa wrote:
> Roman Gushchin wrote:
> > On Wed, May 17, 2017 at 06:14:46PM +0200, Michal Hocko wrote:
> > > On Wed 17-05-17 16:26:20, Roman Gushchin wrote:
> > > [...]
> > > > [ 25.781882] Out of memory: Kill process 492 (allocate) score 899 or
> > > > sacrifice
"Aneesh Kumar K.V" writes:
> On Thursday 18 May 2017 10:51 AM, Michael Ellerman wrote:
>> "Aneesh Kumar K.V" writes:
>>
>>> POWER9 supports hugepages of size 2M and 1G in radix MMU mode. This patch
>>> enables the usage of 1G page size for hugetlbfs. This also update the helper
>>> such we can
This patch adds documentation for the max7360 bindings.
The max7360 is multifunctional device containing gpio, keypad, pwm and rotary
encoder submodules.
Signed-off-by: Valentin Sitdikov
Signed-off-by: Andrei Dranitca
---
Documentation/devicetree/bindings/mfd/max7360.txt | 72 +
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