On Thu, Mar 23, 2017 at 12:14 AM, Dmitry Torokhov
wrote:
> On Thu, Mar 23, 2017 at 12:05:17AM +0530, Jagan Teki wrote:
>> On Thu, Mar 23, 2017 at 12:00 AM, Dmitry Torokhov
>> wrote:
>> > On Wed, Mar 22, 2017 at 04:36:46PM +0530, Jagan Teki wrote:
>> >> From: Jagan Teki
>> >>
>> >> Added missing
Hi gengdongjiu
On 22/03/17 13:37, gengdongjiu wrote:
> On 2017/3/21 21:10, James Morse wrote:
>> On 21/03/17 06:32, gengdongjiu wrote:
>>> so for both SEA and SEI, do you prefer to below steps?
>>> EL0/EL1 SEI/SEA ---> EL3 firmware first handle --> EL2 hypervisor
>>> notify >
>> the Qemu to i
On Wed, Mar 22, 2017 at 5:50 AM, Evgenii Shatokhin
wrote:
> On 21.03.2017 23:40, Kees Cook wrote:
>>
>> On Tue, Mar 21, 2017 at 6:54 AM, Evgenii Shatokhin
>> wrote:
>>>
>>> Hi,
>>>
>>> One of my x86 machines with a 32-bit Linux system (ROSA Linux in this
>>> case)
>>> automatically reboots when i
From: Jie Deng
Date: Tue, 21 Mar 2017 11:59:04 +0800
> This patch adds declaration of dual license in file headers.
>
> Signed-off-by: Jie Deng
My apologies. I applied Arnd's patches. Could you please respin
these two patches against net-next so that the final result is what
you want?
Thank
(Readding Jeff Kirsher who got dropped from the CC-list at some point.)
On Tue, Mar 21, 2017 at 07:13:43PM -0700, l...@pengaru.com wrote:
> > This is still broken as of 4.11.0-rc3 FYI.
> >
> > Upon resume:
> > [ 45.828344] [ cut here ]
> > [ 45.828352] WARNING: CPU: 0
On Thu, Mar 09, 2017 at 11:08:17AM +0100, Borislav Petkov wrote:
> +static bool cec_add_mce(struct mce *m)
> +{
> + if (!m)
> + return false;
> +
> + if (memory_error(m) && mce_usable_address(m))
> + if (!cec_add_elem(m->addr >> PAGE_SHIFT))
> + r
Hi all,
This patch series implements a new transport for 9pfs, aimed at Xen
systems.
The transport is based on a traditional Xen frontend and backend drivers
pair. This patch series implements the frontend, which typically runs in
a regular unprivileged guest.
I also sent a series that implement
Sync the ring.h file with upstream Xen, to introduce the new ring macros.
They will be used by the Xen transport for 9pfs.
Signed-off-by: Stefano Stabellini
CC: konrad.w...@oracle.com
CC: boris.ostrov...@oracle.com
CC: jgr...@suse.com
CC: gr...@kaod.org
---
NB: The new macros have not been commi
It uses the new ring.h macros to declare rings and interfaces.
Signed-off-by: Stefano Stabellini
CC: konrad.w...@oracle.com
CC: boris.ostrov...@oracle.com
CC: jgr...@suse.com
CC: gr...@kaod.org
---
include/xen/interface/io/9pfs.h | 42 +
1 file changed, 42
Introduce the Xen 9pfs transport driver: add struct xenbus_driver to
register as a xenbus driver and add struct p9_trans_module to register
as v9fs driver.
All functions are empty stubs for now.
Signed-off-by: Stefano Stabellini
Reviewed-by: Boris Ostrovsky
Reviewed-by: Juergen Gross
CC: gr...
Implement functions to handle the xenbus handshake. Upon connection,
allocate the rings according to the protocol specification.
Initialize a work_struct and a wait_queue. The work_struct will be used
to schedule work upon receiving an event channel notification from the
backend. The wait_queue wi
Implement struct p9_trans_module create and close functions by looking
at the available Xen 9pfs frontend-backend connections. We don't expect
many frontend-backend connections, thus walking a list is OK.
Send requests to the backend by copying each request to one of the
available rings (each fron
Upon receiving a notification from the backend, schedule the
p9_xen_response work_struct. p9_xen_response checks if any responses are
available, if so, it reads them one by one, calling p9_client_cb to send
them up to the 9p layer (p9_client_cb completes the request). Handle the
ring following the
This patch adds a Kconfig option and Makefile support for building the
9pfs Xen driver.
Signed-off-by: Stefano Stabellini
Reviewed-by: Juergen Gross
CC: gr...@kaod.org
CC: boris.ostrov...@oracle.com
CC: jgr...@suse.com
CC: Eric Van Hensbergen
CC: Ron Minnich
CC: Latchesar Ionkov
CC: v9fs-deve
From: Jagan Teki
Added missing of_match_table for max11801_ts driver with
compatible as "maxim,max11801_ts"
Cc: Dmitry Torokhov
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v8:
- use the compatible as maxim,max11801 with remove suffix _ts sin
From: Jagan Teki
Add missing documentation of max11801-ts dt-binding details.
Cc: Dmitry Torokhov
Cc: Mark Rutland
Cc: Rob Herring
Cc: Shawn Guo
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v8:
- Use IRQ_TYPE_EDGE_FALLING for interrupt trigger type.
Changes for v7:
- ad
On Tue, Mar 21, 2017 at 7:03 PM, Eric Dumazet wrote:
> On Tue, 2017-03-21 at 16:51 -0700, Kees Cook wrote:
>
>> Am I understanding you correctly that you'd want something like:
>>
>> refcount.h:
>> #ifdef UNPROTECTED_REFCOUNT
>> #define refcount_inc(x) atomic_inc(x)
>> ...
>> #else
>> void refco
From: Jagan Teki
max11801 touchscreen on Engicam iCoreM6 Quad module is
connected via i2c1, so add max11801: touchscreen@48 on i2c1.
Cc: Dmitry Torokhov
Cc: Domenico Acri
Cc: Matteo Lisi
Cc: Michael Trimarchi
Cc: Shawn Guo
Signed-off-by: Jagan Teki
---
Changes for v8:
- Use IRQ_TYPE_EDGE_F
On 22/03/17 20:03, Stefano Stabellini wrote:
> Implement functions to handle the xenbus handshake. Upon connection,
> allocate the rings according to the protocol specification.
>
> Initialize a work_struct and a wait_queue. The work_struct will be used
> to schedule work upon receiving an event c
From: Kalle Valo
Date: Tue, 21 Mar 2017 15:54:47 +0200
> few smallish fixes for 4.11. Please let me know if there are any
> problems.
Pulled, thanks Kalle.
On 22/03/17 20:03, Stefano Stabellini wrote:
> Implement struct p9_trans_module create and close functions by looking
> at the available Xen 9pfs frontend-backend connections. We don't expect
> many frontend-backend connections, thus walking a list is OK.
>
> Send requests to the backend by copyin
On Wed, Mar 22, 2017 at 06:30:28PM +0400, Dmitry Monakhov wrote:
> +
> + mapping = bdev->bd_inode->i_mapping;
move this assignment to the declaration of mapping at the beginning
of the function?
Otherwise this looks fine:
Reviewed-by: Christoph Hellwig
From: Thierry Reding
Date: Tue, 21 Mar 2017 16:12:09 +0100
> From: Thierry Reding
>
> The MAC RX queues always need to be enabled in order to receive network
> packets. Remove the condition that this only needs to be done for multi-
> queue configurations.
>
> Signed-off-by: Thierry Reding
A
From: Thierry Reding
Date: Tue, 21 Mar 2017 16:12:10 +0100
> From: Thierry Reding
>
> Recent changes to support multiple queues in the device tree bindings
> resulted in the number of RX and TX queues to be initialized to zero for
> device trees not adhering to the new bindings.
>
> Restore ba
From: Thierry Reding
Date: Tue, 21 Mar 2017 16:12:11 +0100
> From: Thierry Reding
>
> Prior to the recent multi-queue changes the driver would configure the
> queues to use the AVB mode, but the mode then got switched to DCB. The
> hardware still works fine in DCB mode, but my testing capabilit
Hi Peter,
On Wed, Mar 22, 2017 at 10:02 AM, Peter Zijlstra wrote:
> On Wed, Mar 22, 2017 at 09:35:43AM -0700, Joel Fernandes wrote:
>> On Wed, Mar 22, 2017 at 7:16 AM, Peter Zijlstra wrote:
>> > On Fri, Mar 10, 2017 at 12:23:41PM -0800, Joel Fernandes wrote:
>> >> The PELT decay_load comments ar
On 22/03/17 16:20, simran singhal wrote:
> The IIO subsystem is redefining iio_dev->mlock to be used by
> the IIO core only for protecting device operating mode changes.
> ie. Changes between INDIO_DIRECT_MODE, INDIO_BUFFER_* modes.
>
> In this driver, mlock was being used to protect hardware stat
On Fri, Mar 17, 2017 at 11:43:41PM +0800, Icenowy Zheng wrote:
> Allwinner V3s features a LRADC like the ones in older SoCs.
>
> Add a device tree node for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/boot/dts/sun8i-v3s.dtsi | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --gi
Hi Dave,
>> By moving these client drivers to use RPMSG instead of the direct SMD
>> API we can reuse them ontop of the newly added GLINK wire-protocol
>> support found in the 820 and 835 Qualcomm platforms.
>>
>> As the new (RPMSG-based) and old SMD implementations are mutually
>> exclusive we h
On Wed, Mar 22, 2017 at 12:00:25PM -0700, Luck, Tony wrote:
> You also need to check that bit 61 of m->status is zero here.
> The collector is hiding uncorrected errors too.
Good catch.
I think I wanna do something like this:
if (memory_error(m) && !(m->status & MCI_STATUS_UC) ...
as we
On Wed, Mar 22, 2017 at 10:55 AM, Peter Zijlstra wrote:
> On Wed, Mar 22, 2017 at 09:25:02AM -0700, Joel Fernandes wrote:
>> On Wed, Mar 22, 2017 at 7:18 AM, Peter Zijlstra wrote:
>> > On Fri, Mar 10, 2017 at 12:47:43PM -0800, Joel Fernandes wrote:
>> >> This patch rewrites comments related task
From: Yazen Ghannam
Scalable MCA systems have a new MCA_CONFIG register that we use to
configure each bank. We currently use this when we set up thresholding.
However, this is logically separate.
Move setup of MCA_CONFIG into a separate function.
Signed-off-by: Yazen Ghannam
---
arch/x86/kern
From: Yazen Ghannam
We have support for the new SMCA MCA_DE{STAT,ADDR} registers in Linux. So
we've used these registers in place of MCA_{STATUS,ADDR} on SMCA systems.
However, the guidance for current implementations of SMCA is to continue
using MCA_{STATUS,ADDR} and to use MCA_DE{STAT,ADDR} onl
On Mon, Mar 6, 2017 at 11:09 AM, Kees Cook wrote:
> When performing notifier function pointer sanity checking, allow
> CONFIG_BUG_ON_DATA_CORRUPTION to upgrade from a WARN to a BUG.
> Additionally enables CONFIG_DEBUG_NOTIFIERS when selecting
> CONFIG_BUG_ON_DATA_CORRUPTION.
Any feedback on this
It is reasonable drop page cache on discard, otherwise that pages may
be written by writeback second later, so thin provision devices will
not be happy. This seems to be a security leak in case of secure discard case.
Also add check for queue_discard flag on early stage.
Signed-off-by: Dmitry Mo
On Mon, Mar 6, 2017 at 11:09 AM, Kees Cook wrote:
> This converts from WARN() to CHECK_DATA_CORRUPTION() (so that system
> builders can choose between WARN and BUG). Additionally moves refcount_t
> sanity-check conditionals into regular function flow.
>
> Now when built with CONFIG_BUG_ON_DATA_COR
On 22/03/17 16:42, Arushi Singhal wrote:
> This patch replaces bit shifting on 1 with the BIT(x) macro.
> This was done with coccinelle:
> @@
> constant c;
> @@
>
> -1 << c
> +BIT(c)
>
> Signed-off-by: Arushi Singhal
Applied to the togreg branch of iio.git and pushed out as testing for
the autob
On Fri, Mar 17, 2017 at 11:43:43PM +0800, Icenowy Zheng wrote:
> Lichee Pi Zero features a dock, which adds some functions, and should be
> soldered with the core board of Lichee Pi Zero.
>
> Add support for the dock as a new dts, as soldering is needed to make
> the dock usable and there's functi
On Wed, Mar 22, 2017 at 02:01:37PM +, Colin King wrote:
> From: Colin Ian King
>
> Reading and writing to mode[count - 1] implies the count should not
> be less than 1 so add a sanity check for this.
>
> Detected with CoverityScan, CID#1357345 ("Overflowed array index write")
>
> Signed-off
From: Alexander Potapenko
Date: Tue, 21 Mar 2017 17:14:27 +0100
> In the case udp_sk(sk)->pending is AF_INET6, udpv6_sendmsg() would
> jump to do_append_data, skipping the initialization of sockc.tsflags.
> Fix the problem by moving sockc.tsflags initialization earlier.
>
> The bug was detected
On 22/03/17 19:39, Dan Carpenter wrote:
> On Wed, Mar 22, 2017 at 02:01:37PM +, Colin King wrote:
>> From: Colin Ian King
>>
>> Reading and writing to mode[count - 1] implies the count should not
>> be less than 1 so add a sanity check for this.
>>
>> Detected with CoverityScan, CID#1357345 ("
On 3/22/2017 12:29 PM, Kees Cook wrote:
When performing notifier function pointer sanity checking, allow
CONFIG_BUG_ON_DATA_CORRUPTION to upgrade from a WARN to a BUG.
Additionally enables CONFIG_DEBUG_NOTIFIERS when selecting
CONFIG_BUG_ON_DATA_CORRUPTION.
Any feedback on this change? By defa
On Fri, Mar 10, 2017 at 7:34 AM, David Windsor wrote:
> v3: rebase against latest Linus tree; re-add include/linux/refcount.h
> missing from v2 series
>
> Signed-off-by: David Windsor
Reviewed-by: Kees Cook
Ingo, can you pull this into tip? I like having more documentation here. :)
-Kees
> -
I have a reproducible system hang that appears to be the result of heavy IO.
I originally posted the problem to the linux-block mailing list back
in January, but haven't heard back.
Not sure if I reported to the correct area.
There is a bugzill.kernel.org issue open that contains the details of
From: Doug Berger
Date: Tue, 21 Mar 2017 14:01:06 -0700
> Commit 6ac3ce8295e6 ("net: bcmgenet: Remove excessive PHY reset")
> removed the bcmgenet_mii_reset() function from bcmgenet_power_up() and
> bcmgenet_internal_phy_setup() functions. In so doing it broke the reset
> of the internal PHY dev
On Wed, 2017-03-22 at 08:45 +1100, Dave Chinner wrote:
> On Tue, Mar 21, 2017 at 01:23:24PM -0400, Jeff Layton wrote:
> > On Tue, 2017-03-21 at 12:30 -0400, J. Bruce Fields wrote:
> > > - It's durable; the above comparison still works if there were reboots
> > > between the two i_version checks.
On Wed, Mar 22, 2017 at 12:32 PM, Arjan van de Ven
wrote:
> On 3/22/2017 12:29 PM, Kees Cook wrote:
>>>
>>> When performing notifier function pointer sanity checking, allow
>>> CONFIG_BUG_ON_DATA_CORRUPTION to upgrade from a WARN to a BUG.
>>> Additionally enables CONFIG_DEBUG_NOTIFIERS when selec
Hi simran,
[auto build test WARNING on iio/togreg]
[also build test WARNING on v4.11-rc3 next-20170322]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/simran-singhal/staging-adis16060_core
On 2/22/2017 12:39 PM, James Bottomley wrote:
Right at the moment the kernel use of tpm2 looks like
acquire chip->tpm_mutex
load key
process key
unload key
release chip->tpm_mutex
While it does this, there's no need for it to have a RM interface
because what it does between the acquisition and
This driver was originally written for the Intel MRST platform with
several platform specific parameters hard-coded. Another thing we
need to fix is the hard-coded ECC step size. Currently, it is
defined as follows:
#define ECC_SECTOR_SIZE 512
(somehow, it is defined in both denali.c and dena
There are various customizable parameters, so several variants for
this IP. A generic compatible like "denali,denali-nand-dt" is
useless. Moreover, there are multiple things wrong with this string.
(Refer to Rob's comment [1])
The denali_dt.c was split out and this compatible was added by Altera
It took a couple months to update this series, but finally here is v2.
(v1: https://lkml.org/lkml/2016/11/26/144 )
This driver includes many problems.
One of the biggest one is a bunch of hard-coded parameters. This IP
has many parameters that can be customized when a delivery RTL is
generated.
The current driver only supports the DMA engine up to 32 bit
physical address, but there also exists 64 bit capable DMA engine
for this IP.
The data DMA setup sequence is completely different, so I added the
64 bit DMA code as a new function denali_setup_dma64(). The 32 bit
one has been renamed t
The available configuration of the IP bus width is x8 or x16, so the
possible value for denali->devnum is 1 or 2.
If the value is 1, there is nothing to do. Fixup parameters only
when denali->devnum is 2.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Simplify the code given 1 or 2 is p
These members are not used at all.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Add git description
drivers/mtd/nand/denali.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index c4f3a68..6573ea5 100644
--- a/drivers/mtd/nand
Currently, the driver expects DEVICE_CONNECTED is automatically set
by the hardware, but this feature is disabled in some cases.
In such cases, it is the software's responsibility to set up the
DEVICES_CONNECTED register.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/
The same comment "Mapped io reg base address" for flash_reg and
flash_mem probably due to the mistake of copy-paste work.
Of course, the latter is not the register base address.
Reword the comments using the terminology in the Denali User's Guide.
Signed-off-by: Masahiro Yamada
---
Changes in v
Collect multi NAND fixups into a helper function instead of
scattering them in denali_init().
I am rewording the comment block to clearly explain what is called
"multi device".
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Reword the comment block for clarification
drivers/mtd/nand/de
On 22/03/17 20:00, kbuild test robot wrote:
> Hi simran,
>
> [auto build test WARNING on iio/togreg]
> [also build test WARNING on v4.11-rc3 next-20170322]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
This will be filled by nand_scan_ident() later.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3badb1d..1706975 100644
--- a/drivers/mtd/nand/denali.
The interrupts are enabled by INTR_EN register, then asserted
interrupts can be observed via INTR_STATUS register.
The bit fields are identical between INTR_EN and INTR_STATUS, so we
can merge the bit field macros. Likewise for DATA_INTR.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- N
Because SUPPORT_15BITECC is defined, the following is dead code:
#elif SUPPORT_8BITECC
iowrite32(8, denali->flash_reg + ECC_CORRECTION);
#endif
Such ifdefs are useless and unacceptable coding style.
These writes are not needed in the first place since ECC_CORRECTION
is set up by th
All of these macros are not used at all.
CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR is not used for anything but
defining SCRATCH_REG_ADDR. The config option should go away as well.
I am removing some register macros. They are not used, and do not
exist in recent IP versions.
Signed-off-by: Masahi
On Wed, Mar 22, 2017 at 02:22:22AM +0800, Icenowy Zheng wrote:
>
>
> 21.03.2017, 15:41, "Maxime Ripard" :
> > On Thu, Mar 16, 2017 at 01:28:04AM +0800, Icenowy Zheng wrote:
> >> Many Allwinner SoCs after A31 have a CCU in PRCM block.
> >>
> >> Give the ones on H3 and A64 compatible strings.
> >
Some old versions of the Denali IP (perhaps used only for Intel?)
detects ECC errors and provides correct data via a register, but
does not touch the transferred data. So, the software must fixup
the data in the buffer according to the provided ECC correction
information.
Newer versions perform E
Commit 271707b1d817 ("mtd: nand: denali: max_banks calculation
changed in revision 5.1") added a revision check to support the
new max_banks encoding. Its git-log states "The encoding of
max_banks changed in Denali revision 5.1".
There are exceptional cases, for example, the revision register on
This function is wrong in multiple ways:
[1] Counting corrected bytes instead of corrected bits.
The following code is counting the number of corrected _bytes_.
/* correct the ECC error */
buf[offset] ^= err_cor_value;
mtd->ecc_stats.corrected++;
bitflips++;
What the core framew
The denali_init() needs to setup a bunch of parameters of nand_chip.
Replace denali->nand.(member) with chip->(member) for shorter code.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 68 +++
1 file changed, 34 ins
This part is wrong in multiple ways:
[1] is_erased() is called against "buf" twice, so the second one is
meaningless. The second call should check chip->oob_poi.
[2] This code block is nested by double "if (check_erase_page)".
The inner one is redundant.
[3] Erased page checking without thresho
The driver sets appropriate DMA mask. Delete the "dma-mask" DT
property. See [1] for negative comments for this binding.
[1] https://lkml.org/lkml/2016/2/8/57
Signed-off-by: Masahiro Yamada
Acked-by: Rob Herring
---
Changes in v2: None
Documentation/devicetree/bindings/mtd/denali-nand.txt
From: David Rivshin
The gpio-matrix-keypad driver normally sets inactive columns as inputs
while scanning. This does not work for all hardware, which may require
the inactive columns to be actively driven in order to overcome any
pull-ups/downs on the columns.
Signed-off-by: David Rivshin
---
The write accesses to LOGICAL_PAGE_{DATA,SPARE}_SIZE have no effect
because the Denali User's Guide says these registers are read-only.
The hardware automatically multiplies the main/spare size by the
number of devices and update LOGICAL_PAGE_{DATA,SPARE}_SIZE.
Signed-off-by: Masahiro Yamada
---
The page number is generally stored in an integer type variable.
The uint16_t does not have enough width. I see no reason to use
uint32_t for other members, either. Just use int.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.h | 8
1 file changed, 4
One of the newer methods to determine TSC frequency, is to use one of cpuid
extensions to get TSC/Crystal ratio. This method is preferred on CPUs that
implements it. This patch adds a new function calibrate_tsc_early() that
can be called early in boot to determine the TSC by using this method.
Sig
tsc_early_init():
Use verious methods to determine the availability of TSC feature and its
frequency early in boot, and if that is possible initialize TSC and also
call sched_clock_early_init() to be able to get timestamps early in boot.
tsc_early_fini()
Implement the finish part of early tsc feat
Newer processors implement cpuid extension to determine CPU frequency
from cpuid. This patch adds a function that can do this early in boot.
Signed-off-by: Pavel Tatashin
---
arch/x86/kernel/tsc.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/t
The Denali NAND controller IP has various customizable features.
SoC vendors can choose desired functions when a delivery RTL is
created. It means there are several variants for this IP. For
example, the Intel version is equipped with 32bit DMA, whereas the
IP for UniPhier SoC family with 64bit D
When it is determined that clock is actually unstable, and we switch from
stable to unstable the following function is eventually called:
__clear_sched_clock_stable()
In this function we set gtod_offset so the following holds true:
sched_clock() + raw_offset == ktime_get_ns() + gtod_offset
But
In Linux printk() can output timestamps next to every line. This is very
useful for tracking regressions, and finding places that can be optimized.
However, the timestamps are available only later in boot. On smaller
machines it is insignificant amount of time, but on larger it can be many
seconds
quick_pit_calibrate() is another method that can determine the frequency
of TSC. However, this function by default outputs some information
messages. Allow to disable these messages if this function is called early
so early time stamps can be initialized before anything is printed.
Signed-off-by:
Allow discovering MSR-based CPU/TSC frequency early in boot. This method
works only for some Intel CPUs.
Signed-off-by: Pavel Tatashin
---
arch/x86/include/asm/tsc.h |1 +
arch/x86/kernel/tsc_msr.c | 38 +-
2 files changed, 26 insertions(+), 13 deletion
In order to support early time stamps we must know the vendor id of the
chip early in boot. This patch implements it by getting vendor string from
cpuid, and comparing it against the known to Linux x86 vendors.
Signed-off-by: Pavel Tatashin
---
arch/x86/include/asm/processor.h |1 +
arch/x86
Call tsc_early_init() to initialize early boot time stamps functionality on
the supported x86 platforms, and call tsc_early_fini() to finish this
feature after permanent tsc has been initialized.
Signed-off-by: Pavel Tatashin
---
arch/x86/kernel/head64.c |1 +
arch/x86/kernel/time.c |1
Last week I sent out patches to enable early boot time stamp on SPARC, that
work is now under review:
http://www.spinics.net/lists/sparclinux/msg17372.html
This is continuation for that work, but adding early boot time stamps
support for x86 machines.
Here is example how this information is usefu
Currently, it is valid to specify both "nand-ecc-step-size" and
"nand-ecc-strength", but not allowed to set only one of them.
This requirement has a conflict with "nand-ecc-maximize"; this flag
is used when you want the driver to choose the best ECC strength.
If "nand-ecc-maximize" is set, "nand-e
"pdev" is much more often used to point a platform_device, so this
will help the driver code look consistent across the kernel.
While we are here, fix "line over 80 characters" coding style
violations.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali_dt.c | 32 ++
This macro is defined twice in denali.c (around line 98 and
line 651), so remove the second one.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index f993e
The nand_default_block_markbad() and scan_block_fast() use high
level APIs to get access to the BBM.
On the other hand, nand_block_bad (the default implementation of
->block_bad) calls the lower level ->cmdfunc hook. This prevents
drivers from using ->ecc.read_oob() even if optimized read operati
This will allow nand_dt_init() to parse DT properties in the NAND
controller device node.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 24c35a6..3b
On 20/03/17 15:15, simran singhal wrote:
> The contents of ade7754.h are only used in ade7754.c.
> Move the header contents to the implementation file,
> and delete the header file.
>
> Signed-off-by: simran singhal
Unfortunately already done by sayli karnik back on the 8th of March.
Jonathan
>
On 20/03/17 15:15, simran singhal wrote:
> Alphabetize and separate kernel and subsystem headers.
>
> Signed-off-by: simran singhal
Applied to the togreg branch of iio.git and pushed out as testing for the
autobuilders to play with it.
Thanks,
Jonathan
> ---
> drivers/staging/iio/meter/ade7754
Hi Sebastian,
Thanks for the update. There are two more minor issues,
please refer below.
On 03/22/2017 01:09 AM, Sebastian Reichel wrote:
> Motorola CPCAP is a PMIC (power management integrated circuit) found
> in multiple smartphones. This driver adds support for the chip's LED
> controllers. T
On 21/03/17 18:03, simran singhal wrote:
> This patch removes trailing whitespaces in order to follow the Linux
> coding style.
>
> Signed-off-by: simran singhal
Applied and pushed out as testing...
Jonathan
> ---
> drivers/staging/iio/meter/ade7753.c | 8
> 1 file changed, 4 insertion
On 21/03/17 18:03, simran singhal wrote:
> The IIO subsystem is redefining iio_dev->mlock to be used by
> the IIO core only for protecting device operating mode changes.
> ie. Changes between INDIO_DIRECT_MODE, INDIO_BUFFER_* modes.
>
> In this driver, mlock was being used to protect hardware stat
From: Nathan Sullivan
If the PHY is halted on stop, then do not set the state to PHY_UP. This
ensures the phy will be restarted later in phy_start when the machine is
started again.
Signed-off-by: Nathan Sullivan
Signed-off-by: Brad Mouring
Acked-by: Xander Huff
Acked-by: Kyle Roeschley
---
On 20/03/17 19:51, Arushi Singhal wrote:
> The IIO subsystem is redefining iio_dev->mlock to be used by
> the IIO core only for protecting device operating mode changes.
> ie. Changes between INDIO_DIRECT_MODE, INDIO_BUFFER_* modes.
>
> In this driver, mlock was being used to protect hardware stat
On Wed, Mar 22, 2017 at 04:24:16PM -0400, Pavel Tatashin wrote:
> - early tsc offset is 549s, so it took over 9 minutes to get through POST,
> and GRUB before starting linux
Lol, how cute. You assume TSC starts at 0 on reset.
On Wed, Mar 22, 2017 at 04:24:16PM -0400, Pavel Tatashin wrote:
> Last week I sent out patches to enable early boot time stamp on SPARC, that
> work is now under review:
> http://www.spinics.net/lists/sparclinux/msg17372.html
>
> This is continuation for that work, but adding early boot time stamp
On Wed, 22 Mar 2017 23:07:17 +0900
Masahiro Yamada wrote:
> This part is wrong in multiple ways:
>
> [1] is_erased() is called against "buf" twice, so the second one is
> meaningless. The second call should check chip->oob_poi.
>
> [2] This code block is nested by double "if (check_erase_page)
CONFIG_BUG_ON_DATA_CORRUPTION option is enabled, an incorrect
state will result in a BUG_ON.
The CONFIG_ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE option is also
added so each architecture can optimize this change.
Signed-off-by: Thomas Garnier
---
Based on next-20170322
---
arch/s390/Kconfig| 1
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