On Mon, Jan 02, 2017 at 05:37:01PM +0100, Quentin Schulz wrote:
> The X-Powers AXP20X and AXP22X PMICs have multiple ADCs. They expose the
> battery voltage, battery charge and discharge currents, AC-in and VBUS
> voltages and currents, 2 GPIOs muxable in ADC mode and PMIC temperature.
>
> This ad
On Thu, Jan 05, 2017 at 05:19:58PM +0100, Takashi Iwai wrote:
> On Thu, 05 Jan 2017 16:59:31 +0100,
> Ville Syrjälä wrote:
> >
> > On Thu, Jan 05, 2017 at 04:37:27PM +0100, Takashi Iwai wrote:
> > > Hi,
> > >
> > > recently I noticed that VT console doesn't work any longer when I dock
> > > a Del
On Thu, Jan 5, 2017 at 7:08 AM, Arjan van de Ven wrote:
> On 1/5/2017 12:11 AM, Ingo Molnar wrote:
>>
>>
>> * Thomas Garnier wrote:
>>
>>> Each processor holds a GDT in its per-cpu structure. The sgdt
>>> instruction gives the base address of the current GDT. This address can
>>> be used to bypas
Hi Agustin,
On 14/12/16 22:10, Agustin Vega-Frias wrote:
> Driver for interrupt combiners in the Top-level Control and Status
> Registers (TCSR) hardware block in Qualcomm Technologies chips.
>
> An interrupt combiner in this block combines a set of interrupts by
> OR'ing the individual interrupt
On Thu, Jan 05, 2017 at 10:50:33AM +0100, Quentin Schulz wrote:
> +static int axp20x_remove(struct platform_device *pdev)
> +{
> + struct axp20x_adc_iio *info;
> + struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> +
> + info = iio_priv(indio_d
Declare rtc_class_ops structures as const as they are only passed
as an argument to the function devm_rtc_device_register. This argument
is of type const struct rtc_class_ops *, so rtc_class_ops structures
having this property can be declared const.
Done using Coccinelle:
@r1 disable optional_qual
On Mon, Jan 02, 2017 at 05:37:03PM +0100, Quentin Schulz wrote:
> + switch (axp20x_id) {
> + case AXP209_ID:
> + indio_dev->info = &axp20x_adc_iio_info;
> + indio_dev->num_channels = ARRAY_SIZE(axp20x_adc_channels);
> + indio_dev->channels = axp20x_adc_ch
On Tue, Dec 27, 2016 at 04:53:44AM +0300, Kirill A. Shutemov wrote:
> Here is v2 of 5-level paging patchset.
>
> Please consider applying first 7 patches.
It's probably useful to describe all pieces and the order in which they can
be be merged:
- The first seven patches of this patchset I woul
On Thu, Jan 05, 2017 at 10:41:04PM +0900, Andi Shyti wrote:
> Hi Daniel,
>
> > > +ARM/SAMSUNG EXYNOS5433 ARM ARCHITECTURES
> > > +M: Chanwoo Choi
> > > +R: Andi Shyti
> > > +L: linux-samsung-...@vger.kernel.org (moderated for
> > > non-subscribers)
> > > +S: Supported
>
On 26/12/16 08:32, Zhao Qiang wrote:
> The codes of qe_ic init from a variety of platforms are redundant,
> merge them to a common function and put it to irqchip/irq-qeic.c
>
> For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
> qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead
On Tue 2016-12-27 23:16:03, Sergey Senozhatsky wrote:
> Hello,
>
> This patch set extends a lock-less NMI per-cpu buffers idea to
> handle recursive printk() calls. The basic mechanism is pretty much the
> same -- at the beginning of a deadlock-prone section we switch to lock-less
> printk c
On 01/03/2017 11:45 PM, Zhang Rui wrote:
On Wed, 2017-01-04 at 12:35 +0800, Zhang Rui wrote:
On Thu, 2016-12-15 at 16:47 -0500, Yasuaki Ishimatsu wrote:
When offlining all cores on a CPU, the following system panic
occurs:
BUG: unable to handle kernel NULL pointer dereference at (null)
IP:
After staring at this code for a while I've figured using small 2-entry array
describing ARGV and ENVP is the way to address code duplication critique.
Signed-off-by: Alexey Dobriyan
---
fs/proc/base.c | 144 ++---
1 file changed, 56 insertio
On Thu, Jan 05, 2017 at 08:52:49AM -0600, Josh Poimboeuf wrote:
> On Tue, Dec 27, 2016 at 02:00:30PM -0500, Dave Jones wrote:
> > I'm not sure what to make of this. Josh ? (4.10-rc1)
> >
> > WARNING: kernel stack frame pointer at c93e7858 in trinity-c6:29122
> > has bad value 821
On 01/05/2017 11:08 AM, Peter Zijlstra wrote:
> On Thu, Jan 05, 2017 at 10:55:55AM -0500, Waiman Long wrote:
>> What I am saying that we don't need to change spinlock to rtmutex in a
>> -RT kernel. Instead, we can use rtqspinlock for this purpose. All the
>> sleeping locks will still be converted t
On Wed, Jan 04, 2017 at 05:48:59PM +, Suzuki K. Poulose wrote:
> From: Mark Rutland
>
> Any fields not defined in an arm64_ftr_bits entry are propagated to the
> system-wide register value in init_cpu_ftr_reg(), and while we require
> that these strictly match for the sanity checks, we don't
On Thu, Jan 05, 2017 at 09:17:00AM -0600, Josh Poimboeuf wrote:
> On Thu, Jan 05, 2017 at 03:59:52PM +0100, Dmitry Vyukov wrote:
> > On Thu, Jan 5, 2017 at 3:49 PM, Josh Poimboeuf wrote:
> > > On Tue, Dec 27, 2016 at 05:38:59PM +0100, Dmitry Vyukov wrote:
> > >> On Thu, Dec 22, 2016 at 6:17 AM, Jo
On 26/12/16 08:32, Zhao Qiang wrote:
> QEIC was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms, so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v6:
> - new added
> Changes for v7:
> - fix warning
>
> drivers/irqchip/irq-qeic
On Thu, Jan 05, 2017 at 11:02:14AM -0600, Josh Poimboeuf wrote:
> On Thu, Jan 05, 2017 at 08:52:49AM -0600, Josh Poimboeuf wrote:
> > On Tue, Dec 27, 2016 at 02:00:30PM -0500, Dave Jones wrote:
> > > I'm not sure what to make of this. Josh ? (4.10-rc1)
> > >
> > > WARNING: kernel stack frame
On Mon, Jan 02, 2017 at 05:37:17PM +0100, Quentin Schulz wrote:
> + /*
> + * IIO framework gives mV but Power Supply framework gives µV.
> + */
> + val->intval *= 1000;
s/gives/wants/ ?
> +static int axp20x_battery_set_max_voltage(struct axp20x_ba
In order to prepare for CONFIG_VIRT_CPU_ACCOUNTING_NATIVE to delay
cputime accounting to the tick, provide finegrained accumulators to
powerpc in order to store the cputime until flushing.
While at it, normalize the name of several fields according to common
cputime naming.
Cc: Benjamin Herrensch
In order to prepare for CONFIG_VIRT_CPU_ACCOUNTING_NATIVE to delay
cputime accounting to the tick, let's provide APIs to account system
time to precise contexts: hardirq, softirq, pure system, ...
Inspired-by: Martin Schwidefsky
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Currently CONFIG_VIRT_CPU_ACCOUNTING_NATIVE accounts the cputime on
any context boundary: irq entry/exit, guest entry/exit, context switch,
etc...
Calling functions such as account_system_time(), account_user_time()
and such can be costly, especially if they are called on many fastpath
such as twi
That in order to gather all cputime accumulation to the same place.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Heiko Carstens
Cc: Martin Schwidefsky
Cc: Tony Luck
Cc: Fenghua Yu
Cc: Peter Zijlstra
Cc: Rik van Riel
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Stani
In order to prepare for CONFIG_VIRT_CPU_ACCOUNTING_NATIVE to delay
cputime accounting to the tick, let's allow archs to account cputime
directly to gtime.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Heiko Carstens
Cc: Martin Schwidefsky
Cc: Tony Luck
Cc: Fenghua Yu
On task switch we must initialize the current cputime of the next task
using the value of the previous task which got freshly updated.
But we are confusing that with doing the opposite, which should result
in wrong cputime accounting.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael El
From: Martin Schwidefsky
The account_system_time() function is called with a cputime that
occurred while running in the kernel. The function detects which
context the CPU is currently running in and accounts the time to
the correct bucket. This forces the arch code to account the
cputime for hard
Currently CONFIG_VIRT_CPU_ACCOUNTING_NATIVE accounts the cputime on
any context boundary: irq entry/exit, guest entry/exit, context switch,
etc...
Calling functions such as account_system_time(), account_user_time()
and such can be costly, especially if they are called on many fastpath
such as twi
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE used to accumulate user time and
account it on ticks and context switches only through the
vtime_account_user() function.
Now this model has been generalized on the 3 archs for all kind of
cputime (system, irq, ...) and all the cputime flushing happens under
vtime
This version is a rebase on top of latest Linus tree which includes
the fix 8f2b468aadc ("s390/vtime: correct system time accounting").
Also a small change: I have moved account_system_index_scaled() to s390
in patch "s390/cputime: delayed accounting of system time" because it is
the only user of
On Wed, Jan 04, 2017 at 05:49:00PM +, Suzuki K. Poulose wrote:
> From: Mark Rutland
>
> We currently have some RAZ fields described explicitly in our
> arm64_ftr_bits arrays. These are inconsistently commented, grouped,
> and/or applied, and maintaining these is error-prone.
>
> Luckily, we
On 1/5/2017 1:04 AM, Sekhar Nori wrote:
Hi Santosh,
On Thursday 05 January 2017 03:30 AM, Santosh Shilimkar wrote:
On 1/4/2017 12:30 PM, David Lechner wrote:
The TI Keystone SoCs have extra UART registers beyond the standard 8250
registers, so we need a new compatible string to indicate this.
When borrowing the pfn_valid() check from mmap_kmem(), somebody managed
to get physical and virtual addresses spectacularly muddled up, such
that we've ended up with checks for one being the other. Whilst this
does indeed prevent out-of-bounds accesses crashing, on most systems
it also prevents the
Hi Sean,
Some review comments.
On Fri, Jan 06, 2017 at 12:06:24AM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> This patch adds driver for IR controller on
> Mediatek MT7623 SoC. Currently testing successfully
> on NEC and SONY remote controller only but it should
> work on others
* Mark Jackson [170104 02:56]:
> On 15/12/16 10:52, Mark Jackson wrote:
> >>From v4.2+ the GPMC code has been changed to reset all the bootloader
> > GPMC settings when the kernel starts.
> >
> > As such, this DTS file now needs the external FRAM defined.
> >
> > Signed-off-by: Mark Jackson
>
On context switch with powerpc32, the cputime is accumulated in the
thread_info struct. So the switching-in task must move forward its
start time snapshot to the current time in order to later compute the
delta spent in system mode.
This is what we do for the normal cputime by initializing the sta
On Tue, Dec 27, 2016 at 11:22:38AM +0100, Emmanuel Vadot wrote:
> Use axp209.dtsi in sun7i-a20-olinuxino-lime2.dts and correct
> some regulators.
>
> DCDC2 is used for vdd-cpu so it should never be bellow 1V and above 1.4V
> DCDC3 is used for VDD_INT so same as above.
> LD01 is used for the RTC, a
On Tue, Dec 27, 2016 at 11:28:07AM +0100, Emmanuel Vadot wrote:
> The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
> others three only have 1.
> Add the num-cs property to each node.
> The current driver doesn't read this property but this is useful for
> downstream user of DT
Hi,
On Mon, Dec 26, 2016 at 06:53:49PM +0100, Emmanuel Vadot wrote:
> Enable the spi1 and spi2 node since the pins are exposed on the UEXT
> connectors.
>
> Signed-off-by: Emmanuel Vadot
> ---
> arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff -
On Thu, Jan 05, 2017 at 04:26:45PM +0100, Linus Walleij wrote:
> On Wed, Jan 4, 2017 at 2:56 PM, Mark Rutland wrote:
> > Linus, I wasn't able to get ethernet working. Do I need anything on top
> > of v4.10-rc2 && multi_v7_defconfig?
>
> I haven't tried it with multi_v7 but I should probably try
On Thu, Jan 05, 2017 at 10:12:49PM +0900, Chanwoo Choi wrote:
> This patch adds the 'ARM/SAMSUNG EXYNOS5433 ARM ARCHITECTURES' entry
> in order to review and test the upcoming patches as a supporter.
> I have developed the low-level devices and power related devices for
> Exyno5433 and TM2/E board.
On Thu, Jan 05, 2017 at 05:21:09PM +0200, Roger Quadros wrote:
> Hi,
>
> On 17/11/16 13:43, Sriram Dash wrote:
> > For xhci-hcd platform device, all the DMA parameters are not
> > configured properly, notably dma ops for dwc3 devices.
> >
> > The idea here is that you pass in the parent of_node a
The sysrq input handler should be attached to the input device which has
a left alt key.
On 32-bit kernels, some input devices which has a left alt key cannot
attach sysrq handler. Because the keybit bitmap in struct input_device_id
for sysrq is not correctly initialized. KEY_LEFTALT is 56 which
On Wed, Jan 04, 2017 at 05:49:01PM +, Suzuki K. Poulose wrote:
> This patch does the following clean ups :
>
> 1) All undescribed fields of a register are now treated as "strict"
>with a safe value of 0. Hence we could leave an empty table for
>describing registers which are RAZ.
>
>
On Wed, Jan 04, 2017 at 07:10:39PM -0600, Scott Matheina wrote:
> The patch series addresses some coding style issues contained within the file.
>
> Scott Matheina (2):
> drivers/staging/rtl8188eu/core/rtw_ap.c un-necessary parenthesis
> drivers/staging/rtl8188eu/core/rtw_ap.c Alignment should
Declare rtc_class_ops structures as const as they are only passed
as an argument to the function devm_rtc_device_register. This argument
is of type const struct rtc_class_ops *, so rtc_class_ops structures
having this property can be declared const.
Done using Coccinelle:
@r1 disable optional_qual
On Thu, Jan 5, 2017 at 7:09 PM, Krzysztof Kozlowski wrote:
> On Thu, Jan 05, 2017 at 10:12:49PM +0900, Chanwoo Choi wrote:
>> This patch adds the 'ARM/SAMSUNG EXYNOS5433 ARM ARCHITECTURES' entry
>> in order to review and test the upcoming patches as a supporter.
>> I have developed the low-level d
On Thu, Jan 05, 2017 at 04:40:16PM +, One Thousand Gnomes wrote:
> On Thu, 5 Jan 2017 13:48:40 -0200
> Thadeu Lima de Souza Cascardo wrote:
>
> > Ted T'so has added the function size_fifo in 1999 for the 2.3 series
> > [1], a long time ago.
> >
> > During the 2.5 cycle, Russell King has res
On Wed, Jan 04, 2017 at 05:49:03PM +, Suzuki K. Poulose wrote:
> Define helper macros to extract op0, op1, CRn, CRm & op2
> for a given sys_reg id. While at it remove the explicit
> masking only used for Op0.
>
> Cc: Catalin Marinas
> Cc: Mark Rutland
> Cc: Will Deacon
> Signed-off-by: Suzu
On Wed, Jan 04, 2017 at 07:10:40PM -0600, Scott Matheina wrote:
> Fixed coding style issue, un-necessary parenthesis present
>
> Signed-off-by: Scott Matheina
Again, problems with your subject, does it make sense?
Look at what others do for this driver, it should look something like:
[P
This function has the purpose of mode detection by checking the
device nodes for a reg matching with the I2C_OWN_SLAVE_ADDREESS flag.
Currently only checks using OF functions (ACPI slave not supported yet).
Signed-off-by: Luis Oliveira
---
Due to the need of checking if the I2C slave address is o
On 12/30/2016 02:07 PM, Jacob von Chorus wrote:
The device_unregister call in thermal_zone_device_unregister causes the
thermal_zone_device structure to be freed before the call to free the
dynamically allocated attribute groups. This leads to a kernel panic.
Could you add the following call
On Thu, Jan 05, 2017 at 03:52:02PM +, Fuchs, Andreas wrote:
> Great to see this coming along so well. Thanks a lot to Jarkko !
> The TPM allows an application to get the list of currently loaded
> handles TPM2_GetCapabilities(TPM_CAP_HANDLES). It would be great to
> have the RM be as transpar
The network device operation for reading statistics is only called
in one place, and it ignores the return value. Having a structure
return value is potentially confusing because some future driver could
incorrectly assume that the return value was used.
Fix all drivers with ndo_get_stats64 to hav
Traditionally, kdump is used to save vmcore in case of a crash. Some
architectures like powerpc can save vmcore using architecture specific
support instead of kexec/kdump mechanism. Such architecture specific
support also needs to reserve memory, to be used by dump capture kernel.
crashkernel param
Get rid of multiple definitions of append_elf_note() & final_note()
functions. Reuse these functions compiled under CONFIG_CRASH_CORE
Also, define Elf_Word and use it instead of generic u32 or the more
specific Elf64_Word.
Signed-off-by: Hari Bathini
---
Changes from v3:
* Dropped hard-coded val
* Peter Ujfalusi [170103 03:22]:
> OMAP1510, OMAP5910 and OMAP310 have only 9 logical channels.
> OMAP1610, OMAP5912, OMAP1710, OMAP730, and OMAP850 have 16 logical channels
> available.
>
> The wired 17 for the lch_count must have been used to cover the 16 + 1
> dedicated LCD channel, in reality
As we are reusing crashkernel parameter instead of fadump_reserve_mem
parameter to specify the memory to reserve for fadump's crash kernel,
update the documentation accordingly.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 23 ++
1 file
fadump supports specifying memory to reserve for fadump's crash kernel
with fadump_reserve_mem kernel parameter. This parameter currently
supports passing a fixed memory size, like fadump_reserve_mem=
only. This patch aims to add support for other syntaxes like range-based
memory size :[,:,:,...]
w
Now that crashkernel parameter parsing and vmcoreinfo related code is
moved under CONFIG_CRASH_CORE instead of CONFIG_KEXEC_CORE, remove
dependency with CONFIG_KEXEC for CONFIG_FA_DUMP. While here, get rid
of definitions of fadump_append_elf_note() & fadump_final_note()
functions to reuse similar f
On Thu, Jan 05, 2017 at 02:43:24PM +0100, Amelie Delaunay wrote:
> This patch adds support for the STM32 RTC.
>
> Signed-off-by: Amelie Delaunay
> ---
> drivers/rtc/Kconfig | 11 +
> drivers/rtc/Makefile| 1 +
> drivers/rtc/rtc-stm32.c | 776
>
Traditionally, kdump is used to save vmcore in case of a crash. Some
architectures like powerpc can save vmcore using architecture specific
support instead of kexec/kdump mechanism. Such architecture specific
support also needs to reserve memory, to be used by dump capture kernel.
crashkernel param
On 2 January 2017 at 13:37, Quentin Schulz
wrote:
[...]
> +
> +#define AXP20X_PWR_STATUS_BAT_CHARGING BIT(2)
> +
> +#define AXP20X_PWR_OP_BATT_PRESENT BIT(5)
> +#define AXP20X_PWR_OP_BATT_ACTIVATED BIT(3)
> +
> +#define AXP209_FG_PERCENT GENMASK(6, 0)
> +#define AXP22X_FG_VALID
On Wed, Jan 04, 2017 at 05:49:04PM +, Suzuki K. Poulose wrote:
> Add a helper to extract the register field from a given
> instruction.
>
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: Mark Rutland
> Signed-off-by: Suzuki K Poulose
Reviewed-by: Catalin Marinas
On 01/05/2017 09:28 AM, Vivien Didelot wrote:
> The dsa_driver_version string is irrelevant and has not been bumped
> since its introduction about 9 years ago. Kill it.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Florian Fainelli
Good riddance ;)
--
Florian
On Thu, 05 Jan 2017 13:35:58 +0100
Vitaly Kuznetsov wrote:
> I was thinking about it but to me what do_adjtimex() does looks too
> low-level for drivers (e.g. calling write_seqcount_begin(),
> __timekeeping_set_tai_offset(), tk_update_leap_state()). To me (again, I
> probably know not that much a
The dsa_driver_version string is irrelevant and has not been bumped
since its introduction about 9 years ago. Kill it.
Signed-off-by: Vivien Didelot
---
net/dsa/dsa.c | 5 -
net/dsa/dsa_priv.h | 1 -
net/dsa/slave.c| 1 -
3 files changed, 7 deletions(-)
diff --git a/net/dsa/dsa.c b
Update the Hyper-V MAINTAINERS to include myself.
Signed-off-by: Stephen Hemminger
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ea11bb03f550..7542341d8155 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5963,6 +5963,7 @@ F:drivers/med
On Thu, Jan 05, 2017 at 09:36:26AM -0800, Stephen Hemminger wrote:
> Update the Hyper-V MAINTAINERS to include myself.
>
> Signed-off-by: Stephen Hemminger
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ea11bb03f550..7542341d8155 1
Hi Dave,
On Thursday 05 January 2017 11:47 AM, Dave Young wrote:
Hi, Hari
On 01/02/17 at 07:43pm, Hari Bathini wrote:
Traditionally, kdump is used to save vmcore in case of a crash. Some
architectures like powerpc can save vmcore using architecture specific
support instead of kexec/kdump mech
> -Original Message-
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Thursday, January 5, 2017 9:36 AM
> To: da...@davemloft.net; KY Srinivasan
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> gre...@linuxfoundation.org; Stephen Hemminger
>
> Subject:
On Mon, Jan 02, 2017 at 11:03:46PM +, Andre Przywara wrote:
> The Banana Pi M64 board is a typical single board computer based on the
> Allwinner A64 SoC. Aside from the usual peripherals it features eMMC
> storage, which is connected to the 8-bit capable SDHC2 controller.
> Also it has a solde
On Thu, Jan 5, 2017 at 2:24 AM, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Linus reported that commit 174cc7187e6f "ACPICA: Tables: Back port
> acpi_get_table_with_size() and early_acpi_os_unmap_memory() from
> Linux kernel" added a new warning on his desktop system:
>
> ACPI Warning
On 01/05/2017 12:23 AM, Raviteja Garimella wrote:
> -- Add OF based platform device registration
> -- Modify debug prints to be compatible with both pci and platform devices
> -- Add members to 'struct udc' for extcon and phy support
> -- Add checks to not process repeated calls to udc connect and
On Thu, Jan 5, 2017 at 3:03 AM, Junichi Nomura wrote:
> We allocate struct ucode_patch here.
>
> "size" is a size of microcode data and used for kmemdup() later
> in this function.
>
> Signed-off-by: Jun'ichi Nomura
> Fixes: 06b8534cb728 ("x86/microcode: Rework microcode loading")
>
> diff --git
OK, so I got this far, although I stuffed two patches in the middle
(which I should probably pull to the beginning and did this one patch
differently.
I've not really tested the result yet, will attempt to do so tomorrow.
Please have a look at the current state of things here:
git://git.kern
Hi,
On Mon, Jan 02, 2017 at 11:03:42PM +, Andre Przywara wrote:
> The calibration facility in the A64 MMC block seems to have been
> misunderstood: the result value is not the value to program into the
> delay bits, but is the number of delay cells that result in a full clock
> cycle delay. So
This series adds IIO driver support for the AVIA HX711 ADC which is
mostly used in weighting cells.
The first patch adds the new DT binding for which a new vendor avia
was also added.
The second patch is the simple IIO driver implemented as ADC.
The protocol is specific to this device and implem
On Mon, Jan 02, 2017 at 11:03:44PM +, Andre Przywara wrote:
> Signed-off-by: Andre Przywara
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 67
> +++
> 1 file changed, 67 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/a
Show a call's hard-ACK cursors in /proc/net/rxrpc_calls.
>
> The patches can be found here also:
>
>
> http://git.kernel.org/cgit/linux/kernel/git/dhowells/linux-fs.git/log/?h=rxrpc-rewrite
>
> Tagged thusly:
>
> git://git.kernel.org/pub/scm/linux/
This is the IIO driver for AVIA HX711 ADC which is mostly used in weighting
cells.
The protocol is quite simple and using GPIOs:
One GPIO is used as clock (SCK) while another GPIO is read (DOUT)
The raw value read from the chip is delivered.
To get a weight one needs to subtract the zero offset
On Thu, Jan 05, 2017 at 03:10:15PM +0900, Jiada Wang wrote:
> Previously watermark level is configured to fifosize/2,
> DMA mode can be used only when transfer length can be divided
> by 'watermark level * bpw', which makes DMA mode not practical.
> This patch adds new DTS property 'dma-wml', use
Add DT bindings for avia,hx711
Add vendor avia to vendor list
Signed-off-by: Andreas Klinger
Acked-by: Rob Herring
---
[PATCH v3 1/2] of this patch was Acked-by: Rob Herring
In v4 the regulator (avdd-supply) was added
.../devicetree/bindings/iio/adc/avia-hx711.txt | 18 +++
Hi Rob,
On Wed, Jan 04, 2017 at 08:07:50AM -0600, Rob Herring wrote:
> On Mon, Jan 02, 2017 at 11:03:43PM +, Andre Przywara wrote:
> > From: Maxime Ripard
> >
> > Unlike the A64 user manual reports, the third MMC controller on the
> > A64 (and the only one capable of 8-bit HS400 eMMC transfe
On Thu, 5 Jan 2017 19:01:51 +0100
Maxime Ripard wrote:
> On Thu, Jan 05, 2017 at 06:37:34PM +0100, Emmanuel Vadot wrote:
> >
> > Hi,
> >
> > On Thu, 5 Jan 2017 18:16:01 +0100
> > Maxime Ripard wrote:
> >
> > > Hi,
> > >
> > > On Mon, Dec 26, 2016 at 06:53:49PM +0100, Emmanuel Vadot wrote:
>
On 01/05/2017 05:08 PM, Peter Zijlstra wrote:
> RT very fundamentally relies on the spinlock->rtmutex conversion to
> allow preempting things when a higher priority task comes along. A
> spinlock, of any kind, requires having preemption disabled while holding
> the lock. If the critical section is
On Thu, 2017-01-05 at 10:27 -0700, Jason Gunthorpe wrote:
> On Thu, Jan 05, 2017 at 03:52:02PM +, Fuchs, Andreas wrote:
> > Great to see this coming along so well. Thanks a lot to Jarkko !
>
> > The TPM allows an application to get the list of currently loaded
> > handles TPM2_GetCapabilities(
On Wed, Jan 04, 2017 at 05:49:05PM +, Suzuki K. Poulose wrote:
> Track the user visible fields of a CPU feature register. This will be
> used for exposing the value to the userspace. All the user visible
> fields of a feature register will be passed on as it is, while the
> others would be fill
On Thu, Jan 5, 2017 at 12:20 PM, Hoegeun Kwon wrote:
> This patch add support for MIPI-DSI based S6E3HA2 AMOLED panel
> driver. This panel has 1440x2560 resolution in 5.7-inch physical
> panel in the TM2 device.
>
> Signed-off-by: Donghwa Lee
> Signed-off-by: Hyungwon Hwang
> Signed-off-by: Hoeg
On Thu, Jan 05, 2017 at 06:37:34PM +0100, Emmanuel Vadot wrote:
>
> Hi,
>
> On Thu, 5 Jan 2017 18:16:01 +0100
> Maxime Ripard wrote:
>
> > Hi,
> >
> > On Mon, Dec 26, 2016 at 06:53:49PM +0100, Emmanuel Vadot wrote:
> > > Enable the spi1 and spi2 node since the pins are exposed on the UEXT
> >
On Thu, Jan 5, 2017 at 9:51 AM, Andy Lutomirski wrote:
> On Wed, Jan 4, 2017 at 2:16 PM, Thomas Garnier wrote:
>> Each processor holds a GDT in its per-cpu structure. The sgdt
>> instruction gives the base address of the current GDT. This address can
>> be used to bypass KASLR memory randomizatio
On Wed, Jan 4, 2017 at 6:19 AM, Kirill A. Shutemov wrote:
> On Tue, Jan 03, 2017 at 10:27:22AM -0800, Andy Lutomirski wrote:
>> On Tue, Jan 3, 2017 at 8:04 AM, Kirill A. Shutemov
>> wrote:
>> > And what about stack? I'm not sure that everybody would be happy with
>> > stack in the middle of addr
On Thu, Jan 5, 2017 at 1:51 AM, David Laight wrote:
> From: Dmitry Safonov
>> Sent: 30 December 2016 15:57
>> All users of TASK_SIZE_OF(tsk) have migrated to mm->task_size or
>> TASK_SIZE_MAX since:
>> commit d696ca016d57 ("x86/fsgsbase/64: Use TASK_SIZE_MAX for
>> FSBASE/GSBASE upper limits"),
>>
From: Stephen Hemminger
Date: Thu, 5 Jan 2017 09:31:36 -0800
> The network device operation for reading statistics is only called
> in one place, and it ignores the return value. Having a structure
> return value is potentially confusing because some future driver could
> incorrectly assume that
On 01/05/2017 07:50 PM, Andy Gross wrote:
On Thu, Jan 05, 2017 at 02:25:25PM +0530, Vivek Gautam wrote:
Assign num_parents as 0 while registering fixed rate clocks
in _qcom_cc_register_board_clk(), to make sure the clk framework
doesn't dereference parent.
Fixes: ee15faffef11 ("clk: qcom: comm
On 01/04, Jamie Iles wrote:
>
> This can result in init becoming stoppable/killable after tracing. For
> example, running:
>
> while true; do kill -STOP 1; done &
> strace -p 1
>
> and then stopping strace and the kill loop will result in init being
> left in state TASK_STOPPED. Sending SIGCO
On Wed, Jan 4, 2017 at 2:16 PM, Thomas Garnier wrote:
> Each processor holds a GDT in its per-cpu structure. The sgdt
> instruction gives the base address of the current GDT. This address can
> be used to bypass KASLR memory randomization. With another bug, an
> attacker could target other per-cpu
On Thu, Jan 5, 2017 at 9:54 AM, Thomas Garnier wrote:
> On Thu, Jan 5, 2017 at 9:51 AM, Andy Lutomirski wrote:
>> On Wed, Jan 4, 2017 at 2:16 PM, Thomas Garnier wrote:
>>> Each processor holds a GDT in its per-cpu structure. The sgdt
>>> instruction gives the base address of the current GDT. Thi
Here is a new trace in the meanwhile: reporting it in case it proves useful.
Thank you very much for your help and patience.
Enrico
[34839.019680] INFO: rcu_sched self-detected stall on CPU
[34839.019694] INFO: rcu_sched detected stalls on CPUs/tasks:
[34839.019711] 0-...: (1 GPs behind) idle=3d7
On Thu, 2017-01-05 at 10:27 -0700, Jason Gunthorpe wrote:
> On Thu, Jan 05, 2017 at 03:52:02PM +, Fuchs, Andreas wrote:
[...]
> > - Session Limits (here it gets ugly):
>
> > Even thought the TPM supports the same swapping-scheme for sessions
> > as it does for transient objects, it only allows
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