From: Colin Ian King
Trivial fix to typo in dev_dbg message
Signed-off-by: Colin Ian King
---
drivers/crypto/sahara.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c
index 0c49956..7ba0eae 100644
--- a/drivers/crypto/sahara.
Thanks for the pointer.
But I don't like this patch. If you find a bug, make a bug report or
just fix it if you know the fix already. Or write something in IRC. Or
write on the Mailing list as a general question or something else
But I really don't agree on doing it this way. You would have neede
For xhci-hcd platform device, all the DMA parameters are not configured
properly, notably dma ops for dwc3 devices.
The idea here is that you pass in the parent of_node along with the child
device pointer, so it would behave exactly like the parent already does.
The difference is that it also hand
Do not require dma_set_coherent_mask for hcd
Signed-off-by: Arnd Bergmann
---
drivers/usb/chipidea/core.c | 3 ---
drivers/usb/dwc3/core.c | 6 --
drivers/usb/dwc3/dwc3-st.c | 1 -
drivers/usb/dwc3/host.c | 4
4 files changed, 14 deletions(-)
diff --git a/drivers/usb/chipidea/
On Tue 2016-10-25 13:09:25, Karol Herbst wrote:
> Thanks for the pointer.
>
> But I don't like this patch. If you find a bug, make a bug report or
> just fix it if you know the fix already. Or write something in
> IRC. Or
I found a bug, and this is my bug report. Can you take care and fix
it?
On Mon, 24 Oct 2016, Dave Airlie wrote:
> A recent change to the mm code in:
> 87744ab3832b83ba71b931f86f9cfdb000d07da5
nit: 12 digits of the SHA1 are sufficient :)
> +int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size)
> +{
> + enum page_cache_mode type = _PAGE_CACHE_
Hi,
On Tue, Oct 25, 2016 at 12:48 PM, Luc, Piotr wrote:
> Hi
>
> Could you tell me what more do I need to do to get the patch
> accepted?
>
> The mentioned path 03/11 is already merged in 4.9.rc2.
If it's already there, I can pick up the intel_pstate one.
Thanks,
Rafael
On 25/10/2016 04:58, Wanpeng Li wrote:
> @@ -319,7 +319,7 @@ static void kvm_guest_apic_eoi_write(u32 reg, u32 val)
This needs to be notrace too.
Paolo
>*/
> if (__test_and_clear_bit(KVM_PV_EOI_BIT, this_cpu_ptr(&kvm_apic_eoi)))
> return;
> - apic_write(APIC_EOI
From: Colin Ian King
Some of the pr_* messages are missing spaces, so insert these and also
unbreak multi-line literal strings in pr_* messages
Signed-off-by: Colin Ian King
---
net/caif/cfcnfg.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/net/caif/cfcnfg.c b/n
On Tue, Oct 25, 2016 at 10:34 AM, Miklos Szeredi wrote:
> To allow adding new, backward incompatible features to overlayfs, we need a
> way to store the list of features in the overlay. This is done via
> "trusted.overlay.features" xattr on the root of the upper layer (or one of
> the lower layer
John Johansen wrote:
> On 10/21/2016 05:49 AM, Tetsuo Handa wrote:
> > CaitSith (acronym for "Characteristic action inspection tool. See if
> > this helps.") is an LSM based access control implementation which uses
> > action check list (acl) as policy syntax.
> >
>
> << snip >>
>
> > CaitSith t
On Mon 2016-10-24 14:29:33, Tony Lindgren wrote:
> * Pavel Machek [161024 14:24]:
> > Hi!
> >
> > What about something like this? N900 will drain the battery down to
> > system crash, which is quite uncool.
>
> Can't we make that generic and configurable for the voltage somehow?
>
> Also, the s
Il 25/10/2016 12:10, luca abeni ha scritto:
> I think that both the "/proc based" interface proposed by Tommaso and
> the syscall-based one are useful (for different purposes).
+1
-- Daniel
On Mon, 24 Oct 2016 17:56:13 +0200 Arnd Bergmann wrote:
> The slub allocator gives us some incorrect warnings when
> CONFIG_PROFILE_ANNOTATED_BRANCHES is set, as the unlikely()
> macro prevents it from seeing that the return code matches
> what it was before:
>
> mm/slub.c: In function ‘kmem_ca
On 24/10/16 18:48, Zach Brown wrote:
> On Mon, Oct 24, 2016 at 10:34:46AM +0300, Adrian Hunter wrote:
>> On 22/10/16 00:35, Zach Brown wrote:
>>> When the sdhci-cap-speed-modes-broken DT property is set, the driver
>>> will ignore the bits of the capability registers that correspond to
>>> speed mo
On Mon, Oct 24, 2016 at 10:49 PM, Jarod Wilson wrote:
> On Mon, Oct 24, 2016 at 05:06:42PM -0700, Linus Torvalds wrote:
>> On Mon, Oct 24, 2016 at 4:18 PM, Jarod Wilson wrote:
>> >
>> > But in that case, what if your patch generation script used a filter to
>> > exclude those binary files? No har
Artem Savkov wrote:
> > Which suggested patch? One of Kirill's (there are at least two) or yours?
>
> I suggest mine, since it is more flexible.
Fine by me.
> > Note that we *also* need the "KEYS: Sort out big_key initialisation" patch -
> > just changing the Kconfig is not sufficient a fix i
On Mon, Oct 24, 2016 at 05:42:33PM -0700, John Stultz wrote:
> Adds DT bindings documentation for the hi6210-i2s driver.
> ---
> v3:
> * Simplified and reworked dt binding
> ---
Please allow a reasonable time for review, especially given that there's
been no visible effort here to address the pro
My wife and I have awarded you with a donation of £1.5 million Pounds
from part of our Jackpot Lottery of 161,653,000 Million Pounds, send your
name,address, phone for claims.
View http://www.bbc.co.uk/news/uk-scotland-glasgow-west-18801698
We await your earliest response and God Bless you.
Best
2016-10-25 07:39+0800, Wanpeng Li:
> 2016-10-24 23:27 GMT+08:00 Radim Krčmář :
>> 2016-10-24 17:09+0200, Paolo Bonzini:
>>> On 24/10/2016 17:03, Radim Krčmář wrote:
>> [...]
>>>
>>> Reviewed-by: Paolo Bonzini
>>>
>>> Go ahead, squash it into 5/5 and commit to kvm/queue. :)
>>
>> Did that, thanks.
I just got
qemu-system-s39: page allocation failure: order:0,
mode:0x220(GFP_NOWAIT|__GFP_NOTRACK)
CPU: 0 PID: 6664 Comm: qemu-system-s39 Tainted: G 4.9.0-rc2+ #44
[...]
([<0011230a>] show_trace+0x62/0x78)
([<001123da>] show_stack+0x72/0xf0)
([<004a7906>] dump_stack+0x
On Tue, 2016-10-25 at 13:16 +0200, Rafael J. Wysocki wrote:
> Hi,
>
> On Tue, Oct 25, 2016 at 12:48 PM, Luc, Piotr
> wrote:
> >
> > Hi
> >
> > Could you tell me what more do I need to do to get the patch
> > accepted?
> >
> > The mentioned path 03/11 is already merged in 4.9.rc2.
>
> If it's
On Wed, Oct 19, 2016 at 01:01:06PM -0700, Dan Williams wrote:
> >>
> >> In the cover letter, "[PATCH 0/3] iopmem : A block device for PCIe
> >> memory", it mentions that the lack of I/O coherency is a known issue
> >> and users of this functionality need to be cognizant of the pitfalls.
> >> If th
On Tuesday 25 October 2016 13:27:57 Pavel Machek wrote:
> On Mon 2016-10-24 14:29:33, Tony Lindgren wrote:
> > * Pavel Machek [161024 14:24]:
> > > Hi!
> > >
> > > What about something like this? N900 will drain the battery down to
> > > system crash, which is quite uncool.
> >
> > Can't we make
On 25/10/2016 13:43, Radim Krčmář wrote:
> Oops, silly mistake -- apic_timer_expired() was in the 'else' branch in
> [5/5] and I didn't invert the condition after moving it.
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 6244988418be..d7e74c8ec8ca 100644
> --- a/arch/x86/kv
On Tue, Oct 25, 2016 at 11:35:13AM +0700, tnhu...@apm.com wrote:
> From: Tin Huynh
>
> Free and Open IPMI use SMBUS BLOCK Read/Write to support SSIF protocol.
> However, I2C Designwave Core Driver doesn't handle the case at the moment.
> The below patch supports this feature.
>
> Signed-off-by:
The semaphore 'sm_sem' is used as completion, so convert it to
struct completion. Semaphores are going away in the future. The initial
status of the completion variable is marked as completed by a call to
the function 'complete' immediately following the initialization.
Signed-off-by: Binoy Jayan
Hi,
These are a set of patches [v2] which removes semaphores from infiniband.
These are part of a bigger effort to eliminate all semaphores from the
linux kernel.
v1 -> v2:
IB/hns : Use wait_event instead of open coding counting semaphores
IB/mthca : Use wait_event instead of open coding count
Clean up common code (to post a list of work requests to the send queue of
the specified QP) at various places and add a helper function
'mlx5_ib_post_send_wait' to implement the same. The counting semaphore
'umr_common:sem' is also moved into the helper. This may later be modified
to replace the s
Counting semaphores are going away in the future, so replace the semaphore
mthca_cmd::event_sem with a conditional wait_event.
Signed-off-by: Binoy Jayan
---
drivers/infiniband/hw/hns/hns_roce_cmd.c| 37 +
drivers/infiniband/hw/hns/hns_roce_device.h | 2 +-
2 fil
The semaphore 'poll_sem' is a simple mutex, so it should be written as one.
Semaphores are going away in the future. So replace the semaphore 'poll_sem'
with a mutex. Also, remove mutex_[un]lock from mthca_cmd_use_events and
mthca_cmd_use_polling respectively.
Signed-off-by: Binoy Jayan
---
driv
The semaphore 'poll_sem' is a simple mutex, so it should be written as one.
Semaphores are going away in the future. So replace the semaphore 'poll_sem'
with a mutex. Also, remove mutex_[un]lock from mthca_cmd_use_events and
mthca_cmd_use_polling respectively.
Signed-off-by: Binoy Jayan
---
driv
Semaphore sem in iwpm_nlmsg_request is used as completion, so
convert it to a struct completion type. Semaphores are going
away in the future.
Signed-off-by: Binoy Jayan
---
drivers/infiniband/core/iwpm_msg.c | 8
drivers/infiniband/core/iwpm_util.c | 7 +++
drivers/infiniband/core
The semaphore 'sem' in isert_device is used as completion, so convert
it to struct completion. Semaphores are going away in the future.
Signed-off-by: Binoy Jayan
---
drivers/infiniband/ulp/isert/ib_isert.c | 6 +++---
drivers/infiniband/ulp/isert/ib_isert.h | 3 ++-
2 files changed, 5 insertion
My wife and I have awarded you with a donation of £1.5 million Pounds
from part of our Jackpot Lottery of 161,653,000 Million Pounds, send your
name,address, phone for claims.
View http://www.bbc.co.uk/news/uk-scotland-glasgow-west-18801698
We await your earliest response and God Bless you.
Best
Hello Miklos,
thanks for your work on this patch set!
On Tue, 25 Oct 2016, Miklos Szeredi wrote:
> +renaming directories
> +
> +
> +When renaming a directory that is on the lower layer or merged (i.e. the
> +directory was not created on the upper layer to start with) overlayfs
Counting semaphores are going away in the future, so replace the semaphore
mthca_cmd::event_sem with a conditional wait_event.
Signed-off-by: Binoy Jayan
---
drivers/infiniband/hw/mthca/mthca_cmd.c | 37 -
drivers/infiniband/hw/mthca/mthca_dev.h | 3 ++-
2 files
On 25/10/16 04:09, Jerome Glisse wrote:
> On Mon, Oct 24, 2016 at 10:01:49AM +0530, Anshuman Khandual wrote:
>
>> [...]
>
>> Core kernel memory features like reclamation, evictions etc. might
>> need to be restricted or modified on the coherent device memory node as
>> they can be performa
On Mon, Oct 24, 2016 at 9:49 PM, Maxime Ripard
wrote:
> However, it looks like the first patch from this serie is missing from
> your tree, is there a reason for that?
No can you point it out?
> Also, in order to preserve bisectability, could you create an
> immutable branch for those sunxi pat
On Tue, Oct 25, 2016 at 3:47 AM, Masahiro Yamada
wrote:
> Sylvain Lemieux reports the LPC32xx GPIO driver is broken since
> commit 762c2e46c059 ("gpio: of: remove of_gpiochip_and_xlate() and
> struct gg_data"). Probably, gpio-etraxfs.c and gpio-davinci.c are
> broken too.
>
> Those drivers regis
On Tue, Oct 25, 2016 at 6:57 AM, Deepak Das wrote:
> generic gpio request/free should be added after gpiocip registration
> to validate mapping of gpiochip with pinctrl subsystem.
>
> gpiochip->pin_ranges list contains the information used by pinctrl
> subsystem to configure corresponding pins fo
Some changes I'm working on causes some warning because two included
headers defines the same macros.
Change in V2:
Update the d830 evm board file to use the da8xx-cfgchip.h
These changes are required as I'm sending this patch apart from
the series "[PATCH/RFT v2 00/17] Add DT support for ohci-da8
Some macro for DA8xx CFGCHIP are defined in usb-davinci.h,
but da8xx-cfgchip.h intend to replace them.
The usb-da8xx.c is using both headers, causing redefined symbol warnings.
Remove the macro and update the da830-evm board file to use da8xx-cfgchip.h
Signed-off-by: Alexandre Bailon
---
arch/ar
This reverts commit 36b30d6138f4677514aca35ab76c20c1604baaad.
This is necessary to detect paz00 (ac100) touchpad properly as one
speaking ETPS/2 protocol. Without it X.org's synaptics driver doesn't
work as the touchpad is detected as an ImPS/2 mouse instead.
Commit ec6184b1c717b8768122e25fe6d312
Hi Oliver,
I can confirm that your patch fixes the warnings for me.
Tested-by: Andrey Konovalov
On Mon, Oct 24, 2016 at 10:17 PM, Cong Wang wrote:
> On Mon, Oct 24, 2016 at 1:10 PM, Cong Wang wrote:
>> On Mon, Oct 24, 2016 at 12:11 PM, Oliver Hartkopp
>> wrote:
>>> if (proc_dir) {
>>
On 10/25/2016 12:03 PM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> From: Alexandre Bailon
>>
>> Some macro for DA8xx CFGCHIP are defined in usb-davinci.h,
>> but da8xx-cfgchip.h intend to replace them.
>> The usb-da8xx.c is using both headers, causing r
On 11/10/16 23:26, Balbir Singh wrote:
>
>
> On 07/10/16 05:36, Reza Arbab wrote:
>> Currently, CONFIG_MOVABLE_NODE depends on X86_64. In preparation to
>> enable it for other arches, we need to factor a detail which is unique
>> to x86 out of the generic mm code.
>>
>> Specifically, as documen
On Tuesday 25 October 2016 05:41 PM, Linus Walleij wrote:
> On Tue, Oct 25, 2016 at 6:57 AM, Deepak Das wrote:
>
>> generic gpio request/free should be added after gpiocip registration
>> to validate mapping of gpiochip with pinctrl subsystem.
>>
>> gpiochip->pin_ranges list contains the inform
On 2016-10-21 17:03:56 [-0400], Charles (Chas) Williams wrote:
> I can't get dedicated access to the specific bare metal since it is
> running as a dedicated hypervisor. I haven't seen this issue anywhere
> else though with the 4.8 kernel.
That is something :)
> > If a callback (such as CPUHP_PE
On 10/18/2016 04:37 PM, Enric Balletbo Serra wrote:
[...]
--- /dev/null
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
[...]
+
+/* Firmware */
+#define PS_FW_NAME "ps864x_fw.bin"
+
From where I can download this firmware image?
I suppose this FW bits have to be added to linux-f
Hi Marcelo,
I can confirm that your patch fixes the issue for me.
Tested-by: Andrey Konovalov
On Mon, Oct 24, 2016 at 9:44 PM, Marcelo Ricardo Leitner
wrote:
> Hi Andrey,
>
> On Mon, Oct 24, 2016 at 05:30:04PM +0200, Andrey Konovalov wrote:
>> The problem is that sctp_walk_errors walks the chu
On Tuesday, October 25, 2016 5:31:59 PM CEST Binoy Jayan wrote:
> Clean up common code (to post a list of work requests to the send queue of
> the specified QP) at various places and add a helper function
> 'mlx5_ib_post_send_wait' to implement the same. The counting semaphore
> 'umr_common:sem' is
On Tue, Oct 25, 2016 at 05:31:59PM +0530, Binoy Jayan wrote:
> Clean up common code (to post a list of work requests to the send queue of
> the specified QP) at various places and add a helper function
> 'mlx5_ib_post_send_wait' to implement the same. The counting semaphore
> 'umr_common:sem' is al
On Tuesday, October 25, 2016 5:31:57 PM CEST Binoy Jayan wrote:
> static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64
> in_param,
> u64 out_param, unsigned long in_modifier,
> @@ -198,11 +218,12 @@ static int __hns_roce_cmd_mbox_wait(struct hns
For xhci-hcd platform device, all the DMA parameters are not configured
properly, notably dma ops for dwc3 devices.
The idea here is that you pass in the parent of_node along with the child
device pointer, so it would behave exactly like the parent already does.
The difference is that it also hand
- On Oct 24, 2016, at 9:58 PM, Daniel Mentz danielme...@google.com wrote:
> gen_pool_alloc_algo() iterates over all chunks of a pool trying to find
> a contiguous block of memory that satisfies the allocation request.
> The search should start at address zero of every chunk. However, as the
>
Hi Paul, Greg,
Am Dienstag, 25. Oktober 2016, 15:10:55 CEST schrieb Paul Fertser:
> This reverts commit 36b30d6138f4677514aca35ab76c20c1604baaad.
>
> This is necessary to detect paz00 (ac100) touchpad properly as one
> speaking ETPS/2 protocol. Without it X.org's synaptics driver doesn't
> work a
LS1046a has three PCIe controllers.
Signed-off-by: Minghuan Lian
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 66 ++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
ind
On Tue, Oct 25, 2016 at 02:23:48PM +0200, Andrey Konovalov wrote:
> Hi Marcelo,
>
> I can confirm that your patch fixes the issue for me.
>
> Tested-by: Andrey Konovalov
Great, thanks Andrey!
I'll post the patch in a few.
>
> On Mon, Oct 24, 2016 at 9:44 PM, Marcelo Ricardo Leitner
> wrote:
On 25/10/16 04:38, Dave Hansen wrote:
> On 10/23/2016 09:31 PM, Anshuman Khandual wrote:
>> VMAs containing coherent device memory should be marked with VM_CDM. These
>> VMAs need to be identified in various core kernel paths and this new flag
>> will help in this regard.
>
> ... and it's sticky
Hi Dave and Christoph
On Fri, Oct 21, 2016 at 10:12:53PM +1100, Dave Chinner wrote:
> On Fri, Oct 21, 2016 at 02:57:14AM -0700, Christoph Hellwig wrote:
> > On Fri, Oct 21, 2016 at 10:22:39AM +1100, Dave Chinner wrote:
> > > You do realise that local filesystems can silently change the
> > > locat
From: Sreekanth Reddy
Observing below kernel panic while creating second raid disk
on LSI SAS3008 HBA card.
[ +0.55] [ cut here ]
[ +0.07] WARNING: CPU: 2 PID: 281 at fs/sysfs/dir.c:31
sysfs_warn_dup+0x62/0x80
[ +0.02] sysfs: cannot create duplicate filena
On Tue, 2016-10-25 at 14:50 +0300, Mika Westerberg wrote:
> On Tue, Oct 25, 2016 at 11:35:13AM +0700, tnhu...@apm.com wrote:
> > --
> > CONFIDENTIALITY NOTICE: This e-mail message, including any
> > attachments, is
> > for the sole use of the intended recipient(s) and contains
> > information th
Hi Binoy,
snip
>
> port->ib_dev = device;
> port->port_num = port_num;
> - sema_init(&port->sm_sem, 1);
> + init_completion(&port->sm_comp);
> + complete(&port->sm_comp);
Why complete here?
> mutex_init(&port->file_mutex);
> INIT_LIST_HEAD(&por
New Cadence GEM hardware support Large Segment Offload (LSO):
TCP segmentation offload (TSO) as well as UDP fragmentation
offload (UFO). Support for those features was added to the driver.
Signed-off-by: Rafal Ozieblo
---
Changed in v2:
macb_lso_check_compatibility() changed to macb_features_chec
On 2016-10-25 14:22:05 [+0200], To Charles (Chas) Williams wrote:
> > [3.107263] rapl_cpu_prepare: pmu 880234faa540 cpu 0 pkgid 0
> > [3.107400] rapl_cpu_prepare: pmu 880234faa600 cpu 1 pkgid 2
> > [3.107537] rapl_cpu_prepare: pmu 880234faa6c0 cpu 2 pkgid
On 25 October 2016 at 17:53, Arnd Bergmann wrote:
> On Tuesday, October 25, 2016 5:31:59 PM CEST Binoy Jayan wrote:
> Looks reasonable.
Thank you Arnd for looking at it again.
> Did you get a warning about 'bad' being unused here? I would have
> guessed not, since the original code was not that
On Mon, Oct 24, 2016 at 10:11:15PM -0200, Mauro Carvalho Chehab wrote:
> Em Mon, 24 Oct 2016 23:28:44 +0100
> Andrey Utkin escreveu:
>
> > On Mon, Oct 24, 2016 at 10:59:24PM +0200, SF Markus Elfring wrote:
> > > From: Markus Elfring
> > > Date: Mon, 24 Oct 2016 22:08:47 +0200
> > >
> > > * Mult
1. The different version of a SoC may have different MSI
implementation. But compatible "fsl,-msi" can not describe
the SoC version. The MSI driver will use SoC match interface to get
SoC type and version instead of compatible string. So all MSI node
can use the common compatible "fsl,ls-scfg-msi"
On Tue, Oct 25, 2016 at 10:34 AM, Miklos Szeredi wrote:
> Current code returns EXDEV when a directory would need to be copied up to
> move. We could copy up the directory tree in this case, but there's
> another solution: point to old lower directory from moved upper directory.
>
> This is achiev
On Tue, 25 Oct 2016, Ley Foon Tan wrote:
On Mon, Oct 24, 2016 at 5:09 PM, James Hogan wrote:
On Sat, Oct 22, 2016 at 03:14:04PM +0300, Yury Norov wrote:
The newer prlimit64 syscall provides all the functionality provided by
the getrlimit and setrlimit syscalls and adds the pid of target pro
Hi Mark,
On Mon, Oct 24, 2016 at 8:19 PM, Mark Brown wrote:
> On Mon, Oct 24, 2016 at 08:11:40PM +0200, Axel Haslam wrote:
>> On Mon, Oct 24, 2016 at 7:53 PM, Mark Brown wrote:
>
>> > does it make sense to report this as a mode, we don't report other error
>> > conditions as modes but instead us
On Tue, 2016-10-25 at 12:40 +0200, Geert Uytterhoeven wrote:
> Mike: I see you are using a PC, while I'm using an ARM board (with DT).
> Are you using a serial console? If yes, what's the value of port->console
> before and after the call to uart_console() that Rob's patch below removes?
Well, it
On 25.10.2016 13:45, Sriram Dash wrote:
For the USB3.0 controller, USB 2.0 reset not driven while
port is in Resume state. So, do not program the USB 2.0 reset
(PORTSC[PR]=1) while in Resume state.
Signed-off-by: Rajat Srivastava
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
W
On 10/25, Roman Pen wrote:
>
> struct task_struct *wq_worker_sleeping(struct task_struct *task)
> {
> - struct worker *worker = kthread_data(task), *to_wakeup = NULL;
> + struct worker *worker, *to_wakeup = NULL;
> struct worker_pool *pool;
>
> +
> + if (task->state == TASK_DE
On 25 October 2016 at 17:58, Arnd Bergmann wrote:
> On Tuesday, October 25, 2016 5:31:57 PM CEST Binoy Jayan wrote:
>> static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64
>> in_param,
>> u64 out_param, unsigned long in_modifier,
>> @@ -198,11
On 25/10/16 13:35, Minghuan Lian wrote:
> 1. The different version of a SoC may have different MSI
> implementation. But compatible "fsl,-msi" can not describe
> the SoC version.
Can't it?
compatible = "fsl-ls1043a-rev11-msi";
Oh, I guess it can!
Joking aside, if there are multiple vers
On Tue, Oct 25, 2016 at 2:56 PM, Oleg Nesterov wrote:
> On 10/25, Roman Pen wrote:
>>
>> struct task_struct *wq_worker_sleeping(struct task_struct *task)
>> {
>> - struct worker *worker = kthread_data(task), *to_wakeup = NULL;
>> + struct worker *worker, *to_wakeup = NULL;
>> struc
Hi Sricharan,
On 10/24/2016 01:18 PM, Sricharan R wrote:
> From: Rajendra Nayak
>
> Some GDSCs might support a HW control mode, where in the power
> domain (gdsc) is brought in and out of low power state (while
> unsued) without any SW assistance, saving power.
> Such GDSCs can be configured in
2016-10-25 12:48+, Wanpeng Li:
>> 在 2016年10月24日，下午11:03，Radim Krčmář 写道：
>>
>> I have only compile-tested it, but it should optimize the switch and
>> also fix two bugs. The first one is major.
>> This needs that the deadline clearing in [5/5] is fixed.
>> ---8<---
>> We must start the hrime
1. Change compatible to "fsl,ls-scfg-msi"
2. Move three MSI dts node into the parent node "msi-controller".
So a PCIe device can request the MSI from the three MSI controllers.
3. The rev1.1 of LS1043a moves PCIe INTB/C/D interrupts to MSI controller.
Signed-off-by: Minghuan Lian
---
arch/arm64/
From: Gong Qianyu
In order to support kvm, rev1.1 LS1043a GIC register has been
changed to align as 64K. The patch updates GIC node according to
the rev1.1 hardware.
Signed-off-by: Gong Qianyu
Signed-off-by: Minghuan Lian
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 8
1 file
1. Change compatible to "fsl,ls-scfg-msi"
2. Move two MSI dts node into the parent node "msi-controller".
So a PCIe device can request the MSI from the two MSI controllers.
Signed-off-by: Minghuan Lian
---
arch/arm/boot/dts/ls1021a.dtsi | 28
1 file changed, 16 inser
On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
> >
> On 25/10/16 10:14, Linus Walleij wrote:
> >
> > On Fri, Oct 21, 2016 at 11:06 AM, Jerome Brunet > om> wrote:
> >
> > >
> > > >
> > > > Isn't this usecase (also as described in the cover letter) a
> > > > textbook
> > > > example of
Hi Ramakrishna,
>Add changes to support different scale functions to convert adc code to
>physical units.
>
>Signed-off-by: Rama Krishna Phani A
>---
> drivers/iio/adc/qcom-spmi-vadc.c | 319 ++-
> 1 file changed, 249 insertions(+), 70 deletions(-)
>
>diff --git
On 10/25/2016 1:51 AM, Mathias Nyman wrote:
On 24.10.2016 17:52, Babu Moger wrote:
On 10/24/2016 5:54 AM, Yoshihiro Shimoda wrote:
Hi,
From: Mathias Nyman
Sent: Monday, October 24, 2016 6:58 PM
On 22.10.2016 01:25, Babu Moger wrote:
Never seen XHCI auto handoff working on TI and RENESAS c
1. The patch uses soc_device_match() to match the SoC family
and revision instead of DTS compatible, because compatible cannot
describe the SoC revision information.
2. The patch provides a new method to support Layerscape
SCFG MSI. It tries to assign a dedicated MSIR to every core.
When changing a
On 25/10/16 13:39, Minghuan Lian wrote:
> 1. The patch uses soc_device_match() to match the SoC family
> and revision instead of DTS compatible, because compatible cannot
> describe the SoC revision information.
> 2. The patch provides a new method to support Layerscape
> SCFG MSI. It tries to assi
On 25 October 2016 at 17:56, Leon Romanovsky wrote:
> On Tue, Oct 25, 2016 at 05:31:59PM +0530, Binoy Jayan wrote:
> In case of success (err == 0), you will call to unmap_dma instead of
> normal flow.
>
> NAK,
> Leon Romanovsky
Hi Loen,
Even in the original code, the regular flow seems to reac
Why not? It all depends on the load type, working set and the access
patterns. There's no strong correlation between the load of a machine
and the amount of branch misses...
Yes I did not say that there is a linear correlation but that does not
mean that those two numbers move opposite to each
On Tue, Oct 25, 2016 at 12:48:03PM +0530, Amit Shah wrote:
> On (Tue) 11 Oct 2016 [12:05:15], Matt Redfearn wrote:
> > Commit c6017e793b93 ("virtio: console: add locks around buffer removal
> > in port unplug path") added locking around the freeing of buffers in the
> > vq. However, when free_buf()
On Tuesday, October 25, 2016 6:29:45 PM CEST Binoy Jayan wrote:
> On 25 October 2016 at 17:58, Arnd Bergmann wrote:
> > On Tuesday, October 25, 2016 5:31:57 PM CEST Binoy Jayan wrote:
> >> static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64
> >> in_param,
> >>
On Tue 25-10-16 10:59:17, Zhen Lei wrote:
> If HAVE_MEMORYLESS_NODES is selected, and some memoryless numa nodes are
> actually exist. The percpu variable areas and numa control blocks of that
> memoryless numa nodes need to be allocated from the nearest available
> node to improve performance.
>
On Tue, Oct 25, 2016 at 7:55 AM, Mike Galbraith
wrote:
> On Tue, 2016-10-25 at 12:40 +0200, Geert Uytterhoeven wrote:
>
>> Mike: I see you are using a PC, while I'm using an ARM board (with DT).
>> Are you using a serial console? If yes, what's the value of port->console
>> before and after the ca
From: Of Arnd Bergmann
> Sent: 24 October 2016 16:42
> On x86, the cw1200 driver produces a rather silly warning about the
> possible use of the 'ret' variable without an initialization
> presumably after being confused by the architecture specific definition
> of WARN_ON:
>
> drivers/net/wirele
On Tue, 2016-10-25 at 08:25 -0500, Rob Herring wrote:
> On Tue, Oct 25, 2016 at 7:55 AM, Mike Galbraith
> wrote:
> > On Tue, 2016-10-25 at 12:40 +0200, Geert Uytterhoeven wrote:
> >
> > > Mike: I see you are using a PC, while I'm using an ARM board (with DT).
> > > Are you using a serial console?
On Tue, Oct 25, 2016 at 08:39:22PM +0800, Minghuan Lian wrote:
> 1. The patch uses soc_device_match() to match the SoC family
> and revision instead of DTS compatible, because compatible cannot
> describe the SoC revision information.
What difference do you care about? If it affects the programmin
On 25 October 2016 at 18:51, Arnd Bergmann wrote:
> On Tuesday, October 25, 2016 6:29:45 PM CEST Binoy Jayan wrote:
>
> Something like
>
> static struct hns_roce_cmd_context *hns_roce_try_get_context(struct
> hns_roce_cmdq *cmd)
> {
> struct hns_roce_cmd_context *context = NULL;
>
>
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8 +
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