On Mon, Aug 29, 2016 at 08:57:41AM -0400, Theodore Ts'o wrote:
> It's been on my todo list. The only reason why I haven't done it yet
> is because I knew you were working on a solution, and I didn't want to
> do things one way for buffered I/O, and a different way for Direct
> I/O, and disentangli
On Tue, Aug 30, 2016 at 3:05 PM, Takashi Iwai wrote:
> On Tue, 30 Aug 2016 08:25:18 +0200,
> Kai Heng Feng wrote:
>>
>> On Tue, Aug 30, 2016 at 1:33 PM, Takashi Iwai wrote:
>> > On Tue, 30 Aug 2016 07:27:41 +0200,
>> > Kai-Heng Feng wrote:
>> >>
>> >> The subwoofer on Inspiron 7559 does not work
On Tue, Aug 30, 2016 at 08:47:24AM +0200, Peter Zijlstra wrote:
> If oncpu is not valid, the sched_out that made it invalid will have
> updated the event count and we're good.
>
> All I'll leave is an explicit comment that we've ignored the
> smp_call_function_single() return value on purpose.
S
On 08/28/2016 01:21 PM, Randy Li wrote:
> The TOPEET itop exynos 4412 have three versions base board. The
> Elite version is the cheap one without too much peripheral devices
> on it.
>
> Currently supported are serial console, wired networking(USB),
> USB OTG in peripheral mode, USB host, SD stor
On 08/28/2016 01:21 PM, Randy Li wrote:
> The is not used for camera, I enabled it just for a colorspace
> convertor.
>
> Signed-off-by: Randy Li
> ---
> arch/arm/boot/dts/exynos4412-itop-elite.dts | 16
This should be squashed with patch #2.
BTW, please add also vendor prefix
On Mon, Aug 29, 2016 at 12:34:25PM -0700, David Ranch wrote:
> Hello Mikko,
>
> Somewhat related, the ax25.h file from libax25-devel also has conflicts with
> the Glibc's ax.25.h. This creates trouble so if we could get a fix for
> that, that would be appreciated as well though it might be a Glib
On 08/28/2016 01:21 PM, Randy Li wrote:
> Enable the WM8960 analog audio codec on TOPEET iTop 4412 Elite board.
>
> Signed-off-by: Randy Li
> ---
> arch/arm/boot/dts/exynos4412-itop-elite.dts | 77
> +
> 1 file changed, 77 insertions(+)
>
> diff --git a/arch/arm/boo
The subwoofer on Inspiron 7559 was disabled originally.
Applying a pin fixup to node 0x1b can enable it and make it work.
Old pin: 0x41f0
New pin: 0x90170151
Signed-off-by: Kai-Heng Feng
---
sound/pci/hda/patch_realtek.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/sound
Hi all,
Here's v3 of the Aspeed pinctrl and gpio driver patches, which aims to address
the review comments on v2:
https://lkml.org/lkml/2016/8/19/394
The combined series has been tested with both the AST2400 (g4) and AST2500 (g5)
SoCs on OpenPOWER Palmetto and Aspeed AST2500 EVB machines respe
Signed-off-by: Andrew Jeffery
Acked-by: Rob Herring
Acked-by: Joel Stanley
---
Documentation/devicetree/bindings/mfd/aspeed-scu.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-scu.txt
diff --git a/Documentation/devi
Outline expectations on the pin controller's relationship with the
System Control Unit (SCU) IP through syscon, and document the compatible
strings for 4th and 5th generation Aspeed SoC pin controllers.
Signed-off-by: Andrew Jeffery
Acked-by: Rob Herring
Acked-by: Joel Stanley
---
.../devicetr
A small subset of pins and functions are exposed. The selection of pins
and functions is driven by the development of OpenBMC[1] on the
AST2500 SoC, particularly around booting the IBM Witherspoon platform.
[1] https://github.com/openbmc/docs
Signed-off-by: Andrew Jeffery
Reviewed-by: Joel Stanl
The Aspeed SoCs typically provide more than 200 pins for GPIO and other
functions. The signal enabled on a pin is determined on a priority
basis, where a given pin can provide a number of different signal types.
In addition to the priority levels, the Aspeed pin controllers describe
the signal act
A subset of the pins and functions are exposed. The selection of
functions and pins is driven by the development of OpenBMC[1] on the
AST2400 SoC, particularly around booting the OpenPOWER Palmetto
development machine.
[1] https://github.com/openbmc/docs
Signed-off-by: Andrew Jeffery
Reviewed-by
From: Joel Stanley
The Aspeed SoCs contain GPIOs banked by letter, where each bank contains
8 pins. The GPIO banks are then grouped in sets of four in the register
layout.
The implementation exposes multiple banks through the one driver and
requests and releases pins via the pinctrl subsystem. T
Hi all,
Here's v3 of the Aspeed pinctrl and gpio driver integration patches. v2 of the
integration series can be found at:
https://lkml.org/lkml/2016/8/19/403
v3 captures changes required to address review comments from v2 of the driver
series:
https://lkml.org/lkml/2016/8/22/343
Since v2:
Signed-off-by: Andrew Jeffery
Acked-by: Joel Stanley
---
.../devicetree/bindings/gpio/gpio-aspeed.txt | 36 ++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-aspeed.txt
diff --git a/Documentation/devicetree/bindings/gpi
The pin controller's child nodes expose the functions currently
implemented in the g5 pin controller driver.
Signed-off-by: Andrew Jeffery
---
arch/arm/boot/dts/aspeed-g5.dtsi | 204 +++
1 file changed, 204 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-
The requested functions are parented by the pinctrl node to provide the
Palmetto's static pin configuration.
Signed-off-by: Andrew Jeffery
---
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmet
Signed-off-by: Andrew Jeffery
---
arch/arm/mach-aspeed/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index f3f8c5c658db..5aba9598f821 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -7,6 +7
The pin controller's child nodes expose the functions currently
implemented in the the g4 pin controller driver.
Signed-off-by: Andrew Jeffery
---
arch/arm/boot/dts/aspeed-g4.dtsi | 420 +++
1 file changed, 420 insertions(+)
diff --git a/arch/arm/boot/dts/asp
On Tue, 30 Aug 2016 09:36:34 +0200,
Kai-Heng Feng wrote:
>
> The subwoofer on Inspiron 7559 was disabled originally.
> Applying a pin fixup to node 0x1b can enable it and make it work.
>
> Old pin: 0x41f0
> New pin: 0x90170151
>
> Signed-off-by: Kai-Heng Feng
Applied (with Cc to stable).
Signed-off-by: Andrew Jeffery
---
arch/arm/boot/dts/aspeed-g4.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index a5d6e81e318a..7c2b73c4d5ab 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot
Signed-off-by: Andrew Jeffery
---
arch/arm/mach-aspeed/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index 5225fbcb250d..f3f8c5c658db 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -5,6
Signed-off-by: Andrew Jeffery
---
arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 24d79c88019f..1f6a14a0802d 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot
Signed-off-by: Andrew Jeffery
Acked-by: Joel Stanley
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a306795a7450..b9d5a9d4eee6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1027,6 +1027,7 @@ S:Maintained
F: arch/arm/mach-aspeed/
Petr,
one more question. Not related to the patch, but still related to NMI.
can NMI nest?
CPU0
-> NMI#0
printk_nmi_enter()
this_cpu_write(printk_func, vprintk_nmi)
...
=> NMI#1
: printk_nmi_
On Mon, Aug 29, 2016 at 12:53:30PM -0400, Chris Metcalf wrote:
> Would it be cleaner to just replace the set_tsk_need_resched() call
> with something like:
>
> set_current_state(TASK_INTERRUPTIBLE);
> schedule();
> __set_current_state(TASK_RUNNING);
>
> or what would you recommend?
On Mon, Aug 29, 2016 at 12:40:32PM -0400, Chris Metcalf wrote:
> On 8/29/2016 12:33 PM, Peter Zijlstra wrote:
> >On Tue, Aug 16, 2016 at 05:19:27PM -0400, Chris Metcalf wrote:
> >>+ /*
> >>+* Request rescheduling unless we are in full dynticks mode.
> >>+* We would eventually get pre-empt
IP blocks allowing a variety of trace sources to log debugging
information to a pre-defined area have been introduced on a couple of
architecture [1][2]. These system trace blocks (also known as STM)
typically follow the MIPI STPv2 protocol [3] and provide a system wide
logging facility to any devi
Currently Function traces can be only exported to ring buffer, this
patch added trace_export concept which can process traces and export
them to a registered destination as an addition to the current only
output of Ftrace - i.e. ring buffer.
In this way, if we want Function traces to be sent to ot
If CONFIG_STM_FTRACE is selected, Function trace data can be writen
to sink via STM, all functions that related to writing data packets
to STM should be marked 'notrace' to avoid being traced by Ftrace,
otherwise the program would stall into an endless loop.
Signed-off-by: Chunyan Zhang
Acked-by:
This patch adds a driver that models itself as an stm_source and
registers itself as a trace_export. Once the stm and stm_source
have been linked via sysfs, everything that is passed to the
interface from Ftrace subsystem will endup in the STM trace engine.
Signed-off-by: Chunyan Zhang
---
driv
From: Wanpeng Li
Commit 61abdbe0bc ("kvm: x86: make lapic hrtimer pinned") pins the emulated
lapic timer. This patch does the same for the emulated nested preemption
timer to avoid vmexit an unrelated vCPU and the latency of kicking IPI to
another vCPU.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc
On 30.08.2016 01:55, Andy Lutomirski wrote:
On Aug 29, 2016 11:30 AM, "Marcin Nowakowski"
wrote:
Syscall metadata makes an assumption that only a single syscall number
corresponds to a given method. This is true for most archs, but
can break tracing otherwise.
For MIPS platforms, depending
From: Wanpeng Li
TSC_OFFSET will be adjusted if discovers TSC backward during vCPU load.
The preemption timer which will leverage guest tsc to reprogram its
preemption timer value is also reprogrammed if vCPU is scheded in to
a different pCPU. However, current implementation reprogram preempti
On Mon 29-08-16 16:37:04, Michal Hocko wrote:
> [Sorry for a late reply, I was busy with other stuff]
>
> On Mon 22-08-16 15:44:53, Sonny Rao wrote:
> > On Mon, Aug 22, 2016 at 12:54 AM, Michal Hocko wrote:
> [...]
> > But what about the private_clean and private_dirty? Surely
> > those are more
Hi Eric
On 8/30/16 12:41 AM, Eric Dumazet wrote:
On Tue, 2016-08-30 at 00:03 +0800, Jia He wrote:
This patch exchanges the two loop for collecting the percpu statistics
data. This can aggregate the data by going through all the items of each
cpu sequentially. In snmp_seq_show, just use one buf
On Wed 24-08-16 12:14:06, Marcin Jabrzyk wrote:
[...]
> Sorry to hijack the thread, but I've found it recently
> and I guess it's the best place to present our point.
> We are working at our custom OS based on Linux and we also suffered much
> by /proc//smaps file. As in Chrome we tried to improve
2016-08-29 18:27 GMT+09:00 Aneesh Kumar K.V :
> js1...@gmail.com writes:
>
>> From: Joonsoo Kim
>>
>> Hello,
>>
>> Changes from v4
>> o Rebase on next-20160825
>> o Add general fix patch for lowmem reserve
>> o Fix lowmem reserve ratio
>> o Fix zone span optimizaion per Vlastimil
>> o Fix pageset
Hi Guenter,
On Mon, Aug 29, 2016 at 11:50:49AM -0700, Guenter Roeck wrote:
> Hello Heikki,
>
> On Mon, Aug 29, 2016 at 05:07:39PM +0300, Heikki Krogerus wrote:
> > Hi Guenter,
> >
> > > > Overall this is quite vague and, especially for chargers, most of the
> > > > time
> > > > misses the point
Hi Mika,
On Wed, Aug 24, 2016 at 1:13 PM, Mika Penttilä
wrote:
> Recent 4.8-rc changes to bluetooth MSG_TRUNC handling introduced regression;
> pairing finishes
> but connecting profiles not.
>
> With the below fixes to MSG_TRUNC handling the connection is established
> normally.
>
> --Mika
>
>
Hi, Pratyush
On 08/16/16 at 08:55am, Pratyush Anand wrote:
> We have observed on few x86 machines with rtc-cmos device that
> hpet_rtc_interrupt() is called just after irq registration and before
> cmos_do_probe() could call hpet_rtc_timer_init().
>
> So, neither hpet_default_delta nor hpet_t1_cm
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Damien Horsley
Acked-by: James Hartley
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile | 2 +-
2 files changed, 7 insertions(+
Also remove the RESET_CONTROLLER dependency, this Kconfig file is
included inside the menuconfig already.
Cc: Chen Feng
Signed-off-by: Philipp Zabel
---
Changes since v1:
- To build without ARCH_HISI enabled, add hisilicon/ to obj-y
unconditionally.
---
drivers/reset/Makefile | 2 +
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Moritz Fischer
Cc: Michal Simek
Cc: Sören Brinkmann
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
Changes since v1:
- Fix alphabetical order of Kconfig options
---
drivers/reset/Kc
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: Joachim Eastwood
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
Changes since v1:
- Fixed Kconfig option help text
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
Changes since v1:
- Force-enable RESET_SUNXI if ARCH_SUNXI is enabled, since the platform
code calls our init functions.
---
drivers/reset
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Maxime Coquelin
Cc: Gabriel Fernandez
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile | 2 +-
2 files changed, 7 insertions(+)
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Antoine Tenart
Cc: Sebastian Hesselbarth
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile | 2 +-
2 files changed, 7 insertions
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: Neil Armstrong
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
d
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: Dinh Nguyen
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
Changes since v1:
- Use "SoCFPGA" instead of "Soc FPGA".
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: Aban Bedel
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
---
drivers/reset/Kconfig | 7 +++
drivers/reset/Makefile | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff
On 08/29/2016 10:15 PM, Andreas Färber wrote:
> Am 29.08.2016 um 21:50 schrieb Carlo Caione:
>> On 29/08/16 20:38, Andreas Färber wrote:
>>> Am 29.08.2016 um 10:01 schrieb Carlo Caione:
On Mon, Aug 29, 2016 at 9:56 AM, Neil Armstrong
wrote:
> Neil Armstrong (3):
> ARM64: dts:
On Mon, Aug 29, 2016 at 03:41:23PM +0200, Borislav Petkov wrote:
> On Mon, Aug 29, 2016 at 09:15:00AM +0200, Pavel Machek wrote:
> > Sounds about as easy as hot unplugging arbitrary memory address. IOW
> > "not easy".
>
> Regardless, forcibly panicking the system more is still the wrong
> approach
Hi Robert,
You could use "git format-patch -M" to make this patch much smaller and to
make it simple to verify, what actually changed in mt9m111.c, if anything.
Actually it might even be good to merge this patch with patch #1.
Thanks
Guennadi
On Mon, 29 Aug 2016, Robert Jarzmik wrote:
> As th
On 29/08/16 16:18, Linus Walleij wrote:
> On Fri, Aug 26, 2016 at 5:25 PM, Arnd Bergmann wrote:
>
> [I don't see why Torvalds was CC'ed on this patch? Was there
> some specific complaint from his side that I screw things up
> or just the wrong Linus?]
>
>> The addition of the Nomadik support in
On 08/30/16 at 04:22pm, Dave Young wrote:
> Hi, Pratyush
>
> On 08/16/16 at 08:55am, Pratyush Anand wrote:
> > We have observed on few x86 machines with rtc-cmos device that
> > hpet_rtc_interrupt() is called just after irq registration and before
> > cmos_do_probe() could call hpet_rtc_timer_init
Move generic dwarf related functions from util/probe-finder.c to
util/dwarf-aux.c. Functions name and their prototype are also
changed accordingly. No functionality changes.
Suggested-by: Masami Hiramatsu
Signed-off-by: Ravi Bangoria
---
Changes in v2:
- Add comments about functions prototype
On 29/08/16 16:35, Shanker Donthineni wrote:
> Marc,
>
> Are you planning to push this change? I talked to Qualcomm ITS hw team
> and they told me nice to have this change even though we see a small gain.
Hi Shanker,
As I asked before, I'd like to know what is the actual gain on real HW,
and ho
On Sat, Aug 27, 2016 at 07:27:59PM +0800, Chen-Yu Tsai wrote:
> The value for the second channel in _ENUM_DOUBLE (double channel) MUXs
> is not correctly updated, due to using the wrong bit shift.
>
> Use the correct bit shift, so both channels toggle together.
>
> Fixes: 3727b4968453 ("ASoC: dap
The origin of the issue I've seen seems to be related to
rwsem spin lock stealing. Basically I see the system deadlock'd in the
following state
I have a system with multiple threads and
Most of the threads are stuck doing
[67272.593915] --- interrupt: e81 at _raw_spin_lock_irqsave+0xa4/0x130
[
On 30/08/16 05:17, MaJun wrote:
> From: Ma Jun
>
> During system booting, if the interrupt which has no action registered
> is triggered, it would cause system panic when try to access the
> action member.
And why would that interrupt be enabled? If you enable a PPI before
registering a handler,
Hi Robert,
On Mon, 29 Aug 2016, Robert Jarzmik wrote:
> Remove the soc_camera adherence. Mostly the change removes the power
> manipulation provided by soc_camera, and instead :
> - powers on the sensor when the s_power control is activated
> - powers on the sensor in initial probe
> - enables
Hi John,
Thank you for the patch.
On Monday 29 Aug 2016 16:41:33 John Stultz wrote:
> From: Archit Taneja
>
> This patch moves the adv7511 data structure to header file so that the
> audio driver file could use it.
Actually it doesn't, the data structure is already in the header file.
> Cc: D
On 26/08/16 18:34, Arnd Bergmann wrote:
> The amba-clcd-versatile.c code is always built-in and has to
> be done that way because it gets called by platform code that is
> also built-in. However, it now also gets called from the
> core CLCD driver through the .init_panel callback function,
> whic
On Mon, 29 Aug 2016, Heikki Krogerus wrote:
> Intel WhiskeyCove PMIC has also a USB Type-C PHY, so let's
> create a device for it.
>
> Signed-off-by: Heikki Krogerus
> Cc: Lee Jones
> ---
> drivers/mfd/intel_soc_pmic_bxtwc.c | 11 +++
> 1 file changed, 11 insertions(+)
Applied, thanks
On Mon, 29 Aug 2016, Jonathan Cameron wrote:
> On 21/08/16 20:57, Jonathan Cameron wrote:
> > On 16/08/16 13:49, Lee Jones wrote:
> >> On Mon, 15 Aug 2016, Jonathan Cameron wrote:
> >>
> >>> On 01/08/16 10:54, Enric Balletbo i Serra wrote:
> Hi,
>
> This is the four patchset to add
On 27/08/16 06:05, Oleg Drokin wrote:
> %ul was probably meant as %lu since the former would print
> an unsigned value and a letter l.
>
> But in fact the whole value we are printing in u32 anyway, so
> we don't need the format to be long. Therefore just drop the l
> altogether.
>
> Signed-off-by
Hello all,
I have been experiencing an issue with a SAMA5D3 Xplained board where
the attached LCD panel would boot up completely white until an
application that uses DRM is actually started.
After some investigation I found that this happens because by default,
backlight devices are immediately e
fork() will remove the write PTE bit from the page table on each VMA
which will be copied via COW. A such such, the memory is available but
marked read only in the page table and will fault on write access.
This renders the previous mlock() operation almost useless because in a
multi threaded appli
On Wed, Aug 17, 2016 at 02:38:50AM +0200, Rafael J. Wysocki wrote:
> On Thursday, July 28, 2016 02:25:41 AM Lukas Wunner wrote:
> > If device_add_property_set() is called for a device, a secondary fwnode
> > is allocated and assigned to the device but currently not freed once the
> > device is remo
On Tue 2016-08-30 16:58:34, Sergey Senozhatsky wrote:
> Petr,
> one more question. Not related to the patch, but still related to NMI.
>
> can NMI nest?
AFAIK, they cannot. NMIs should be disabled until iret is called.
Therefore we should be on the safe side if iret is not called
inside the NMI h
On Tue, Aug 30, 2016 at 02:35:31PM +0800, Kenneth Lee wrote:
> (add comment for the previous mail, sorry for the duplication)
>
> There is no store_ex pairing with this load_ex. It is not necessary and
> gave wrong hint to the cache system.
>
> Signed-off-by: Kenneth Lee
> ---
> arch/arm64/incl
On Mon, 15 Aug 2016, Mika Westerberg wrote:
> Intel Apollo Lake SoC exposes serial SPI flash through the LPC device. The
> SPI flash host controller is not discoverable through PCI config cycles
> because P2SB (function 0 of the device 13) is hidden by the BIOS. We unhide
> the device briefly in o
On 08/30/16 at 04:38pm, Dave Young wrote:
> On 08/30/16 at 04:22pm, Dave Young wrote:
> > Hi, Pratyush
> >
> > On 08/16/16 at 08:55am, Pratyush Anand wrote:
> > > We have observed on few x86 machines with rtc-cmos device that
> > > hpet_rtc_interrupt() is called just after irq registration and bef
On Mon, 15 Aug 2016, Mika Westerberg wrote:
> Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial
> flash host controller as part of the LPC device. This will populate an MFD
> cell suitable for the SPI host controller driver if we know that the LPC
> device has one.
>
> Sig
On Mon, 29 Aug 2016, Mika Westerberg wrote:
> On Mon, Aug 15, 2016 at 10:10:41AM +0300, Mika Westerberg wrote:
> > Hi,
> >
> > This is third version of the series. Previous versions can be found:
> >
> > v2: http://lists.infradead.org/pipermail/linux-mtd/2016-June/068277.html
> > v1: https:/
On Tue, 30 Aug 2016 18:49:37 +1000
Balbir Singh wrote:
> The origin of the issue I've seen seems to be related to
> rwsem spin lock stealing. Basically I see the system deadlock'd in the
> following state
BTW. this is not really to do with rwsems, but purely a scheduler bug.
It was seen in other
From: Michael Trimarchi
IMX6UL GEA M6UL modules are system on module solutions manufactured
by Engicam with following characteristics:
Processor Freescale i.MX 6UltraLite MCIMX6G2, 528 MHz
RAM 128MB, 16-bit DDR3
NAND SLC256MB
Power supplySingle 5V
MAX LCD RES up
On Tue, Aug 30, 2016 at 12:37 AM, Miklos Szeredi wrote:
> On Sat, Aug 27, 2016 at 11:55 AM, Miklos Szeredi wrote:
> crash> list -H gc_inflight_list unix_sock.link -s unix_sock.inflight |
> grep counter | cut -d= -f2 | awk '{s+=$1} END {print s}'
> 130
> crash> p unix_tot_inflight
> unix_tot_infl
Hi,
Not much stuff for v4.9. No specific order of pulling in.
I expect more patches coming in later so probably I will send
another pull request for v4.9 in a couple of weeks.
BTW, since few weeks and till end of September I am traveling a lot,
so my on-line availability is reduced. After Septe
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
tags/samsung-soc-4.9
for you to fetch changes up to a36289756212a79a1
On Mon, Aug 29, 2016 at 02:32:25PM +0530, Sumit Gupta wrote:
> Removed restriction of displaying model name for 32 bit tasks only.
> Because of this Processor details were not displayed in
> "System setting -> Details" in Ubuntu model name display is generic
> and can be printed for 64 bit also.
>
Hi,
This is an old one. It was ready for v4.8 but then Marc Zynger posted
some conflicting change so I postponed it. Marc's patch didn't get in,
so there is no reason to wait.
No conflict expected yet, but if you apply Marc's "arm64: dts: Fix
broken architected timer interrupt trigger" then prope
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
tags/samsung-dt-4.9
for you to fetch changes up to 05b01dd936b46f2c3c
Hi,
Expected conflict in multi_v7 - take all the changes:
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@@ -135,8 -136,7 +136,8 @@@ CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
CONFIG_CPU_FREQ_GO
Hi John,
Thank you for the patch.
On Monday 29 Aug 2016 16:41:34 John Stultz wrote:
> This patch adds support to Audio for both adv7511 and adv7533
> bridge chips.
>
> This patch was originally from [1] by Lars-Peter Clausen
> and was adapted by Archit Taneja and
> Srinivas Kandagatla .
>
> T
On 30.8.2016 01:20, Zach Brown wrote:
> The sdhci controller on xilinx zynq devices will not function unless
> the CD bit is provided. http://www.xilinx.com/support/answers/61064.html
> In cases where it is impossible to provide the CD bit in hardware,
> setting the controller to test mode and then
Hi John,
Thank you for the patches.
On Monday 29 Aug 2016 16:41:32 John Stultz wrote:
> This is another swing at getting the adv7511 hdmi bridge
> audio support reviewed.
>
> I've taken the core audio work done by Lars-Peter Clausen, and
> adapted by Srinivas Kandagatla and Archit Taneja, and tr
On Thu, Aug 25, 2016 at 06:26:31PM +0100, Catalin Marinas wrote:
> diff --git a/Documentation/static-keys.txt b/Documentation/static-keys.txt
> index 477927becacb..fd490f8b1cfa 100644
> --- a/Documentation/static-keys.txt
> +++ b/Documentation/static-keys.txt
> @@ -15,6 +15,8 @@ The updated API rep
There are some cases in arizona_dev_init, such as where we don't
recognise the chip ID, in which we head to the error path without
setting a sensible error code in ret. This would lead to the chip
silently failing probe, as it would still return 0. Fix this up by
adding appropriate sets of the retu
On Fri 2016-08-26 10:56:41, Sergey Senozhatsky wrote:
> On (08/25/16 23:10), Petr Mladek wrote:
> [..]
> > I was so taken by the idea of temporary forcing a lockless and
> > "trivial" printk implementation that I missed one thing.
> >
> > Your patch use the alternative printk() variant around logb
On 08/30/2016 12:18 PM, Miklos Szeredi wrote:
> On Tue, Aug 30, 2016 at 12:37 AM, Miklos Szeredi wrote:
>> On Sat, Aug 27, 2016 at 11:55 AM, Miklos Szeredi wrote:
>
>> crash> list -H gc_inflight_list unix_sock.link -s unix_sock.inflight |
>> grep counter | cut -d= -f2 | awk '{s+=$1} END {print
On Mon, 2016-08-29 at 15:36 +0300, Heikki Krogerus wrote:
> +What: /sys/class/typec//current_data_role
> +Date: June 2016
> +Contact: Heikki Krogerus
> +Description:
> + The current USB data role the port is operating in.
> This
> + attribute can
On Tue, Aug 30, 2016 at 10:13:30AM +0100, Lee Jones wrote:
> On Mon, 29 Aug 2016, Mika Westerberg wrote:
>
> > On Mon, Aug 15, 2016 at 10:10:41AM +0300, Mika Westerberg wrote:
> > > Hi,
> > >
> > > This is third version of the series. Previous versions can be found:
> > >
> > > v2: http://list
Hello!
(I'm not subscribed to this list, but I'm hoping to get a reply anyway)
While testing some SAN storage system, I needed a utility to erase disks
quickly. I wrote my own one that mmap()s the block device, memset()s the area,
then msync()s the changes, and finally close()s the file descript
As runtime PM doesn't function whilst processing system suspend/resume
operations and the Arizona IRQ handlers need runtime PM to function
we must disable IRQs during these operations. Whilst this is
already done in the driver we are using suspend/suspend_late and
resume/resume_noirq to do so which
2016-08-10 13:36 GMT+02:00 Roman Penyaev :
> On Wed, Aug 10, 2016 at 10:42 AM, Roman Penyaev
> wrote:
>> Hi,
>>
>> On Wed, Aug 10, 2016 at 5:55 AM, Tejun Heo wrote:
>>> Hello,
>>>
>>> On Mon, Aug 08, 2016 at 01:39:08PM +0200, Roman Pen wrote:
Long time ago there was a similar fix proposed by
On (08/30/16 11:04), Petr Mladek wrote:
> On Tue 2016-08-30 16:58:34, Sergey Senozhatsky wrote:
> > Petr,
> > one more question. Not related to the patch, but still related to NMI.
> >
> > can NMI nest?
>
> AFAIK, they cannot. NMIs should be disabled until iret is called.
> Therefore we should be
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