The capability of IRQ remapping is abstracted on IOMMU side on
some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for this.
To have a universal flag to test this capability for different
archs on PCI side, we set PCI_BUS_FLAGS_MSI_REMAP for PCI buses
when IOMMU_CAP_INTR_REMAP is set.
Signe
On Wednesday 27 April 2016 13:55:43 Geert Uytterhoeven wrote:
> On Wed, Apr 27, 2016 at 1:35 PM, Arnd Bergmann wrote:
> > On Wednesday 27 April 2016 13:21:16 Arnd Bergmann wrote:
> >> On Wednesday 27 April 2016 00:07:47 Rolf Eike Beer wrote:
> >> > Arnd Bergmann wrote:
> >> > > The asm-generic/rtc
Any IODA host bridge have the capability of IRQ remapping.
So we set PCI_BUS_FLAGS_MSI_REMAP when this kind of host birdge
is detected.
Signed-off-by: Yongji Xie
---
arch/powerpc/platforms/powernv/pci-ioda.c |8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/platforms/po
Current vfio-pci implementation disallows to mmap the page
containing MSI-X table in case that users can write to MSI-X
table and generate an incorrect MSIs.
However, this will cause some performance issue when there
are some critical device registers in the same page as the
MSI-X table. We have
This patch enables mmapping MSI-X tables if hardware supports
interrupt remapping which can ensure that a given pci device
can only shoot the MSIs assigned for it.
With MSI-X table mmapped, we also need to expose the
read/write interface which will be used to access MSI-X table.
Signed-off-by: Yo
On ARM HW the capability of IRQ remapping is abstracted on
MSI controller side. MSI_FLAG_IRQ_REMAPPING is used to advertise
this [1].
To have a universal flag to test this capability for different
archs on PCI side, we set PCI_BUS_FLAGS_MSI_REMAP for PCI buses
when MSI_FLAG_IRQ_REMAPPING is set.
We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP
which indicates all devices on the bus are protected by the
hardware which supports IRQ remapping(intel naming).
This flag will be used to know whether it's safe to expose
MSI-X tables of PCI BARs to userspace. Because the capability
of IRQ
On 27/04/16 01:36, Franklin S Cooper Jr wrote:
Add tblck to the pwm nodes. This insures that the ehrpwm driver has access
to the time-based clk.
Do not remove similar entries for ehrpwm node. Later patches will switch
from using ehrpwm node name to pwm. But to maintain ABI compatibility we
shoul
Hi
> -Original Message-
> From: Roger Quadros [mailto:rog...@ti.com]
> Sent: Wednesday, April 27, 2016 7:12 PM
> To: Jun Li ; st...@rowland.harvard.edu; ba...@kernel.org;
> gre...@linuxfoundation.org; peter.c...@freescale.com
> Cc: dan.j.willi...@intel.com; jun...@freescale.com;
> mathias.n
The promise of pretty boot splashes from firmware via BGRT was at
best only that; a promise. The kernel diligently checks to make
sure the BGRT data firmware gives it is valid, and dutifully warns
the user when it isn't. However, it does so via the pr_err log
level which seems unnecessary. The u
On Wed, 30 Mar 2016, Laxman Dewangan wrote:
> The MAXIM PMIC MAX77620 and MAX20024 are power management IC
> which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
> watchdog etc.
>
> Add DT binding document for the different functionality of
> this device.
>
> Signed-off-by: Laxman Dewangan
Arnd, Olof, Kevin,
Here is a batch of defconfig update for both AT91 and the multi_v7_defconfig.
Thanks, best regards,
The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
are available in the git repository at:
git://git.k
On 2016-04-27 04:15, Vinod Koul wrote:
On Tue, Apr 26, 2016 at 12:55:18PM -0400, Sinan Kaya wrote:
On 4/26/2016 12:25 PM, Vinod Koul wrote:
> On Tue, Apr 26, 2016 at 08:08:16AM -0400, ok...@codeaurora.org wrote:
>> On 2016-04-25 23:30, Vinod Koul wrote:
>>> On Mon, Apr 11, 2016 at 10:21:12AM -04
On 04/25/2016 11:08 AM, Mark Salter wrote:
Commit d61a3ead2680 ("[PATCH] IPMI: reserve I/O ports separately")
changed the way I/O ports were reserved and includes this comment in
log:
Some BIOSes reserve disjoint I/O regions in their ACPI tables for the IPMI
controller. This causes problems
On 04/27/2016 02:37 PM, Mel Gorman wrote:
On Wed, Apr 27, 2016 at 02:01:14PM +0200, Vlastimil Babka wrote:
!DEBUG_VM bloat-o-meter:
add/remove: 1/0 grow/shrink: 0/2 up/down: 124/-383 (-259)
function old new delta
free_pages_check_bad
Hi!
> This patch adds the support to check for and enable SME when available
> on the processor and when the mem_encrypt=on command line option is set.
> This consists of setting the encryption mask, calculating the number of
> physical bits of addressing lost and encrypting the kernel "in place."
Em Tue, Apr 26, 2016 at 11:55:36PM +0200, Peter Zijlstra escreveu:
> On Tue, Apr 26, 2016 at 06:05:00PM -0300, Arnaldo Carvalho de Melo wrote:
> > > I started with max depth = 512, and even that was still truncated, and
> > > had to profile again at 1024 to capture the full stacks. Seems to
>
Bjorn Andersson writes:
> After booting the wireless subsystem and uploading the NV blob to the
> WCNSS_CTRL service the remote continues to do things and will not start
> servicing wlan-requests for another 2-5 seconds (measured).
>
> The downstream code does not have any special handling for th
Em Tue, Apr 26, 2016 at 11:58:10PM +0200, Frederic Weisbecker escreveu:
> On Mon, Apr 25, 2016 at 09:29:28PM -0300, Arnaldo Carvalho de Melo wrote:
> > commit cd544af4f7fede01cb512d52bb3efe62aa19271d
> > Author: Arnaldo Carvalho de Melo
> > Date: Thu Apr 21 12:28:50 2016 -0300
> >
> > perf
Em Tue, Apr 26, 2016 at 02:58:41PM -0700, Brendan Gregg escreveu:
> On Tue, Apr 26, 2016 at 2:05 PM, Arnaldo Carvalho de Melo
> wrote:
> > Em Tue, Apr 26, 2016 at 01:02:34PM -0700, Brendan Gregg escreveu:
> >> On Mon, Apr 25, 2016 at 5:49 PM, Brendan Gregg
> >> wrote:
> >> > On Mon, Apr 25, 2016
On Tue, Apr 26, 2016 at 07:30:26AM -0400, Stefan Berger wrote:
> On 04/26/2016 05:28 AM, Jarkko Sakkinen wrote:
> >On Fri, Apr 22, 2016 at 07:54:27PM +0300, Jarkko Sakkinen wrote:
> >>On Mon, Apr 18, 2016 at 01:26:12PM -0400, Stefan Berger wrote:
> >>>The following series of patches implements a mu
Hi Krzysztof:
On 2016年04月25日 20:48, Krzysztof Kozlowski wrote:
On 04/25/2016 01:29 PM, Andy Yan wrote:
Hi Krzysztof:
On 2016年04月25日 18:42, Krzysztof Kozlowski wrote:
On 04/25/2016 08:55 AM, Andy Yan wrote:
This driver parses the reboot commands like "reboot bootloader"
and "reboot recovery"
Hi Vinod,
Thanks for reviewing.
On Tue, 26 Apr 2016, Vinod Koul wrote:
> On Thu, Apr 21, 2016 at 12:04:20PM +0100, Peter Griffin wrote:
>
> > + if (!atomic_read(&fchan->fdev->fw_loaded)) {
> > + dev_err(fchan->fdev->dev, "%s: fdma fw not loaded\n", __func__);
> > + return
On 04/27/2016 02:41 PM, Mel Gorman wrote:
On Wed, Apr 27, 2016 at 02:01:15PM +0200, Vlastimil Babka wrote:
Check without side-effects should be easier to maintain. It also removes the
duplicated cpupid and flags reset done in !DEBUG_VM variant of both
free_pcp_prepare() and then bulkfree_pcp_pre
On 2016-04-27 02:00, Ard Biesheuvel wrote:
On 26 April 2016 at 22:34, Elliott, Robert (Persistent Memory)
wrote:
-Original Message-
From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
ow...@vger.kernel.org] On Behalf Of Davidlohr Bueso
Sent: Tuesday, April 26, 2016 1:34 PM
From: Corey Minyard
This is so that an IPMI platform device can be created from a
DMI firmware entry.
Signed-off-by: Corey Minyard
Cc: Jean Delvare
Cc: Andy Lutomirski
Tested-by: Andy Lutomirski
---
drivers/firmware/dmi_scan.c | 16 ++--
include/linux/dmi.h | 14
From: Corey Minyard
A fwnode_handle is being added to dmi_device, and that will need to
be updated. So remove the const.
Signed-off-by: Corey Minyard
Cc: Jean Delvare
Cc: Andy Lutomirski
Tested-by: Andy Lutomirski
---
drivers/firmware/dmi_scan.c | 11 +--
include/linux/dmi.h
From: Corey Minyard
Now that the DMI code creates a platform device for IPMI devices
in the firmware, use that instead of handling all the DMI work
in the IPMI driver itself.
Signed-off-by: Corey Minyard
Tested-by: Andy Lutomirski
---
drivers/char/ipmi/ipmi_si_intf.c | 143 ---
From: Corey Minyard
It makes more sense to be there, and it's cleaner with the
upcoming conversion of IPMI DMI to a platform device.
Signed-off-by: Corey Minyard
Cc: Jean Delvare
Cc: Andy Lutomirski
Tested-by: Andy Lutomirski
---
drivers/firmware/dmi_scan.c | 108 +++
On Wed 27-04-16 13:54:35, Michal Hocko wrote:
> From: Michal Hocko
>
Ups missed Dave's note about:
> GFP_NOFS context is used for the following 4 reasons currently
> - to prevent from deadlocks when the lock held by the allocation
> context would be needed during the memory reclai
On Wed, Apr 27, 2016 at 12:55:47PM +0200, Andreas Starzer wrote:
> This Bug was already fixed in rcutiny_plugin.h with changing the
> wait-queue to simple-waiter.
>
> Found this bug with 3.10.63-rt65 in rcutree_plugin.h too. (It is not
> fixed in current 3.10-release)
>
> SVC (hard-irq-context) f
> Am 27.04.2016 um 14:31 schrieb Tero Kristo :
>
> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>
>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren :
>>>
>>> Tero,
>>>
>>> * H. Nikolaus Schaller [160418 11:23]:
OMAP5 has a register to control if the ckobuffer is enabled
and define
This is unchanged from v2, just rebased onto a more current kernel.
I haven't heard anything about this. If we could get this functionality
in to the 4.7 kernel, that would be really helpful.
The only think I really don't like about this is using driver_override,
but otherwise a bunch of infrast
From: Corey Minyard
Have DMI create a platform device for every IPMI device it
finds.
Signed-off-by: Corey Minyard
Cc: Jean Delvare
Cc: Andy Lutomirski
Tested-by: Andy Lutomirski
---
drivers/firmware/dmi_scan.c | 55 +++--
1 file changed, 53 insertion
On Wed, Apr 27, 2016 at 5:01 AM, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the net-next tree got a conflict in:
>
> drivers/net/ethernet/mellanox/mlx5/core/en_main.c
>
> between commit:
>
> d8edd2469ace ("et/mlx5e: Fix minimum MTU")
>
> from the net tree and commit:
>
>
Xilinx Spartan-3AN contain an embedded spi device where they keep their
configuration data and optionally some user data.
The protocol of this flash follows most of the spi-nor standard. With
the following differences:
- Page size might not be a power of two.
- The address calculation.
- The spi
On Wed, Apr 27, 2016 at 02:25:50PM +0200, Christian Borntraeger wrote:
> Folks,
>
> I can sometimes trigger the following bug
>
> [ 244.493534] [ cut here ]
> [ 244.493624] WARNING: CPU: 16 PID: 17257 at fs/btrfs/inode.c:9261
> btrfs_destroy_inode+0x288/0x2b0 [btrfs]
>
> On Wed, Apr 27, 2016 at 2:26 PM, Prarit Bhargava wrote:
> > Rafael, this patch is in the acpica.git tree as 7a3bd2d ("Dispatcher:
> > Update thread ID for recursive method calls"). I've had many positive
> > testing results from hardware vendors and users with this patch and
> > this resolves m
From: Elad Kanfi
Below is a description of a possible problematic
sequence. CPU-A is sending a frame and CPU-B handles
the interrupt that indicates the frame was sent. CPU-B
reads an invalid value of tx_packet_sent.
CPU-A CPU-B
-
Em Tue, Apr 26, 2016 at 10:45:28AM -0600, David Ahern escreveu:
> On 4/26/16 10:33 AM, Arnaldo Carvalho de Melo wrote:
> >So, for completeness, further testing it to see how far it goes on a 8GB
> >machine I got:
> >
> >[root@emilia ~]# echo 131100 > /proc/sys/kernel/perf_event_max_stack
> >[root@e
On 27.04.2016 04:34, Bjorn Helgaas wrote:
On Fri, Apr 15, 2016 at 07:06:38PM +0200, Tomasz Nowicki wrote:
x86 and ia64 are the only arches that implement pcibios_{add|remove}_bus hooks
and implement them in the same way. Moreover ARM64 is going to do the same.
So it seems that acpi_pci_{add|remo
On Wed, Apr 27, 2016 at 06:25:16PM +0800, Jisheng Zhang wrote:
> On Wed, 27 Apr 2016 10:57:39 +0100 Mark Brown wrote:
> > On Wed, Apr 27, 2016 at 08:37:20AM +0300, Felipe Balbi wrote:
> > > > + vbus = devm_regulator_get(&pdev->dev, "vbus");
> > > devm_regulator_get_optional() ??
> > Do
On Tue, 2016-04-26 at 23:31 -0500, miny...@acm.org wrote:
> From: Corey Minyard
>
> Commit d61a3ead2680 ("[PATCH] IPMI: reserve I/O ports separately")
> changed the way I/O ports were reserved and includes this comment in
> log:
>
> Some BIOSes reserve disjoint I/O regions in their ACPI tables
Hi Krzysztof:
On 2016年04月25日 20:48, Krzysztof Kozlowski wrote:
On 04/25/2016 01:29 PM, Andy Yan wrote:
Hi Krzysztof:
On 2016年04月25日 18:42, Krzysztof Kozlowski wrote:
On 04/25/2016 08:55 AM, Andy Yan wrote:
This driver parses the reboot commands like "reboot bootloader"
and "reboot recovery"
On 2016/4/27 20:32, Yunlong Song wrote:
> Commit 57b62d29ad5b384775974973087d47755a8c6fcc ("f2fs: fix to report
> error in f2fs_readdir") causes f2fs_readdir to return -ENOENT when
> get_lock_data_page returns -ENOENT. However, the original logic is to
> continue when get_lock_data_page returns -EN
On 2016-04-27 04:47, Marc Zyngier wrote:
On 27/04/16 09:15, Vinod Koul wrote:
On Tue, Apr 26, 2016 at 12:55:18PM -0400, Sinan Kaya wrote:
On 4/26/2016 12:25 PM, Vinod Koul wrote:
On Tue, Apr 26, 2016 at 08:08:16AM -0400, ok...@codeaurora.org
wrote:
On 2016-04-25 23:30, Vinod Koul wrote:
On M
On 04/27/2016 01:15 PM, Robin Murphy wrote:
> On 26/04/16 20:35, Grygorii Strashko wrote:
>> On 04/26/2016 07:02 PM, Liviu Dudau wrote:
>>> On Tue, Apr 26, 2016 at 06:28:52PM +0300, Grygorii Strashko wrote:
>>>
>>> Hi Grygorii,
>>>
>>> First time I'm seeing this patch, so I have a few questions, mo
Fixed checkpatch.pl's warning 'Comparisons should place the constant on
the right side of the test'
Signed-off-by: YU Bo
---
drivers/staging/xgifb/vb_setmode.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/xgifb/vb_setmode.c
b/drivers/staging/xgifb/
dmaengine_pcm currently only supports setups where FIFO reads/writes
correspond to exactly one sample, eg 16-bit sample data is transferred
via 16-bit FIFO accesses, 32-bit data via 32-bit accesses.
This patch adds support for setups with fixed width FIFOs where
multiple samples are packed into a
Hi Russell,
On 04/27/2016 01:41 PM, Russell King - ARM Linux wrote:
> On Tue, Apr 26, 2016 at 10:35:08PM +0300, Grygorii Strashko wrote:
>> On 04/26/2016 07:02 PM, Liviu Dudau wrote:
>>> Well, SoC-B has the GT *and* the DT node, so what is the problem with
>>> enabling it for SoC-B? If there are r
The bcm2835-i2s driver already has support for the S16_LE format but
that format hasn't been made available because dmaengine_pcm didn't
support packed data transfers.
bcm2835-i2s needs 16-bit left+right channel data to be packed into
a 32-bit word, the FIFO register is 32-bit only and doesn't sup
Hi,
> -Original Message-
> From: Jun Li [mailto:jun...@nxp.com]
> Sent: Wednesday, April 27, 2016 8:50 PM
> To: Roger Quadros ; st...@rowland.harvard.edu;
> ba...@kernel.org; gre...@linuxfoundation.org; peter.c...@freescale.com
> Cc: dan.j.willi...@intel.com; jun...@freescale.com;
> mathia
(additionally CC-ing Josh Triplett)
On 04/27/2016 02:50 PM, Josh Boyer wrote:
The promise of pretty boot splashes from firmware via BGRT was at
best only that; a promise. The kernel diligently checks to make
sure the BGRT data firmware gives it is valid, and dutifully warns
the user when it isn
On Wed, Apr 27, 2016 at 01:18:21PM +0100, David Woodhouse wrote:
>
> > > On some systems, including Xen and any system with a physical device
> > > that speaks virtio behind a physical IOMMU, we must use the DMA API
> > > for virtio DMA to work at all.
> > >
> > > Add a feature bit to detect that
On 04/27/2016 08:24 AM, Mark Salter wrote:
On Tue, 2016-04-26 at 23:31 -0500, miny...@acm.org wrote:
From: Corey Minyard
Commit d61a3ead2680 ("[PATCH] IPMI: reserve I/O ports separately")
changed the way I/O ports were reserved and includes this comment in
log:
Some BIOSes reserve disjoint
On Wed, Apr 27, 2016 at 2:51 PM, Prabu Thangamuthu wrote:
> Patch for Standard SD Host Controller Interface compliant Synopsys
> sdhci-dwc controller driver. This code supports PCI based interface.
> @@ -0,0 +1,244 @@
> +/*
> + * Copyright (C) 2016 Synopsys, Inc.
> + *
> + * Author: Manjunath M B
On 04/27/2016 05:35 AM, David Vrabel wrote:
On 27/04/16 06:02, Juergen Gross wrote:
On 21/04/16 11:30, Stefano Stabellini wrote:
On Thu, 21 Apr 2016, Juergen Gross wrote:
On 20/04/16 15:15, Stefano Stabellini wrote:
b4ff8389ed14 is incomplete: relies on nr_legacy_irqs() to get the number
of l
On 27/04/16 14:38, Boris Ostrovsky wrote:
>
> int xen_nr_legacy_irqs()
> {
> if (xen_hvm_domain())
> return nr_legacy_irqs();
> if (xen_initial_domain())
> return NR_IRQS_LEGACY;
> return 0;
> }
Yeah, if that does the right thing...
David
From: Chao Yu
For foreground GC, we cache node blocks in victim section and set them
dirty, then we call sync_node_pages to flush these node pages, but
meanwhile, those node pages which does not locate in victim section
will be flushed together, so more bandwidth and continuous free space
would b
On Friday 15 April 2016 12:43 AM, David Lechner wrote:
> I have separated these patches from the "da8xx USB clocks" series since that
> series no longer depends on the clock init being moved.
>
> Tested working on the linux-davinci/master branch with LEGO MINDSTORMS EV3.
>
> David Lechner (2):
>
On 04/26/2016 10:53 PM, Du, Changbin wrote:
>> On Tue, Mar 08, 2016 at 05:15:17PM +0800, changbin...@intel.com wrote:
>>> From: "Du, Changbin"
>>>
>>> This is a reworked patch based on reverted commit d8f00cd685f5 ("usb:
>>> hub: do not clear BOS field during reset device").
>>>
>>> The privious o
From: Chao Yu
The following condition can happen in a preemptible kernel, it may cause
checkpointer hunging.
CPU0: CPU1:
- write_checkpoint
- do_checkpoint
- wait_on_all_pages_writeback
- f2fs_write_end_io
On Mon, 25 Apr 2016, Rich Felker wrote:
> The shared get_futex_key code does not work on nommu, but is not
> needed anyway because it's impossible for a given backing to have
> multiple distinct virtual addresses on nommu. Simply disable these
> code paths by refraining from setting FLAG_SHARED wh
On Wed, 27 Apr 2016, Michal Marek wrote:
> On 2016-04-26 22:48, Nicolas Pitre wrote:
> > On Wed, 27 Apr 2016, Stephen Rothwell wrote:
> >
> >> Hi Nicolas,
> >>
> >> On Tue, 26 Apr 2016 10:40:57 -0400 (EDT) Nicolas Pitre
> >> wrote:
> >>>
> >>> If you can reproduce this build failure, could you
On 04/27/2016 01:12 PM, Liviu Dudau wrote:
> On Tue, Apr 26, 2016 at 10:35:08PM +0300, Grygorii Strashko wrote:
>> On 04/26/2016 07:02 PM, Liviu Dudau wrote:
>>> On Tue, Apr 26, 2016 at 06:28:52PM +0300, Grygorii Strashko wrote:
>>>
>>> Hi Grygorii,
>>>
>>> First time I'm seeing this patch, so I ha
Hi Jassi,
On 27/04/16 04:26, Jassi Brar wrote:
On Tue, Apr 26, 2016 at 10:00 PM, Robin Murphy wrote:
The current logic in pl330_get_desc() contains a clear race condition,
whereby if the descriptor pool is empty, we will create a new
descriptor, add it to the pool with the lock held, *release
Intel Quark has 16550A compatible UART with autoflow feature enabled. It has
only 16 bytes of FIFO. Currently serial8250_do_set_termios() prevents to enable
autoflow since the minimum requirement of 32 bytes of FIFO size.
Drop a FIFO size limitation to allow autoflow control be enabled on such UAR
The SoCs, such as Intel Braswell, have DesignWare UART IP. Split out the
support of such chips to a separate module which also will be used for Intel
Quark later.
The rationale to have the separate driver to be existing:
- Do not contaminate 8250_pci.c anymore with LPSS related quirks
- All of the
There is at least one known device, i.e. UART on Intel Galileo, that works
unreliably in case of use of multi block transfer support in DMA mode.
Override autodetection by user provided data.
Signed-off-by: Andy Shevchenko
---
drivers/dma/dw/core.c| 10 +++---
include/linux/
Some users consider DMA optional, thus when driver is not compiled we shouldn't
prevent compilation of the users. Add stubs for dw_dma_probe() and
dw_dma_remove().
Signed-off-by: Andy Shevchenko
---
include/linux/dma/dw.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/dma
Intel Quark has DesignWare UART. Move the code from 8250_pci to 8250_lpss.
Signed-off-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250_lpss.c | 11 +++
drivers/tty/serial/8250/8250_pci.c | 15 +--
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/t
This is combined series of two things:
- split out the Intel LPSS specific driver from 8250_pci into 8250_lpss
- enable DMA support on Intel Quark UART
The patch has been tested on few Intel SoCs / platforms. In any case I would
like to ask Bryan to do independent test.
This is targeting serial s
DMA on Intel Quark SoC is a part of UART IP block. Enable it.
Signed-off-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250_lpss.c | 61 +++--
1 file changed, 58 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_lpss.c
b/drivers/tty/seria
On Wed, Apr 27, 2016 at 02:04:46PM +0200, Andrea Arcangeli wrote:
> After the THP refcounting change, obtaining a compound pages from
> get_user_pages() no longer allows us to assume the entire compound
> page is immediately mappable from a secondary MMU.
>
> A secondary MMU doesn't want to call g
Intel Quark SoC supports MSI for LPSS, in particular for UART. Enable MSI for
Intel Quark.
Signed-off-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250_lpss.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_lpss.c
b/drivers/tty/serial/8250/8250_
Hi,
Sergei pointed out that the same patch was submitted yesterday by Timur (what
are the chances?! :-) ) https://patchwork.ozlabs.org/patch/615019/
Regards,
Sebastian
On 04/27/2016 01:34 PM, Sebastian Frias wrote:
> There is no need to register the callback introduced by
> commit 13a56b449325
On Wed, Apr 27, 2016 at 08:35:46AM +0200, Wadim Egorov wrote:
> On 26.04.2016 21:33, Heiko Stübner wrote:
> > with this patch applied, 4.6.0-rc5-next-20160426 fails to boot on
> > rk3288-veyron devices with the bug below. Reverting this one patch
> > results in the system booting again:
> This i
Intel Quark UART uses DesignWare DMA IP. Though the DMA IP is connected in such
way that handshake interface uses inverted polarity. We have to provide a
possibility to set this in the DMA driver when configuring a channel.
Introduce a new member of custom slave configuration called 'polarity' and
Hi Mauro,
On 04/27/2016 03:55 AM, Mauro Carvalho Chehab wrote:
> Hi Shuah,
>
> Good work! I have a few notes below.
>
> Em Tue, 26 Apr 2016 21:08:32 -0600
> Shuah Khan escreveu:
>
>> When driver unbind is run while media_ioctl is in progress, media_ioctl()
>> fails with use-after-free. This fi
It seems we need to extend custom slave configuration by one more member to
support Intel Quart UART. It becomes a burden to manage all members of struct
dw_dma_slave one-by-one.
Replace set of fields by embedding struct dw_dma_slave into struct dw_dma_chan.
Signed-off-by: Andy Shevchenko
---
d
From: Elad Kanfi
v2:
Remove code style commit for now.
Code style commit will be added after the bugs fix will be approved.
Summary:
1. Bug description: TX done interrupts that arrives while interrupts
are masked, during NAPI poll, will not trigger an interrupt handling.
Since TX interr
On Wed, Apr 27, 2016 at 05:16:45PM +0800, Pan Xinhui wrote:
> From: Pan Xinhui
>
> Implement xchg{u8,u16}{local,relaxed}, and
> cmpxchg{u8,u16}{,local,acquire,relaxed}.
>
> It works on all ppc.
>
> remove volatile of first parameter in __cmpxchg_local and __cmpxchg
>
> Suggested-by: Peter Zijl
Hi,
On 27.04.2016 15:18, Elad Kanfi wrote:
From: Elad Kanfi
Below is a description of a possible problematic
sequence. CPU-A is sending a frame and CPU-B handles
the interrupt that indicates the frame was sent. CPU-B
reads an invalid value of tx_packet_sent.
CPU-A
On Wed, Apr 27, 2016 at 9:26 AM, Môshe van der Sterre wrote:
> (additionally CC-ing Josh Triplett)
Thanks for doing so. I completely forgot.
> On 04/27/2016 02:50 PM, Josh Boyer wrote:
>>
>> The promise of pretty boot splashes from firmware via BGRT was at
>> best only that; a promise. The ker
Some UARTs, e.g. one is used in Intel Quark, have a different address base for
DMA operations. Introduce an additional field (per RX and TX DMA channels) in
struct uart_8250_dma to cover those cases.
Reviewed-by: Heikki Krogerus
Signed-off-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250.h
The minium voltage of 1800mV is a copy and paste error from the axp20x
regulator info. The correct minimum voltage for the ldo_io regulators
on the axp22x is 700mV.
Fixes: 1b82b4e4f954 ("regulator: axp20x: Add support for AXP22X regulators")
Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
--
The axp209 ldo4 regulator has a hole at (skips) 2600 mV and 2900 mV, fix
its range table to match.
Fixes: 13d57e64352a ("regulator: axp20x: Use linear voltage ranges for AXP20X
LDO4")
Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
---
Changes in v2:
-Add Fixes, Acked-by Chen-Yu tags
---
d
Ensure that the wm_adsp driver cleans up when the codec driver
is removed.
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/cs47l24.c | 5 +
sound/soc/codecs/wm5102.c | 4
sound/soc/codecs/wm5110.c | 6 ++
3 files changed, 15 insertions(+)
diff --git a/sound/soc/codecs/cs47
The eMMC card vmmc-supply contained incorrectly two regulators: LDO20
and buck8. The second one is ignored. Additionally the buck8 is a vqmmc
supply only on X and X2. On U3 the buck8 is providing power to the LAN
(SMSC95xx) so instead the LDO22 should be used.
Fix this by defining proper vmmc and
The SD-card vmmc-supply contained incorrectly two regulators. The second
one is ignored. Fix this by defining proper vmmc and vqmmc supplies.
Additionally these regulators do not have to be always on, so allow
disabling them to reduce energy consumption.
Signed-off-by: Krzysztof Kozlowski
---
C
Odroid X/X2/U3 schematics say that SD card vmmc regulator
(LDO21/TFLASH) operates on 2.8 V. Mainline U-Boot uses that value as
well. 2.8 V is common on Exynos-based boards. Additionally use some
descriptive name for this regulator.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. Non
Am Mittwoch, 27. April 2016, 14:50:48 schrieb Mark Brown:
> On Wed, Apr 27, 2016 at 08:35:46AM +0200, Wadim Egorov wrote:
> > On 26.04.2016 21:33, Heiko Stübner wrote:
> > > with this patch applied, 4.6.0-rc5-next-20160426 fails to boot on
> > > rk3288-veyron devices with the bug below. Reverting t
On 04/27/2016 09:40 AM, David Vrabel wrote:
On 27/04/16 14:38, Boris Ostrovsky wrote:
int xen_nr_legacy_irqs()
{
if (xen_hvm_domain())
return nr_legacy_irqs();
if (xen_initial_domain())
return NR_IRQS_LEGACY;
return 0;
}
Yeah, if that does the right thing...
I
The axp20x and axp22x pmics have ldo regulators which are muxed to the
outside via gpio pins. Unfortunately regulator enable / disable is
implemented in the hardware via selecting a specific pin-mux option.
So if we want to use these pins as gpio pins we must not register
a regulator for these pin
Handle regulator_register returning ENODEV, this may happen when
the dts node for the regulator contains "status = disabled" which
is useful for the ldo_io regulators, to avoid the regulator code
getting in the way of gpio use of these pins.
Signed-off-by: Hans de Goede
---
drivers/regulator/axp
Hi Mark,
And here is a resend of a non bug-fix core patch + a follow-up patch for
the axp20x regulator driver.
See the commit message of the first patch for the why and how of this
patch-set.
Regards,
Hans
On Tue, Mar 22, 2016 at 02:00:58PM +0100, Pavel Machek wrote:
> Why would I want SME on my system? My system seems to work without it.
Your system doesn't have it and SME is default off.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
Add a function to delete and free the contents of the alg_regions list.
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm_adsp.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
On Wed, Apr 27, 2016 at 09:27:39AM -0400, YU Bo wrote:
> Fixed checkpatch.pl's warning 'Comparisons should place the constant on
> the right side of the test'
>
> Signed-off-by: YU Bo
> ---
> drivers/staging/xgifb/vb_setmode.c |4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> d
Hi Mark, et al,
Here are 3 bugfixes for the axp20x regulator driver, sorry for not
sending these to the right email address before.
Regards,
Hans
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