Hi Sebastian,
Many thanks to look at the patch, see my comments below.
On 15/04/16 21:25, Sebastian Reichel wrote:
Hi,
On Fri, Apr 15, 2016 at 09:26:21AM +0200, Enric Balletbo i Serra wrote:
The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous cur
Hi Vineet,
On 18-04-2016 12:49, Vineet Gupta wrote:
> On Monday 18 April 2016 04:00 PM, Jose Abreu wrote:
+ if (readl((void *)FPGA_VER_INFO) <= FPGA_VER_27M) {
Please don't readl directly from addresses. I think I mentioned
that before and didn't get back to you when you replied a
On Mon, Apr 18, 2016 at 02:29:33PM -0400, David Woodhouse wrote:
> On Mon, 2016-04-18 at 19:27 +0300, Michael S. Tsirkin wrote:
> > I balk at adding more hacks to a broken system. My goals are
> > merely to
> > - make things work correctly with an IOMMU and new guests,
> > so people can use users
Hi Nikolaus,
Thanks for the patch. Please refer to my remarks in the code.
On 04/18/2016 08:43 PM, H. Nikolaus Schaller wrote:
This is a driver for the Integrated Silicon Solution Inc. LED driver
chips IS31FL3196 and IS31FL3199. They can drive up to 6 or 9
LEDs.
Each LED is individually contro
On Fri, Apr 15, 2016 at 03:29:11PM -0700, Stephen Boyd wrote:
> On 03/23, Maxime Ripard wrote:
> > The Allwinner SoCs have a gate controller to gate the access to the DRAM
> > clock to the some devices that need to access the DRAM directly (mostly
> > display / image related IPs).
> >
> > Use a si
Hi David,
Thanks for the review.
Nikolaus - please address David's remarks.
Thanks,
Jacek Anaszewski
On 04/19/2016 03:25 AM, David Rivshin (Allworx) wrote:
Hi Nikolaus,
I recently submitted a driver for the IS31FL32xx family of devices, so
this driver caught my eye. I have a few comments belo
On Fri, Apr 15, 2016 at 03:34:41PM -0700, Stephen Boyd wrote:
> On 03/23, Maxime Ripard wrote:
> > The A10 SoCs and relatives have a PLL controller to drive the PLL3 and
> > PLL7, clocked from a 3MHz oscillator, that drives the display related
> > clocks (GPU, display engine, TCON, etc.)
> >
> > A
Hi Xinhui,
On Tue, Apr 19, 2016 at 02:29:34PM +0800, Pan Xinhui wrote:
> From: Pan Xinhui
>
> Implement xchg{u8,u16}{local,relaxed}, and
> cmpxchg{u8,u16}{,local,acquire,relaxed}.
>
> It works on all ppc.
>
Nice work!
AFAICT, your work doesn't depend on anything that ppc-specific, right?
So
Le 19/04/2016 09:46, Wu, Songjun a écrit :
>
>
> On 4/15/2016 00:21, Laurent Pinchart wrote:
>> Hello Songjun,
>>
>> Thank you for the patch.
>>
>> On Wednesday 13 Apr 2016 15:44:19 Songjun Wu wrote:
>>> Add driver for the Image Sensor Controller. It manages
>>> incoming data from a parallel base
Hi Olliver,
Thanks for the patches.
Adding driver authors on cc.
On 04/19/2016 09:40 AM, Olliver Schinagl wrote:
Using the pca963x for a while, I noticed something that may look like some
i2c accessing issues where sometimes data was incorrectly written to the bus,
possibly because we where not
On Fri, Apr 15, 2016 at 10:03:16AM +, Yoshihiro Shimoda wrote:
> Hi,
>
> > From: Yoshihiro Shimoda
> > Sent: Friday, April 15, 2016 6:59 PM
> >
> > Hi,
> >
> > > From: Roger Quadros
> > > Sent: Thursday, April 14, 2016 8:32 PM
> > >
> > > On 14/04/16 14:15, Yoshihiro Shimoda wrote:
> > > > H
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
> In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
> device as to having an broken HPI implementation. After talking some
> with Hans, we now think it is actually the mmc controller that can be
> broken and not support broke
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Monday, April 18, 2016 8:05 PM
> To: Rob Herring
> Cc: linux-arm-ker...@lists.infradead.org; Nava kishore Manne
> ; mark.rutl...@arm.com; devicet...@vger.kernel.org;
> Nava kishore Manne ; Hyun Kwon
> ; pawel.m...@
Commit-ID: 1342e0b7a6c1a060c593037fbac9f4b717f1cb3b
Gitweb: http://git.kernel.org/tip/1342e0b7a6c1a060c593037fbac9f4b717f1cb3b
Author: Adrian Hunter
AuthorDate: Mon, 18 Apr 2016 13:57:48 +0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 18 Apr 2016 11:00:56 -0300
perf intel-pt
On 18/04/16 14:15, Shardar Shariff Md wrote:
> - Define separate function for configuration load register handling
> to make it use by different functions later.
> - Instead of calculating timeout for the config load during init,
> calculate it when config load register is written. Also use the
>
Commit-ID: 206f25a8319b312b9983953a308b0e38e1943c1c
Gitweb: http://git.kernel.org/tip/206f25a8319b312b9983953a308b0e38e1943c1c
Author: Yinghai Lu
AuthorDate: Mon, 18 Apr 2016 09:42:11 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:50 +0200
x86/KASLR: Remove unneeded bo
Commit-ID: 9b238748cb6e9fadab0e761f6d30ba311b4ac470
Gitweb: http://git.kernel.org/tip/9b238748cb6e9fadab0e761f6d30ba311b4ac470
Author: Kees Cook
AuthorDate: Mon, 18 Apr 2016 09:42:10 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:50 +0200
x86/KASLR: Rename aslr.c to ka
Commit-ID: c04028813221c2d39a4f368586795ac4466d311c
Gitweb: http://git.kernel.org/tip/c04028813221c2d39a4f368586795ac4466d311c
Author: Kees Cook
AuthorDate: Mon, 18 Apr 2016 09:42:13 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:51 +0200
x86/boot: Clarify purpose of f
Commit-ID: 6655e0aaf768c39a62eea739c453b9db1e841cfb
Gitweb: http://git.kernel.org/tip/6655e0aaf768c39a62eea739c453b9db1e841cfb
Author: Kees Cook
AuthorDate: Mon, 18 Apr 2016 09:42:12 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:50 +0200
x86/boot: Rename "real_mode" t
Commit-ID: 7de828dfe607013546ece7ce25aa9839e8f93a66
Gitweb: http://git.kernel.org/tip/7de828dfe607013546ece7ce25aa9839e8f93a66
Author: Kees Cook
AuthorDate: Mon, 18 Apr 2016 09:42:14 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:51 +0200
x86/KASLR: Clarify purpose of
Commit-ID: 9016875df408fc5db6a94a3c5f5f5503c916cf81
Gitweb: http://git.kernel.org/tip/9016875df408fc5db6a94a3c5f5f5503c916cf81
Author: Kees Cook
AuthorDate: Mon, 18 Apr 2016 09:42:15 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:30:51 +0200
x86/KASLR: Rename "random" to
Commit-ID: 7a09b225f31031f8cac9e7801b6004e79f8b0da1
Gitweb: http://git.kernel.org/tip/7a09b225f31031f8cac9e7801b6004e79f8b0da1
Author: Konstantin Khlebnikov
AuthorDate: Tue, 19 Apr 2016 11:21:15 +0300
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:37:39 +0200
x86/build/defconfi
On Tue, Apr 19, 2016 at 12:04 AM, Ard Biesheuvel
wrote:
>
> To align with other architectures, the expression produced by expanding
> the macro page_to_virt() should be of type void*, since it returns a
> virtual address. Fix that, and also fix up an instance where page_to_virt
> was expected to r
Commit-ID: 6687659568e2ec5b3ac24b39c5d26ce8b9d90434
Gitweb: http://git.kernel.org/tip/6687659568e2ec5b3ac24b39c5d26ce8b9d90434
Author: Davidlohr Bueso
AuthorDate: Sun, 17 Apr 2016 23:31:41 -0700
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:49:19 +0200
locking/pvqspinlock: Fix
Commit-ID: abfb9498ee1327f534df92a7ecaea81a85913bae
Gitweb: http://git.kernel.org/tip/abfb9498ee1327f534df92a7ecaea81a85913bae
Author: Dmitry Safonov
AuthorDate: Mon, 18 Apr 2016 16:43:43 +0300
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:44:52 +0200
x86/entry: Rename is_{ia3
Commit-ID: f454bfddf6ba557381d8bf5df50eff778602ff23
Gitweb: http://git.kernel.org/tip/f454bfddf6ba557381d8bf5df50eff778602ff23
Author: Alexander Shishkin
AuthorDate: Thu, 14 Apr 2016 14:59:49 +0300
Committer: Ingo Molnar
CommitDate: Tue, 19 Apr 2016 10:55:29 +0200
perf/core, sched: Don
On 19-04-16 11:23, Jacek Anaszewski wrote:
Hi Olliver,
Thanks for the patches.
Adding driver authors on cc.
Ah sorry about that, thanks. I guess get_maintainers doesn't do that.
As for the compile bug, I'll fix that with v2, it only applies on the
intermediate patches, not on the whole set.
On Mon, Apr 18, 2016 at 09:43:36AM -0500, Bjorn Helgaas wrote:
> That might work, but the problem seems to be that we aren't enabling
> IRQs correctly, so I'd rather have a fix that explicitly addresses
> IRQs than one that relies on some non-obvious connection between
> enabling BARs and IRQs.
Ye
Hi Ulf,
On 19-04-16 11:29, Ulf Hansson wrote:
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
device as to having an broken HPI implementation. After talking some
with Hans, we now think it is actually the mmc controlle
This patch adds second I2S connection to rt5650 codec for capture path on
mt8173-rt5650 machine driver.
This patch depends on [1], because snd_soc_of_get_dai_name() fix the property
name "sound-dai". This patch needs to change name to use, so export
snd_soc_get_dai_name() which is included in snd
This patch introduces z3fold, a special purpose allocator for storing
compressed pages. It is designed to store up to three compressed pages per
physical page. It is a ZBUD derivative which allows for higher compression
ratio keeping the simplicity and determinism of its predecessor.
The main dif
Hi
On 04/19/2016 06:42 PM, Olliver Schinagl wrote:
> Hi Ulf,
>
> On 19-04-16 11:29, Ulf Hansson wrote:
>> On 19 April 2016 at 09:12, Olliver Schinagl wrote:
>>> In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
>>> device as to having an broken HPI implementation. After tal
On 2016年04月19日 15:58, Heiko Stübner wrote:
patch subject above:
dt-bindings: add documentation for Rockchip rk3399 display controllers
not everybody skimming over patches directly knows what a vop is;-)
I still believe even such a trivial patch should also get some form of
description, somethin
On 19 April 2016 at 11:42, Olliver Schinagl wrote:
> Hi Ulf,
>
> On 19-04-16 11:29, Ulf Hansson wrote:
>>
>> On 19 April 2016 at 09:12, Olliver Schinagl wrote:
>>>
>>> In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
>>> device as to having an broken HPI implementation. Aft
Hi,
On Fri, Apr 15, 2016 at 03:28:56PM -0700, Stephen Boyd wrote:
> On 03/23, Maxime Ripard wrote:
> > The composite clock didn't have any unregistration function, which forced
> > us to use clk_unregister directly on it.
> >
> > While it was already not great from an API point of view, it also m
On my Lenovo x250 the following situation occurs:
[18697.813871] tpm_crb MSFT0101:00: can't request region for resource
[mem 0xacdff080-0xacdf]
The mapping of the control area overlaps the mapping of the command
buffer. The control area is mapped over page, which is not right. It
should mappe
Use of_device_get_match_data() for getting matched data
instead of implementing this locally.
Signed-off-by: Laxman Dewangan
Reviewed-by: Stephen Warren
---
Collected reviewed by from Stephen.
---
drivers/gpio/gpio-tegra.c | 50 +++
1 file changed, 2
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Write debounce count before enable.
- Make sure the deboun
Remove the file static device handle variable for keeping device handle
of driver as this is just required for error prints. The required device
handle are available from gpiochip structure.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 8
1 file changed, 4 insertions(+
The patch
ASoC: mediatek: Add second I2S on mt8173-rt5650 machine driver
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
Hi Viresh,
On 04/18/2016 03:48 PM, Viresh Kumar wrote:
On 15-04-16, 11:58, Akshay Adiga wrote:
static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
- unsigned long action, void *unused)
+ unsigned long act
From: Shilpasri G Bhat
commit 1b0289848d5d ("cpufreq: powernv: Add sysfs attributes to show
throttle stats") used policy->driver_data as a flag for one-time creation
of throttle sysfs files. Instead of this use 'kernfs_find_and_get()' to
check if the attribute already exists. This is required as
On Wed, Mar 23, 2016 at 05:38:29PM +0100, Maxime Ripard wrote:
> Enable the pll3 and pll7 clocks in the DT that are used to drive the
> display-related clocks.
>
> Signed-off-by: Maxime Ripard
> Acked-by: Chen-Yu Tsai
Applied,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel an
The patch
ASoC: mediatek: Add second I2S on mt8173-rt5650 machine driver
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
On Wed, Mar 23, 2016 at 05:38:32PM +0100, Maxime Ripard wrote:
> It turns out that the A13 / R8 also have a tve encoder block, and a gate
> for it.
>
> Add it to the DT.
>
> Signed-off-by: Maxime Ripard
> Acked-by: Chen-Yu Tsai
Applied,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux
The frequency transition latency from pmin to pmax is observed to be in
few millisecond granurality. And it usually happens to take a performance
penalty during sudden frequency rampup requests.
This patch set solves this problem by using an entity called "global
pstates". The global pstate is a C
On Mon, Apr 18, 2016 at 02:00:06PM -0600, Alex Williamson wrote:
> On Mon, 18 Apr 2016 12:58:28 +0300
> "Michael S. Tsirkin" wrote:
>
> > Modern virtio pci devices can set VIRTIO_F_IOMMU_PLATFORM
> > to signal they are safe to use with an IOMMU.
> >
> > Without this bit, exposing the device to u
The frequency transition latency from pmin to pmax is observed to be in few
millisecond granurality. And it usually happens to take a performance penalty
during sudden frequency rampup requests.
This patch set solves this problem by using a chip-level entity called "global
pstates". Global pstate
On Tue, Apr 19, 2016 at 12:54:18PM +0300, Jarkko Sakkinen wrote:
> On my Lenovo x250 the following situation occurs:
>
> [18697.813871] tpm_crb MSFT0101:00: can't request region for resource
> [mem 0xacdff080-0xacdf]
>
> The mapping of the control area overlaps the mapping of the command
> bu
On Tue, Apr 19, 2016 at 02:58:53PM +0800, Pan Xinhui wrote:
> From: Pan Xinhui
>
> Correct bitoff in big endian OS.
>
> Fixes: 3226aad81aa6 ("sh: support 1 and 2 byte xchg")
> Signed-off-by: Pan Xinhui
I would add: current code works correctly for 1 byte but not for 2 bytes.
Acked-by: Michael
Hi Linus,
On Friday 15 April 2016 07:29 PM, Laxman Dewangan wrote:
On Friday 15 April 2016 07:33 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 1:47 PM, Laxman Dewangan
wrote:
On Friday 15 April 2016 04:45 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan
wrote:
On 4/15/2016 00:21, Laurent Pinchart wrote:
>+ return -EINVAL;
>+
>+ parent_names = kcalloc(num_parents, sizeof(char *), GFP_KERNEL);
>+ if (!parent_names)
>+ return -ENOMEM;
>+
>+ of_clk_parent_fill(np, parent_names, num_parents);
>+
>+ init.parent_names = par
On Wed, Mar 23, 2016 at 05:38:31PM +0100, Maxime Ripard wrote:
> The DRAM gates control whether the image / display devices on the SoC have
> access to the DRAM clock or not.
>
> Enable it.
>
> Signed-off-by: Maxime Ripard
Applied,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kerne
On Tue, Apr 19, 2016 at 10:33:34AM +0800, Fengguang Wu wrote:
> Hi Alexei,
>
> On Sat, Apr 16, 2016 at 05:47:42PM -0700, Alexei Starovoitov wrote:
> > On Sat, Apr 16, 2016 at 10:29:33PM +0200, Arnd Bergmann wrote:
> > > Two new functions in bpf contain a cast from a 'u64' to a
> > > pointer. This
Provide *our* view of what the rules are for the different DAI formats,
so that we do not have to trust external interpretations for this
crucial bit of interoperability.
Signed-off-by: Peter Rosin
---
Documentation/sound/alsa/soc/clocking.txt | 146 +-
1 file changed
On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
> From: Jason Gunthorpe
>
> The final thing preventing this was the way the sysfs files were
> attached to the pdev. Follow the approach developed for ppi and move
> the sysfs files to the chip->dev with symlinks from the pdev
> for c
On Wednesday 13 April 2016 12:23 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 06:59:06PM +0530, Laxman Dewangan wrote:
I have put my understanding based on datasheet and observation but it seems
I am missing some important information which is making difficult
Hi Ludovic,
Thank you for review comments.
On Tue, April 19, 2016 1:04 PM, Ludovic Desroches wrote:
> Hi Prabu,
>
> On Tue, Apr 19, 2016 at 07:18:36AM +, Prabu Thangamuthu wrote:
> > Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> > is to support DWC_MSHC controller
On Wed, 2016-13-04 at 12:53:23 UTC, Michael Ellerman wrote:
> Add the kconfig logic & assembly support for handling live patched
> functions. This depends on DYNAMIC_FTRACE_WITH_REGS, which in turn
> depends on the new -mprofile-kernel ftrace ABI, which is only supported
> currently on ppc64le.
...
On 11/04/16 15:16, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Mon, Apr 11, 2016 at 04:11:01PM +0200, Thierry Reding wrote:
>> On Mon, Apr 11, 2016 at 03:03:00PM +0100, Mark Brown wrote:
>
>>> This shouldn't be a hard dependency: most regulators won't be in bypass
>>> mode or other
On Wed, 2016-13-04 at 12:53:22 UTC, Michael Ellerman wrote:
> In order to support live patching we need to maintain an alternate
> stack of TOC & LR values. We use the base of the stack for this, and
> store the "live patch stack pointer" in struct thread_info.
>
> Unlike the other fields of threa
On Wed, 2016-13-04 at 12:53:19 UTC, Michael Ellerman wrote:
> In order to support live patching on powerpc we would like to call
> ftrace_location_range(), so make it global.
>
> Signed-off-by: Torsten Duwe
> Signed-off-by: Balbir Singh
> Signed-off-by: Michael Ellerman
Applied to powerpc next
On Wed, 2016-13-04 at 12:53:20 UTC, Michael Ellerman wrote:
> When livepatch tries to patch a function it takes the function address
> and asks ftrace to install the livepatch handler at that location.
> ftrace will look for an mcount call site at that exact address.
>
> On powerpc the mcount loca
On Wed, 2016-13-04 at 12:53:21 UTC, Michael Ellerman wrote:
> Add the powerpc specific livepatch definitions. In particular we provide
> a non-default implementation of klp_get_ftrace_location().
>
> This is required because the location of the mcount call is not constant
> when using -mprofile-ke
Add a check for p->state == TASK_RUNNING so that any wake-ups on
task_struct p in the interim lead to 0 being returned by get_wchan().
Signed-off-by: Kautuk Consul
---
arch/powerpc/kernel/process.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/proce
On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote:
> Both of these patches in series has to be applied at the same time.
> I think this is the reason, it fails.
hi Xiaolong, would you help do a check whether we apply the patches in correct
sequence for this case?
> On 17 Apr 2016 0
Hi,
It's probably a bug fix that unveils the link errors.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 12566cc35d0e68308bde7aad615743d560cb097b
commit: c60f169202c7643991a8b4bfeea60e06843d5b5a
arch/mn10300/kernel/fpu-nofpu.c: needs asm/elf.h
date:
On Fri, Apr 15, 2016 at 02:32:47PM -0700, Tadeusz Struk wrote:
> On 04/15/2016 02:32 PM, kbuild test robot wrote:
> > Hi Tadeusz,
> >
> > [auto build test ERROR on cryptodev/master]
> > [also build test ERROR on v4.6-rc3 next-20160415]
> > [if your patch is applied to the wrong git tree, please dr
On 15.04.2016 19:06, Tomasz Nowicki wrote:
Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
thus these passes should use Cavium-specific config access functions
that synthesize the missing EA capabilities.
We already have DT driver which addresses errata requirements and
allow
On Mon, Apr 18, 2016 at 12:24:15PM -0700, Andy Lutomirski wrote:
> On Mon, Apr 18, 2016 at 11:29 AM, David Woodhouse wrote:
> > For x86, you *can* enable virtio-behind-IOMMU if your DMAR tables tell
> > the truth, and even legacy kernels ought to cope with that.
> > FSVO 'ought to' where I suspect
Hi Sergei
On 18/04/16 17:59, Sergei Shtylyov wrote:
> Hello.
>
> On 04/18/2016 05:24 PM, James Hartley wrote:
>
>> Now that there are different revisions of the Pistachio SoC
>> in circulation, add this information to the boot log to make
>> it easier for users to determine which hardware they hav
Currently, the arm64 implementation of __inval_cache_range() [aka
__dma_inv_range()] takes CTR_EL0.Dminline into account for two purposes:
- the stride to use for doing by-VA cache maintenance,
- to check whether the start and end arguments are unaligned with respect
to the cache line size, in wh
On 18/04/16 18:05, Boris Brezillon wrote:
> On Mon, 18 Apr 2016 17:32:49 +0300
> Roger Quadros wrote:
>
>> Boris,
>>
>> On 30/03/16 19:14, Boris Brezillon wrote:
>>> Implementing the mtd_ooblayout_ops interface is the new way of exposing
>>> ECC/OOB layout to MTD users.
>>>
>>> Signed-off-by: Bor
Hi Mark,
On Tue, 2016-04-19 at 17:58 +0800, Mark Brown wrote:
> The patch
>
>ASoC: mediatek: Add second I2S on mt8173-rt5650 machine driver
>
> has been applied to the asoc tree at
>
>git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
>
> All being well this means that it
Hi Michal,
On Thursday 07 April 2016 17:22:35 Michal Hocko wrote:
> On Thu 07-04-16 15:45:02, Frank Mehnert wrote:
> > On Wednesday 06 April 2016 17:33:43 Michal Hocko wrote:
> [...]
>
> > > Do you map your pages to the userspace? If yes then vma with VM_IO or
> > > VM_PFNMAP should keep any atte
Mark,
are these patches still queued or should I repost them?
--Jan
On Mon, Apr 04, 2016 at 01:03:13PM +0200, Jan Glauber wrote:
> Hi Mark,
>
> can you have a look at these patches?
>
> Thanks,
> Jan
>
> 2016-03-09 17:21 GMT+01:00 Jan Glauber :
>
> This patch series provides access to va
On 04/19/2016 06:12 AM, Jarkko Sakkinen wrote:
On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
From: Jason Gunthorpe
The final thing preventing this was the way the sysfs files were
attached to the pdev. Follow the approach developed for ppi and move
the sysfs files to the chip-
On Tue, Apr 19, 2016 at 12:11:28PM +0200, Peter Rosin wrote:
> +I2S
> +
> +LRC should have its flanks synchronized with a negative flank of BCLK.
> +The left channel word starts one BCLK cycle after a negative flank of LRC,
> and
Clock edges are normally referred to as such and have rising and f
On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
> On 15.04.2016 19:06, Tomasz Nowicki wrote:
>>
>> Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
>> thus these passes should use Cavium-specific config access functions
>> that synthesize the missing EA capabilities.
>>
>> We a
Hi Peng,
On Tue, Apr 19, 2016 at 5:33 AM, Peng Fan wrote:
> @@ -46,11 +48,15 @@ static int imx_ocotp_read(void *context, const void *reg,
> size_t reg_size,
> if (count > (priv->nregs - index))
> count = priv->nregs - index;
>
> + clk_prepare_enable(priv->clk);
cl
On 19/04/16 10:43, Laxman Dewangan wrote:
> NVIDIA's Tegra210 support the HW debounce in the GPIO
> controller for all its GPIO pins.
>
> Add support for setting debounce timing by implementing the
> set_debounce callback of gpiochip.
>
> Signed-off-by: Laxman Dewangan
>
> ---
> Changes from V
Hello,
I have a user report of division by zero in e1000e_cyclecounter_read+0xd9/0x100
at modprobe:
[] timecounter_init+0x24/0x40
[] e1000e_config_hwtstamp+0x1c4/0x2e0 [e1000e]
[] e1000e_reset+0x1c5/0x7a0 [e1000e]
[] e1000_probe+0xa2f/0xc7e [e1000e]
[] local_pci_probe+0x17/0x20
[] pci_devic
Hello.
On 4/19/2016 10:12 AM, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
scripts/checkpatch.pl now enforces certain commit citing style, the commit
summary should be specified too.
device as to having an broken HPI implementation. Af
On 04/19/2016 08:10 AM, Lucas De Marchi wrote:
> On Mon, Apr 18, 2016 at 4:51 PM, Jonathan Cameron wrote:
>> On 18/04/16 11:25, Crestez Dan Leonard wrote:
>>> On 04/18/2016 09:07 AM, Denis Ciocca wrote:
>>> Then st_combo_* implementation functions would forward to st_magn_* or
>>> st_accel_* depen
On Tue, Apr 19, 2016 at 06:33:04PM +0800, PC Liao wrote:
> Thanks for your approval.
> But this patch depends on [1].
> I think it also needs to apply [1], otherwise this patch will build
> fail.
> Or, do I need to upload new version again?
> [1] https://patchwork.kernel.org/patch/5671961/ ("ASoC
On Tue, Apr 19, 2016 at 03:31:11PM +0530, Laxman Dewangan wrote:
> On Wednesday 13 April 2016 12:23 PM, Mark Brown wrote:
> >Possibly. It did also occur to me last night that having a Maxim
> >specific property which lets you specify a raw register value to
> >configure in cases where the board g
On Tuesday 19 April 2016 11:27:07 Konstantin Khlebnikov wrote:
> This option replaced by PAGE_COUNTER which is selected by MEMCG.
>
> Signed-off-by: Konstantin Khlebnikov
>
Acked-by: Arnd Bergmann
On 04/19/2016 04:18 PM, Prabu Thangamuthu wrote:
> Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> is to support DWC_MSHC controller on PCI interface.
There is dwmmc controller for Synopsys DWC_MSHC.
According to commit message, dwmmc controller also is compliant with SD h
On Tue, Apr 19, 2016 at 11:16:59AM +0100, Jon Hunter wrote:
>
> On 11/04/16 15:16, Mark Brown wrote:
> > * PGP Signed by an unknown key
> >
> > On Mon, Apr 11, 2016 at 04:11:01PM +0200, Thierry Reding wrote:
> >> On Mon, Apr 11, 2016 at 03:03:00PM +0100, Mark Brown wrote:
> >
> >>> This shouldn'
Hi Maarten,
On 18/04/16 17:04, Maarten ter Huurne wrote:
Signed-off-by: Maarten ter Huurne
---
drivers/mtd/nand/jz4740_nand.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index 673ceb2..2f39ee1 100644
--- a/drivers/mtd/nan
On Tuesday 19 April 2016 04:25 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Tue, Apr 19, 2016 at 03:31:11PM +0530, Laxman Dewangan wrote:
On Wednesday 13 April 2016 12:23 PM, Mark Brown wrote:
Possibly. It did also occur to me last night that having a Maxim
specific property which
This patch updates the driver to support 64-bit DMA
addressing.
Signed-off-by: Nava kishore Manne
---
Changes for v2:
-Added dma-ranges property in device tree as suggested by Arnd
Bergmann.
-Modified the driver code based on the xlnx,addrwidth.
.../devicetree/bi
On Tue, Apr 19, 2016 at 11:41:29AM +0100, G Gregory wrote:
> On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
> > On 15.04.2016 19:06, Tomasz Nowicki wrote:
> >>
> >> Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
> >> thus these passes should use Cavium-specific config access
/proc/sys/vm/memory_failure_early_kill
1: means kill all processes that have the corrupted and not reloadable page
mapped.
0: means only unmap the corrupted page from all processes and only kill a
process
who tries to access it.
If set memory_failure_early_kill to 0, and memory_failure() has be
On 2016/4/18 19:30, David Laight wrote:
From: Yongji Xie
Sent: 18 April 2016 11:59
We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP
which indicates all devices on the bus are protected by the
hardware which supports IRQ remapping(intel naming).
This flag will be used to know whether it
* tip-bot for Dmitry Safonov wrote:
> Commit-ID: abfb9498ee1327f534df92a7ecaea81a85913bae
> Gitweb: http://git.kernel.org/tip/abfb9498ee1327f534df92a7ecaea81a85913bae
> Author: Dmitry Safonov
> AuthorDate: Mon, 18 Apr 2016 16:43:43 +0300
> Committer: Ingo Molnar
> CommitDate: Tue, 19
On Mon, Apr 18, 2016 at 01:32:22PM -0600, Al Stone wrote:
> The ACPI 6.1 specification was recently released at the end of January
> 2016, but the arm64 kernel documentation for the use of ACPI was written
> for the 5.1 version of the spec. There were significant additions to the
> spec that had n
Hi Ollivier
Sorry to not reply to the patches, but I am not subscribed to linux-leds
Regarding:
[PATCH 2/6] leds: pca963x: Lock i2c r/w access
I am not sure why this patch is needed. the only thing that should be
protected is the write to ledout.
It seems that mode2 needs to be set to PCA963X_M
Hi Roger,
On Tue, 19 Apr 2016 13:28:50 +0300
Roger Quadros wrote:
> > @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device
> > *pdev)
> > nand_chip->ecc.correct = omap_correct_data;
> > mtd_set_ooblayout(mtd, &omap_ooblayout_ops);
> >
Hi,
On 19-04-16 11:42, Olliver Schinagl wrote:
Hi Ulf,
On 19-04-16 11:29, Ulf Hansson wrote:
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
device as to having an broken HPI implementation. After talking some
with Ha
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