Creating a QCOM directory for all QCOM DMA source files.
Signed-off-by: Sinan Kaya
Reviewed-by: Andy Gtoss
---
drivers/dma/Kconfig| 11 ++-
drivers/dma/Makefile | 2 +-
drivers/dma/qcom/Kconfig | 8
d
On Thu, Dec 17, 2015 at 08:48:09AM -0800, Dan Williams wrote:
> On Thu, Dec 17, 2015 at 7:51 AM, Dan Williams
> wrote:
> How about just checking for EPROBE_DEFER, every other non-zero value is
> success.
How about using IS_ERR_VALUE()? If it's good enough for IS_ERR(),
it's good enough for thi
The Qualcomm Technologies HIDMA device has been designed to support
virtualization technology. The driver has been divided into two to follow
the hardware design.
1. HIDMA Management driver
2. HIDMA Channel driver
Each HIDMA HW consists of multiple channels. These channels share some set
of commo
In order to create a relationship model between the channels and the
management object, we are adding support for object hierarchy to the
drivers. This patch simplifies the userspace application development.
We will not have to traverse different firmware paths based on device
tree or ACPI baed ker
This is a dummy cosmetic patch.
Signed-off-by: Cyrille Pitchen
---
drivers/crypto/atmel-aes.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index 9ef38eca4ae7..176ab3878583 100644
--- a/drivers/crypto/atmel-aes.c
+
This patch only creates sections to regroup functions by usage.
This will help to integrate the GCM support patch later by making the
difference between shared/common and specific code. Hence current
sections are:
- Shared functions: common code which will be reused by the GCM support.
- CPU trans
Dummy patch to fix typo and indentation.
Signed-off-by: Cyrille Pitchen
---
drivers/crypto/atmel-aes.c | 56 +-
1 file changed, 25 insertions(+), 31 deletions(-)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index 176ab3878583..
This patch totally reworks data transfer.
1 - DMA
The new code now fully supports scatter-gather lists hence reducing the
number of interrupts in some cases. Also buffer alignments are better
managed to avoid useless copies.
2 - CPU
The new code allows to use PIO accesses even when transferring
Increase the DMA threshold to 256: PIO accesses offer better performances
than the DMA when processing small amounts of data.
Signed-off-by: Cyrille Pitchen
---
drivers/crypto/atmel-aes.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/cry
On Wed, Dec 16, 2015 at 11:59 PM, Hannes Reinecke wrote:
> PCI-2.2 VPD entries have a maximum size of 32k, but might actually
> be smaller than that. To figure out the actual size one has to read
> the VPD area until the 'end marker' is reached.
> Trying to read VPD data beyond that marker results
Depending on its hardware version, the AES IP provides either a 16 or a
32 bit counter. However the CTR mode expects the size of the counter to be
the same as the size of the cipher block, ie 128 bits for AES.
This patch detects and handles counter overflows.
Signed-off-by: Cyrille Pitchen
---
d
crypto_rfc3686_alloc() in crypto/ctr.c expects to be used with a stream
cipher (alg->cra_blocksize == 1).
Signed-off-by: Cyrille Pitchen
---
drivers/crypto/atmel-aes.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
inde
This patch adds support to the GCM mode.
Signed-off-by: Cyrille Pitchen
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/atmel-aes-regs.h | 10 +
drivers/crypto/atmel-aes.c | 453 +++-
3 files changed, 462 insertions(+), 2 deletions(-)
diff -
This feature should not be enabled in release but can be usefull for
developers who need to monitor register accesses at some specific places.
Set the AES_FLAGS_DUMP_REG flag inside dd->flags to start monitoring the
I/O accesses, clear it to stop monitoring.
Signed-off-by: Cyrille Pitchen
---
dr
On Thu, Dec 17 2015 at 10:50am -0500,
Tejun Heo wrote:
> Hello, Nikolay.
>
> On Thu, Dec 17, 2015 at 05:43:12PM +0200, Nikolay Borisov wrote:
> > Right, but my initial understanding was that when canceling the delayed
> > work and then issuing flush_workqueue would act the same way as if
> > can
Hi Keith,
On Mon, Dec 07, 2015 at 02:32:29PM -0700, Keith Busch wrote:
> PCI-e segments will continue to use the lower 16 bits as required by
> ACPI. Special domains may use the full 32-bits.
>
> Signed-off-by: Keith Busch
> ---
> lib/filter.c |2 +-
> lib/pci.h|2 +-
> 2 files chan
On Thu, Dec 17, 2015 at 05:48:42PM +0100, Sebastian Frias wrote:
> On 12/17/2015 05:29 PM, Peter Hurley wrote:
> >On 12/17/2015 07:15 AM, Sebastian Frias wrote:
> >>---
> >>
> >>I think there are a few minor bugs on the 8250 UART code.
> >>
> >>Below you can find a patch with a proposed solution.
>
With kernel 4.3.x (tested x=2,3) the screen goes blank as soon as the
system boots (both for VGA console and graphics). The only way to get
it to turn on is to suspend and resume the system.
The system is a Dell XPS 13 (latest rev) running OpenSuse Leap 42.1 and
this is the lspci output:
00:00.0
Hi Keith,
On Mon, Dec 07, 2015 at 02:32:24PM -0700, Keith Busch wrote:
> Does not allocate a child bus if the new bus number does not fit in the
> parent's bus resource window.
>
> Signed-off-by: Keith Busch
> ---
> drivers/pci/probe.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --g
On Dec 17 2015 or thereabouts, Nish Aravamudan wrote:
> Hi Benjamin,
>
> On Thu, Dec 17, 2015 at 1:53 AM, Benjamin Tissoires
> wrote:
> > On Dec 16 2015 or thereabouts, Nish Aravamudan wrote:
> >> Hi Jiri,
> >>
> >> On Wed, Dec 16, 2015 at 5:18 AM, Jiri Kosina wrote:
> >> > On Wed, 16 Dec 2015,
On Wed, Dec 16, 2015 at 11:25:21AM -0500, Rik van Riel wrote:
> On 12/15/2015 07:52 PM, Ani Sinha wrote:
> > Rik, should I send a separate email with the patch or you are OK
> > with what I sent in the email? Are you queueing up my patch for
> > applying upstream?
>
> I don't have a git tree for p
On Thu, Dec 17, 2015 at 12:41 AM, Crt Mori wrote:
> On 17 December 2015 at 06:27, Nish Aravamudan
> wrote:
>> On Wed, Dec 16, 2015 at 3:05 PM, Nish Aravamudan
>> wrote:
>>> On Wed, Dec 16, 2015 at 2:55 PM, Crt Mori wrote:
On Dec 16, 2015 11:37 PM, "Nish Aravamudan"
wrote:
>
Add ADI (Application Data Integrity) capability to cpu capabilities list.
ADI capability allows virtual addresses to be encoded with a tag in
bits 63-60. This tag serves as an access control key for the regions
of virtual address with ADI enabled and a key set on them. Hypervisor
encodes this capab
On Thu, Dec 17, 2015 at 9:28 AM, Benjamin Tissoires
wrote:
> On Dec 17 2015 or thereabouts, Nish Aravamudan wrote:
>> Hi Benjamin,
>>
>> On Thu, Dec 17, 2015 at 1:53 AM, Benjamin Tissoires
>> wrote:
>> > On Dec 16 2015 or thereabouts, Nish Aravamudan wrote:
>> >> Hi Jiri,
>> >>
>> >> On Wed, Dec
On Thu, Dec 17, 2015 at 11:15:45AM -0600, Bjorn Helgaas wrote:
> > @@ -45,7 +45,7 @@ pci_filter_parse_slot_v33(struct pci_filter *f, char *str)
> > if (str[0] && strcmp(str, "*"))
> > {
> > long int x = strtol(str, &e, 16);
> > - if ((e && *e) || (x < 0 || x > 0x
Em Wed, Dec 16, 2015 at 09:47:53PM -0300, Arnaldo Carvalho de Melo escreveu:
> Hi Ingo,
>
> Please consider pulling, this is on top of the perf-core-for-mingo
> tag, that is not yet merged.
Ingo, this wasn't building on older distros such as RHEL6.7 due to a
typedef problem, a one-liner, so
On Mon, Dec 07, 2015 at 02:32:24PM -0700, Keith Busch wrote:
> Does not allocate a child bus if the new bus number does not fit in the
> parent's bus resource window.
>
> Signed-off-by: Keith Busch
Other nits: please make this similar to previous changelogs in
capitalization, sentence structure,
PCI/AER: Increase domain type from 16 to 32 bits
On Mon, Dec 07, 2015 at 02:32:28PM -0700, Keith Busch wrote:
> New pci device provides additional pci domains that start above what 16
> bits can address.
>
> Signed-off-by: Keith Busch
> ---
> drivers/pci/pcie/aer/aer_inject.c | 16 -
* Peter Ujfalusi [151217 05:33]:
> Hi,
>
> Changes since v1:
> - Updated to use the non 16bit arrays [1]
> - send the two patch as a series
>
> [1]
> As it has been discussed earlier:
> https://www.mail-archive.com/linux-omap@vger.kernel.org/msg122117.html
>
> the DT bindings has been changes c
Hi Sebastian,
On 12/17/2015 08:48 AM, Sebastian Frias wrote:
> On 12/17/2015 05:29 PM, Peter Hurley wrote:
>> On 12/17/2015 07:15 AM, Sebastian Frias wrote:
>>> ---
>>>
>>> I think there are a few minor bugs on the 8250 UART code.
>>>
>>> Below you can find a patch with a proposed solution.
>>>
>>
This series includes:
- Introduction of transaction hooks for CCI PMU to batch the CCI
counter programming (Patches 1-5)
- Work around for writing to CCI-500/550(introduced later) PMU
counters (Patches 6-10)
- Support for CCI-550 PMU (11-12) with Acked-bys.
Since all of these are related
Add ARM CoreLink CCI-550 cache coherent interconnect PMU
driver support. The CCI-550 PMU shares all the attributes of CCI-500
PMU, except for an additional master interface (MI-6 - 0xe).
CCI-550 requires the same work around as for CCI-500 to
write to the PMU counter.
Acked-by: Punit Agrawal
Ack
CCI-550 PMU shares most of the CCI-500 PMU attributes including the
event format, PMU event codes. The only difference is an additional
master interface (MI6 - 0xe). Hence we share the driver code for both,
except for a model specific event validate method.
This patch renames the common CCI500 symb
Add a hook for writing to CCI PMU counters. This callback
can be used for CCI models which requires some extra work
to program the PMU counter values. To accommodate group writes
and single counter writes, the call back accepts a bitmask
of the counter indices which need to be programmed with the
g
The CCI PMU driver sets the event counter to the half of the maximum
value(2^31) it can count before we start the counters via
pmu_event_set_period(). This is done to give us the best chance to
handle the overflow interrupt, taking care of extreme interrupt latencies.
However, CCI-500 comes with a
On Thu, Dec 17, 2015 at 8:51 AM, Dan Williams wrote:
> The commit below causes the libnvdimm sub-system to stop loading.
> This is due to the fact that nvdimm_bus_match() returns the result of
> test_bit() which may be negative. If there are any other bus match
> functions using test_bit they may
Add helper routines to get the counter status and the event
programmed on it.
Cc: Punit Agrawal
Acked-by: Mark Rutland
Signed-off-by: Suzuki K. Poulose
---
drivers/bus/arm-cci.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
in
This patch refactors the CCI PMU driver code a little bit to
make it easier share the code for enabling/disabling the CCI
PMU. This will be used by the hooks to work around the special cases
where writing to a counter is not always that easy(e.g, CCI-500)
No functional changes.
Cc: Punit Agrawal
Adds helper routines to disable the counter controls for
all the counters on the CCI PMU and restore it back, by
preserving the original state in caller provided mask.
Cc: Punit Agrawal
Cc: Mark Rutland
Signed-off-by: Suzuki K. Poulose
---
drivers/bus/arm-cci.c | 39 +
The cci PMU always reprograms the counter value in pmu->start()
irrespective of the mode it is called from, making sure that
the hwc->state is PERF_HES_UPTODATE.
When pmu->add() is called with PERF_EF_START, we invoke
pmu->start() with PERF_EF_RELOAD removing the PERF_EF_START.
This makes it impos
This patch adds the transaction hooks for CCI PMU, which can be
later exploited to amortise the cost of writing the counters for
CCI-500 PMU.
We keep track of only the 'ADD' transactions. While we are in a
transaction, we keep track of the indices allocated for the events
and delay the following o
Add a helper to group the writes to PMU counter, this will be
used by the transaction hooks.
Cc: Mark Rutland
Cc: Punit Agrawal
Signed-off-by: Suzuki K. Poulose
---
drivers/bus/arm-cci.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/
Instead of hard coding the period we program on the PMU
counters, define a symbol.
Cc: Mark Rutland
Cc: Punit Agrawal
Signed-off-by: Suzuki K. Poulose
---
drivers/bus/arm-cci.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/bus/arm-cci.c b/dr
On Tue, Dec 8, 2015 at 2:47 AM, Sudip Mukherjee
wrote:
> We are having build failure with linux-next for sparc allmodconfig with
> the error messages:
>
> drivers/built-in.o: In function `meson6_timer_init':
> meson6_timer.c:(.init.text+0x5fe8): undefined reference to
> `of_io_request_and_map'
>
On Thu, Dec 17, 2015 at 11:27:18AM -0600, Bjorn Helgaas wrote:
> On Mon, Dec 07, 2015 at 02:32:24PM -0700, Keith Busch wrote:
> > + if (busnr > parent->busn_res.end) {
> > + dev_printk(KERN_DEBUG, &parent->dev,
> > + "can not alloc bus:%d under %pR\n", busnr,
> > +
* Sudeep Holla [151215 08:33]:
>
>
> On 21/10/15 11:10, Sudeep Holla wrote:
> >Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
> >check for/support the legacy "gpio-key,wakeup" boolean property to
> >enable gpio buttons as wakeup source, "wakeup-source" is the new
> >stan
On Thu, Dec 17, 2015 at 11:22:01AM +, Mark Brown wrote:
> On Thu, Dec 17, 2015 at 01:01:29PM +1100, Stephen Rothwell wrote:
>
> > between commit:
>
> > f6251e80956d ("soc: qcom: documentation: Update SMD/RPM Docs")
> > 9ee8373a1552 ("soc: qcom: smd-rpm: Add existing platform support")
>
* Sudeep Holla [151215 08:37]:
>
>
> On 21/10/15 11:10, Sudeep Holla wrote:
> >Though the keyboard and other driver will continue to support the legacy
> >"gpio-key,wakeup", "linux,wakeup" boolean property to enable the wakeup
> >source, "wakeup-source" is the new standard binding.
> >
> >This p
Julian Margetson writes:
> I have been running my machine mostly configured for pciex1 thus with
> the sata_dwc disabled.
> The changes to sata_dwc-460ex do cause an oops.
> I will try to give more detailed info over this weekend .
The driver as is upstream would do that since it unconditionall
Refactor pmu_write_counter to add __pmu_write_counter() which
will actually write to the counter once the event is validated.
This can be used by hooks specific to CCI PMU model to program
the counter, where the event is already validated.
Cc: Mark Rutland
Cc: Punit Agrawal
Signed-off-by: Suzuki
On Thu, Dec 17, 2015 at 11:58:22AM -0600, Andy Gross wrote:
> On Thu, Dec 17, 2015 at 11:22:01AM +, Mark Brown wrote:
> > > I fixed it up (I used the qcom tree version - please sort out the
> > > mess).
> > Andy, what's going on here?
> I hadn't reformulated my next branch before Stephen pul
On 12/16/2015 3:48 AM, Ulf Hansson wrote:
>
> [...]
>
> > +static int pic32_sdhci_probe(struct platform_device *pdev) {
> > + struct device *dev = &pdev->dev;
> > + struct sdhci_host *host;
> > + struct resource *iomem;
> > + struct pic32_sdhci_pdata *sdhci_pdata;
> > +
Commit 01fb4d3c39d3 ("PM / OPP: Parse 'opp--'
bindings") broke support for parsing standard opp-microvolt and
opp-microamp properties. Fix it by setting 'name' string to
proper value for !prop cases.
Cc: Viresh Kumar
Cc: Lee Jones
Cc: Rafael J. Wysocki
Fixes: 01fb4d3c39d3 ("PM / OPP: Parse 'op
On 12/17/2015 05:02 PM, Måns Rullgård wrote:
Sebastian Frias writes:
---
resending as plain-text
---
drivers/tty/serial/8250/8250_core.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_core.c
b/drivers/tty/serial/8250/8
On 12/17/2015 12:53 PM, Andy Shevchenko wrote:
On Thu, 2015-12-17 at 16:04 +, Måns Rullgård wrote:
Andy Shevchenko writes:
On Thu, 2015-12-17 at 15:13 +, Måns Rullgård wrote:
Andy Shevchenko writes:
On Tue, 2015-12-15 at 23:34 +, Måns Rullgård wrote:
Mans Rullgard writes:
Sebastian Frias writes:
>>>old_lcr = serial_in(p, UART_LCR);
>>> -serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
>>> -
>>> -old_dll = serial_in(p, UART_DLL);
>>> -old_dlm = serial_in(p, UART_DLM);
>>>
>>> -serial_out(p, UART_DLL, 0);
>>> -serial_out(p, UART_DLM, 0);
>>
On Thu, Dec 17, 2015 at 9:32 AM, Nish Aravamudan
wrote:
> On Thu, Dec 17, 2015 at 12:41 AM, Crt Mori wrote:
>> On 17 December 2015 at 06:27, Nish Aravamudan
>> wrote:
>>> On Wed, Dec 16, 2015 at 3:05 PM, Nish Aravamudan
>>> wrote:
On Wed, Dec 16, 2015 at 2:55 PM, Crt Mori wrote:
>
>>
Add slave transfer capability to BCM2835 dmaengine driver.
This patch is pulled from the bcm2708-dmaengine driver in the
Raspberry Pi repo. The work was done originally by Gellert Weisz.
Tested using the spi-bcm2835 driver that has dma support since:
commit 3ecd37edaa2a6ba3
("spi: bcm2835: enabl
On Mon, Dec 07, 2015 at 02:32:27PM -0700, Keith Busch wrote:
> The Intel Volume Management Device (VMD) is an integrated endpoint on the
> platform's PCIe root complex that acts as a host bridge to a secondary
> PCIe domain. BIOS can reassign one or more root ports to appear within
> a VMD domain i
On Thu, Dec 17, 2015 at 11:46:15AM -0600, Bjorn Helgaas wrote:
> On Mon, Dec 07, 2015 at 02:32:28PM -0700, Keith Busch wrote:
> > - u16 domain;
> > + int domain;
>
> If you want 32 bits explicitly, why don't you use u32 here?
It matches the types already defined in struct pci_dev and the
pci_
Hi Peter,
On 12/17/2015 06:48 PM, Peter Hurley wrote:
Hi Sebastian,
On 12/17/2015 08:48 AM, Sebastian Frias wrote:
On 12/17/2015 05:29 PM, Peter Hurley wrote:
On 12/17/2015 07:15 AM, Sebastian Frias wrote:
---
I think there are a few minor bugs on the 8250 UART code.
Below you can find a p
Instead of clearing the global interrupts flag when any device
does not have an interrupt just pass -1 through tpm_info.irq.
The only thing that asks for autoprobing is the force=1 path.
Signed-off-by: Jason Gunthorpe
Tested-by: Wilck, Martin
Tested-by: Jarkko Sakkinen
---
drivers/char/tpm/tp
If the ACPI tables do not declare a memory resource for the TPM2
then do not just fall back to the x86 default base address.
Also be stricter when checking the ancillary TPM2 ACPI data and error
out if any of this data is wrong rather than blindly assuming TPM1.
Fixes: 399235dc6e95 ("tpm, tpm_tis
This does a request_resource under the covers which means tis holds a
lock on the memory range it is using so other drivers cannot grab it.
When doing probing it is important to ensure that other drivers are
not using the same range before tis starts touching it.
To do this flow the actual struct
To support the force mode in tpm_tis we need to use resource locking
in tpm_crb as well, via devm_ioremap_resource.
The light restructuring better aligns crb and tis and makes it easier
to see the that new changes make sense.
Signed-off-by: Jason Gunthorpe
Tested-by: Jarkko Sakkinen
---
driver
ioread32 and readl are defined to read from PCI style memory, ie little
endian and return the result in host order. On platforms where a
swap is required ioread32/readl do the swap internally (eg see ppc).
Signed-off-by: Jason Gunthorpe
Tested-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm_crb.c
Drive the force=1 flow through the driver core. There are two main reasons to
do this:
1) To enable tpm_tis for OF environments requires a platform_device anyhow, so
the force_device needs to be re-used for them.
2) Recent changes in the core code break the assumption that a driver will be
On Thu, Dec 17, 2015 at 12:14:48PM -0600, Bjorn Helgaas wrote:
> On Mon, Dec 07, 2015 at 02:32:27PM -0700, Keith Busch wrote:
> > +/*
> > + * VMD h/w converts posted config writes to non-posted. The read-back in
> > this
> > + * function forces the completion so it returns only after the config
>
On Thu, Dec 17, 2015 at 05:34:46PM +, Keith Busch wrote:
> On Thu, Dec 17, 2015 at 11:15:45AM -0600, Bjorn Helgaas wrote:
> > > @@ -45,7 +45,7 @@ pci_filter_parse_slot_v33(struct pci_filter *f, char
> > > *str)
> > > if (str[0] && strcmp(str, "*"))
> > > {
> > > long int x =
The TPM core has long assumed that every device has a driver attached,
however the force path was attaching the TPM core outside of a driver
context. This isn't generally reliable as the user could detatch the
driver using sysfs or something, but commit b8b2c7d845d5 ("base/platform:
assert that dev
include/acpi/actbl2.h is the proper place for these definitions
and the needed TPM2 ones have been there since
commit 413d4a6defe0 ("ACPICA: Update TPM2 ACPI table")
This also drops a couple of le32_to_cpu's for members of this table,
the existing swapping was not done consistently, and the defini
On Wed, Dec 16, 2015 at 12:42:38AM +0300, Yury Norov wrote:
> +/* Using non-compat syscalls where necessary */
> +#define compat_sys_fadvise64_64sys_fadvise64_64
> +#define compat_sys_fallocate sys_fallocate
> +#define compat_sys_ftruncate64 sys_ftruncate
I initially thou
Dear all,
since 4.4-rc (at least rc2 it was the first I tested), the Intel DRI
is in very broken state.
Hardware: Sony VAIO Pro
00:02.0 VGA compatible controller: Intel Corporation Haswell-ULT Integrated
Graphics Controller (rev 09) (prog-if 00 [VGA controller])
Subsystem: Sony Corporat
* Peter Ujfalusi [151211 04:51]:
> Hi,
>
> The ASoC omap-pcm has been converted to be non platform device a long time
> ago,
> so it is no longer needed to create the device for it since there will be no
> driver to be loaded for it.
OK, applying into omap-for-v4.5/soc-v2 thanks.
Tony
--
To un
On 02/12/15 20:42, Nick Dyer wrote:
> This is a series of patches to add diagnostic data support to the Atmel
> maXTouch driver. There's an existing implementation in the open-source mxt-app
> tool, however there are performance advantages to moving this code into the
> driver.
> The algorithm for
On 17 December 2015 at 19:10, Nish Aravamudan wrote:
> On Thu, Dec 17, 2015 at 9:32 AM, Nish Aravamudan
> wrote:
>> On Thu, Dec 17, 2015 at 12:41 AM, Crt Mori wrote:
>>> On 17 December 2015 at 06:27, Nish Aravamudan
>>> wrote:
On Wed, Dec 16, 2015 at 3:05 PM, Nish Aravamudan
wrote:
On Thu, Dec 17, 2015 at 05:49:12PM +, Suzuki K. Poulose wrote:
> This patch adds the transaction hooks for CCI PMU, which can be
> later exploited to amortise the cost of writing the counters for
> CCI-500 PMU.
>
> We keep track of only the 'ADD' transactions. While we are in a
> transaction,
>>> As Tony requested, we may need a knob to stop a fallback in
>>> "movable->normal", later.
>>>
>>
>> If the mirrored memory is small and the other is large,
>> I think we can both enable "non-mirrored -> normal" and "normal ->
>> non-mirrored".
>
> Size of mirrored memory can be configured by
* Rob Herring [151211 07:10]:
> On Fri, Dec 11, 2015 at 09:39:59AM +0530, Vignesh R wrote:
> > Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
> > update the binding documents for the controller to document this change.
> >
> > Signed-off-by: Vignesh R
>
> Acked-by: Rob Herri
On Thu, Dec 17, 2015 at 07:51:14AM -0800, Dan Williams wrote:
> The commit below causes the libnvdimm sub-system to stop loading.
> This is due to the fact that nvdimm_bus_match() returns the result of
> test_bit() which may be negative. If there are any other bus match
> functions using test_bit
Julian Margetson writes:
> On 12/17/2015 1:59 PM, Måns Rullgård wrote:
>> Julian Margetson writes:
>>
>>> I have been running my machine mostly configured for pciex1 thus with
>>> the sata_dwc disabled.
>>> The changes to sata_dwc-460ex do cause an oops.
>>> I will try to give more detailed inf
Em Thu, Nov 05, 2015 at 03:41:01PM +0100, Jiri Olsa escreveu:
> So we have csv_sep properly initialized before
> report command leg.
I moved this to before "perf stat report: Process stat and stat round
events" so that what you wrote above makes sense, i.e. after this patch
nothing is produced by
On 12/17/15, Jeff Merkey wrote:
> On 12/16/15, Jeff Merkey wrote:
>> On 12/16/15, Andy Lutomirski wrote:
>>> On Wed, Dec 16, 2015 at 4:31 PM, Jeff Merkey
>>> wrote:
On 12/16/15, Andy Lutomirski wrote:
> On Dec 16, 2015 3:12 PM, "Jeff Merkey" wrote:
>>
>> Setting a hardware br
On Sat, Dec 12, 2015 at 09:12:41PM +0100, Jann Horn wrote:
> ptrace_has_cap() checks whether the current process should be
> treated as having a certain capability for ptrace checks
> against another process. Until now, this was equivalent to
> has_ns_capability(current, target_ns, CAP_SYS_PTRACE).
Ulf Hansson writes:
> On 15 December 2015 at 22:40, Eric Anholt wrote:
>> Since the pm_genpd_exit() patch is still going through review, and
>> other drivers in the tree just ignore the error cases, Ulf offered to
>> merge the series as a builtin driver not depending on that interface.
>> We sti
On Thu, Dec 17, 2015 at 8:05 AM, Peter Zijlstra wrote:
>
> Please consider this patch for 4.4.
No problem, but just wanted to check that there's nothing else pending
in any locking tree?
Linus
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On 12/17/2015 06:21 PM, Greg Kroah-Hartman wrote:
On Thu, Dec 17, 2015 at 05:48:42PM +0100, Sebastian Frias wrote:
On 12/17/2015 05:29 PM, Peter Hurley wrote:
On 12/17/2015 07:15 AM, Sebastian Frias wrote:
---
I think there are a few minor bugs on the 8250 UART code.
Below you can find a pat
On 17/12/15 15:53, Moritz König wrote:
This patch fixes the format of comments in plx9080.h.
Signed-off-by: Moritz König
Signed-off-by: Fabian Lang
---
Changes since v1:
* moving comments that would wrap over 80 columns onto the previous line
* using the usual block comment style
drive
The Makefile currently controlling compilation of this code is obj-y
meaning that it currently is not being built as a module by anyone.
Lets remove the traces of modularity that we can so that when reading
the code there is no doubt it is builtin-only.
Since module_init translates to device_init
"Rafael J. Wysocki" writes:
> On Wednesday, December 16, 2015 04:41:37 PM Eric Anholt wrote:
>>
>> --=-=-=
>> Content-Type: text/plain
>>
>> Sudip Mukherjee writes:
>>
>> > If CONFIG_PM_SLEEP is not defined then the functions are defined as
>> > NULL. And as a result we are getting build fail
The Kconfig currently controlling compilation of this code is:
config FILE_LOCKING
bool "Enable POSIX file locking API" if EXPERT
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no do
The Makefile currently controlling compilation of this code has:
ifeq ($(CONFIG_BLOCK),y)
obj-y +=buffer.o block_dev.o direct-io.o mpage.o
and in addition to that the Kconfig is:
block/Kconfig:menuconfig BLOCK
block/Kconfig: bool "Enable the block layer" if EXPERT
...meaning that
The Kconfig currently controlling compilation of this code is:
config UNIX98_PTYS
bool "Unix98 PTY support" if EXPERT
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is bui
The Kconfig currently controlling compilation of this code is:
config HUGETLBFS
bool "HugeTLB file system support"
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no
Instead of changing the monitoring setup every time after
handling each trip, this patch simplifies the monitoring
setup by moving the setup call to a place where all
trips have been treated already.
Cc: Zhang Rui
Cc: linux...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Pandruva
#x27;:
module.c:(.text+0xf6c37): undefined reference to `ibmasm_register_uart'
Signed-off-by: Randy Dunlap
Cc: Max Asbock
Cc: Vernon Mauery
---
drivers/misc/Kconfig |1 +
1 file changed, 1 insertion(+)
--- linux-next-20151217.orig/drivers/misc/Kconfig
+++ linux-next-20151217/drivers/m
The idea is to add the choice to be notified only when temperature
crosses trip points. The trip points affected are the non-passive
trip points.
It will check last temperature and current temperature against
the trip point temperature and its hysteresis.
In case the check shows temperature has ch
Hello Rui, linux-pm
Changelog:
V1 -> V2: Fixes patch 2, and added Srivinas reviewed by on patch 1.
Please consider these three patches in the thermal core to improve
the interaction with userspace.
The first is already in its second version. It avoids reconfiguring
monitor period. Now the therma
The Kconfig currently controlling compilation of this code is:
config DNOTIFY
bool "Dnotify support"
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
code there is no doubt it is builtin-only.
Sin
The Kconfig currently controlling compilation of this code is:
config BINFMT_ELF
bool "Kernel support for ELF binaries"
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there
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