On Wed, 2 Dec 2015, Johannes Thumshirn wrote:
> On Sun, 2015-11-29 at 20:13 -0800, Eric Wheeler wrote:
> > Hello all,
> >
> > Please pull this bcache branch with stability patches and see if it fixes
> > any issue that you might have! If you have stability patches (*that you
> > have tested*) w
On Wed, Nov 11, 2015 at 12:37:54PM +0200, Peter Ujfalusi wrote:
> Hi,
>
> The first two patch is trivial fix.
> The third (remove the tasklet use for starting the transfer):
> I had been wondering about this for a while and now I was able to spend some
> time to look at this in more detail.
> In '
On Mon, Nov 16, 2015 at 04:53:27PM -0500, Sinan Kaya wrote:
> One of the things I'm interested in is to use a memcpy capable DMA
> engine HW to optimize user space and kernel space parameter copying.
>
> Of course, this will not be viable for all parameter sizes but I can see
> this being useful.
On Mon, Nov 23, 2015 at 02:09:38PM +0100, Ludovic Desroches wrote:
> Fix typo in a macro which was not used until now. It explains why there
> is no error at compilation time.
>
Applied both, thanks
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On Tue, Nov 24, 2015 at 09:52:35AM +0100, M'boumba Cedric Madianga wrote:
Title should say what is fixes rather than what flagged it off
> This patch fix an unchecked dereference warning by returning operation
> not permitted when stm32_dma_start_transfer() does not succeed to allocate
> a virtua
On Mon, Nov 23, 2015 at 02:22:04PM +, Damien Horsley wrote:
> From: "Damien.Horsley"
>
> Use of the CANCEL bit in mdc_terminate_all creates an
> additional 'command done' to appear in the registers (in
> addition to an interrupt).
>
> In addition, there is a potential race between
> mdc_term
On Tue, Nov 24, 2015 at 10:51:09AM +0100, Ludovic Desroches wrote:
> The code was not in agreement with the comments.
Applied, thanks
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On Wed, Dec 02, 2015 at 05:10:16PM +0100, Ludovic Desroches wrote:
> From: Sylvain ETIENNE
>
> When performing interleaved transfers with numf > 1, an extra line is
> copied. The mbr.bc field is incremented once too often. The length of
> the block is (BLEN+1) microblocks.
Applied, thanks
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~
Hi Michael,
Please find the membarrier man groff file attached. I re-integrated
some changes that went in initially only in the changelog text version
back onto this groff source.
Please let me know if you find any issue with it.
Mathieu
- On Dec 4, 2015, at 4:44 PM, Michael Kerrisk mtk.man
The A10/A20 share the same set of DRAM clock gates, which controls
direct memory access for some peripherals.
On the A10, bit 15 controls the system's DRAM clock output (possibly
to the DRAM chips), which we need to keep on.
On the A20 this has been moved to the DRAM controller, becoming a no-op.
The video engine has its own module clock, which also includes a
reset control for it.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun4i-a10.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 849d0242e
The video engine has its own module clock, which also includes a
reset control for it.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 21169c0a6
The video engine has its own special module clock, consisting of a clock
gate, configurable dividers, and a reset control.
On later (sun[68]i) families, the reset control is moved out of this
piece of hardware and grouped with reset controls of other peripherals.
Signed-off-by: Chen-Yu Tsai
---
The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20.dtsi | 32 +---
1 file changed, 29 i
Hi everyone,
This series adds support for the clocks used by the Video Engine (VPU /
video codec hardware) on the Allwinner A10/A20. The series purposely
excludes sun5i (A10s/A13/R8) to avoid any conflicts with Maxime's KMS
driver series, but adding it should be easy. VE clocks for the newer
gener
The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun4i-a10.dtsi | 36
1 file changed,
Hello,
I sent the path below a few weeks ago and did not have any feedback.
Could you please review it?
Thanks,
Nicolas
On 11/18/2015 07:07 PM, Nicolas Iooss wrote:
> strrcmp only performs read access to the memory addressed by its
> arguments so make them const pointers.
>
> Signed-off-by: Nico
Hello,
I sent the path below a few weeks ago and did not have any feedback.
Is there any issue in it that I need to fix before submitting it again?
Thanks,
Nicolas Iooss
On 11/18/2015 06:58 PM, Nicolas Iooss wrote:
> drm_dev_set_unique() formats its parameter using kvasprintf() but many
> of its
> >access_ok() always returns 1.
>
> Thanks for pointing it out. And, I didn't notice that gup is just built for
> SPARC64. I though it is built by both 64 bit and 32 bit.
>
> A follow-up question, is there any reason to just have sparc specific fast
> gup for 64 bit not for 32 bit?
I do not know
On Mon, Nov 16, 2015 at 01:09:03PM +0200, Peter Ujfalusi wrote:
> f93178291712 dmaengine: bcm2835-dma: Fix memory leak when stopping a
>running transfer
>
> Fixed the memleak, but introduced another issue: the terminate_all callback
> might be called with interrupts disabled and the dm
Signed-off-by: Tomer Barletz
---
net/netfilter/nfnetlink_queue.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/net/netfilter/nfnetlink_queue.c b/net/netfilter/nfnetlink_queue.c
index 7d81d28..e8be660 100644
--- a/net/netfilter/nfnetlink_queue.c
+++ b/net/netfilter/nfnetl
On 4 December 2015 at 04:02, Mark Rutland wrote:
> Hi,
>
> On Fri, Dec 04, 2015 at 09:51:22PM +, Elliott, Robert (Persistent Memory)
> wrote:
>> drivers/firmware/efi/libstub/efi-stub-helper.c get_dram_base()
>> parses the UEFI memory map, but just looks at the EFI_MEMORY_WB
>> attribute while
Hi Mike
Am Freitag, 4. Dezember 2015, 16:07:23 schrieb Michael Turquette:
> Heiko Stuebner wrote:
> > The otgphy clocks really only drive the phy blocks. These in turn
> > contain plls that then generate the 480m clocks the clock controller
> > uses to supply some other clocks like uart0, gpu or t
On Saturday 05 December 2015 12:52 AM, Alexey Brodkin wrote:
> From: Nelson Pereira
>
> ARC SDP baseboard among other peripherals sports
> DesignWare DMA controller.
>
> This enables support of that device.
> Note typically DW DMA controller is used with external devices
> connected to ARC SDP boa
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> There have been several discussions [1] about adding a device tree binding for
> associating flash devices with the partition parser(s) that are used on the
> flash. There are a few reasons:
>
> (1) drivers shouldn't have to be encoding platfo
On Fri, Oct 30, 2015 at 07:03:58PM +0800, Yuan Yao wrote:
> This add power management suspend/resume support for the fsl-edma
> driver.
>
> eDMA acted as a basic function used by others. What it needs to do
> is the two steps below to support power management.
>
> In fsl_edma_suspend_late:
> Chec
Allow Ftrace, Perf, and LTTng to hook on the irqsoff tracer and trace
irqsoff and preemptoff critical sections.
How to setup the irqsoff tracer for this use-case (needed for use with
Ftrace, Perf, or LTTng): if the tracing_thresh value is set, all
durations beyond the specified threshold will emit
Allow irqsoff and preemptoff tracers to be used by perf and lttng
without always having ftrace writing into its own ring buffers. Add this
"quiet" option to allow using those tracers without actively tracing
into the ftrace ring buffer.
Signed-off-by: Mathieu Desnoyers
CC: Thomas Gleixner
CC: St
On Mon, Nov 30, 2015 at 09:19:04PM +0530, Saurabh Sengar wrote:
> spin lock should be released while returning from function
Applying after fixing the subsytem name
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On Fri, Nov 13, 2015 at 04:39:37PM +, Jon Hunter wrote:
> Some clean-up changes for the tegra-apb DMA driver.
>
> Changes for V3 noted in the applicable patches.
>
> These have been compile and boot tested for ARM and ARM64. Summary of the
> ARM results are below.
Applied, thanks
--
~Vinod
On 04/12/15 18:57, Greg Kroah-Hartman wrote:
On Fri, Dec 04, 2015 at 05:31:14PM +, Martyn Welch wrote:
Select Chromebooks have gpio attached to switches used to cause the
firmware to enter alternative modes of operation and/or control other
device characteristics (such as write protection
On Mon, Nov 30, 2015 at 11:45:45PM +0300, Dmitry V. Krivenok wrote:
Applied, after fixing susystem name
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Changes from v3:
- Completely redesigned.
Changes from v2:
- Introduced SER_RS485_SOFTWARE to show that software implementation is being
used
- serial8250_rs485_config is located as required
- Timers are used to implement delay_before and delay_after timeouts
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Implementation of software emulation of RS485 direction handling is based
on omap_serial driver.
Before and after transmission RTS is set to the appropriate value.
Note that before calling serial8250_em485_init the caller has to
ensure that UART will interrupt when shift register empty. Otherwise,
Use software emulated RS485 direction control to provide RS485 API existed in
omap_serial driver. Note that 8250_omap issues interrupt on shift register
empty which is single prerequesite for using software emulated RS485.
Signed-off-by: Matwey V. Kornilov
---
drivers/tty/serial/8250/8250_omap.c
Signed-off-by: Matwey V. Kornilov
---
drivers/tty/serial/8250/8250_port.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_port.c
b/drivers/tty/serial/8250/8250_port.c
index 0bbf340..8ad0b2d 100644
--- a/drivers/tty/ser
On Fri, Dec 04, 2015 at 08:05:23PM +0300, Yury Norov wrote:
> On Thu, Dec 03, 2015 at 12:13:03PM +, Catalin Marinas wrote:
> > On Wed, Nov 18, 2015 at 12:16:47AM +0300, Yury Norov wrote:
> > > diff --git a/arch/arm64/include/asm/compat.h
> > > b/arch/arm64/include/asm/compat.h
> > > index 7fbe
On Wed, Dec 02, 2015 at 04:47:41PM -0600, Han Xu wrote:
> From: Huang Shijie
>
> Deep Sleep Mode(dsm) turns off the power for APBH DMA module, DMA
> need to be re-initialized when system resumed back.
Acked-by: Vinod Koul
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The Shared Memory accounting support is present in Kernel since
commit 4b02108ac1b3 ("mm: oom analysis: add shmem vmstat") and in userland
free(1) since 2014. This patch updates the Documentation to reflect
this change.
Signed-off-by: Rodrigo Freire
---
--- a/Documentation/filesystems/proc
Hi Sudip
On Thu, Dec 3, 2015 at 9:38 AM, Sudip Mukherjee
wrote:
> We are having build failure with next-20151202 for sparc allmodconfig
> with the error messages:
> undefined reference to 'of_io_request_and_map'
>
> CONFIG_OF is defined for sparc so it is expected that we have a
> definition of o
On Wed, Dec 02, 2015 at 04:47:42PM -0600, Han Xu wrote:
> From: Adrian Alonso
>
> supports APBH DMA on i.MX7D by add extra clock clk_io
Acked-by: Vinod Koul
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On Wed 2015-11-04 10:25:54, Minchan Kim wrote:
> MADV_FREE is on linux-next so long time. The reason was two, I think.
>
> 1. MADV_FREE code on reclaim path was really mess.
Could you explain what MADV_FREE does?
Comment in code says 'free the page only when there's memory
pressure'. So I mark m
Hi,
I rarely use a Realtek USB 3.0 Gigabit Ethernet adapter (vid/pid
0bda:8153), but when I did last night, it resulted in a lockup of
processes doing networking ("ip link", "ping", "ethtool", ...).
A (few) minute(s) before that event, I noticed that there was no network
connectivity (ping hung)
Hi,
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> Hi,
>
> There have been several discussions [1] about adding a device tree binding for
> associating flash devices with the partition parser(s) that are used on the
> flash. There are a few reasons:
>
> (1) drivers shouldn't have to be en
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> The platform description (such as the type of partition formats used on
> a given flash) should be done independently of the flash driver in use.
> However, we can't reasonably have *all* partition parsers run on all
> flash (until they find a
On 5 December 2015 04:07:39 GMT+11:00, Mitchel Humpherys
wrote:
>On Wed, Nov 18 2015 at 09:46:38 PM, Michael Ellerman
> wrote:
>> In order to check for overlapping reserved memory regions, we first
>need
>> to sort the array of memory regions. This is implemented using
>sort(),
>> and a custom
Hi Jason,
I did the testing and wrote for it a blog article for this:
https://mvitolin.wordpress.com/2015/12/05/endurox-testing-epollexclusive-flag/
But in summary is following:
Test case:
- One multi-threaded binary with 10 threads are doing total of 1'000'000
calls to 250 single threaded p
Add SMP support for Broadcom's Northstar Plus SoC
cpu enable method. This changes also consolidates
iProc family's - BCM NSP and BCM Kona, platform
SMP handling in a common file.
Northstar Plus SoC is based on ARM Cortex-A9
revision r3p0 which requires configuration for ARM
Errata 764369 for SMP.
From: Jon Mason
Add SMP support for Broadcom's 4708 SoCs.
Signed-off-by: Jon Mason
Acked-by: Hauke Mehrtens
Tested-by: Hauke Mehrtens
Signed-off-by: Kapil Hali
---
arch/arm/boot/dts/bcm4708.dtsi | 3 ++-
arch/arm/mach-bcm/Kconfig | 1 +
arch/arm/mach-bcm/Makefile | 3 +++
3 files c
Changes in V6:
* Updated 'enable-method' and 'secondary-boot-reg' device tree
property for Kona and NSP in DT and documentation file.
Changes in v5:
* Made 'enable-method' for SMP per 'cpu' core instead of 'cpus'
node, in the DT files for BCM NSP and BCM4708.
Change in v4:
* Cleaned up kona_smp.c
These changes cleans up SMP implementaion for Broadcom's
Kona SoC which are required for handling SMP for iProc
family of SoCs at a single place for BCM NSP and BCM Kona.
Signed-off-by: Kapil Hali
---
.../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt | 12 ++--
arch/arm/boot/dts/bcm11351.dtsi
Add device tree changes required for providing SMP support
for Broadcom Northstar Plus SoC.
Signed-off-by: Kapil Hali
---
arch/arm/boot/dts/bcm-nsp.dtsi | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/a
On 12/5/2015 4:36 AM, Florian Fainelli wrote:
> On 04/12/15 12:23, Kapil Hali wrote:
>> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
>> Northstar Plus CPU to the 32-bit ARM CPU device tree binding
>> documentation file and create a new binding documentation for
>> Northstar Plus CPU.
Hi Florian,
On 12/5/2015 4:37 AM, Florian Fainelli wrote:
> On 04/12/15 12:23, Kapil Hali wrote:
>> These changes cleans up SMP implementaion for Broadcom's
>> Kona SoC which are required for handling SMP for iProc
>> family of SoCs at a single place for BCM NSP and BCM Kona.
>>
>> Signed-off-by:
Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
Northstar Plus CPU to the 32-bit ARM CPU device tree binding
documentation file and create a new binding documentation for
Northstar Plus CPU.
Signed-off-by: Kapil Hali
---
.../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 +
Apply for your personal loan today and have it in your bank account within 24
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On Sat, Dec 05, 2015 at 11:11:46AM +0100, Ard Biesheuvel wrote:
> On 4 December 2015 at 04:02, Mark Rutland wrote:
> > Hi,
> >
> > On Fri, Dec 04, 2015 at 09:51:22PM +, Elliott, Robert (Persistent
> > Memory) wrote:
> >> drivers/firmware/efi/libstub/efi-stub-helper.c get_dram_base()
> >> pars
p(3680) seq=1 gfp=0x2400240 order=0 delay=61808
[ 150.505122] MemAlloc: nmbd(3713) seq=1 gfp=0x2400240 order=0 delay=66294
uninterruptible
[ 150.507521] MemAlloc: smbd(3734) seq=1 gfp=0x27000c0 order=2 delay=58284
[ 150.509678] MemAlloc: oom-write(3805) seq=12718 gfp=0x24280ca order=0
delay
Gidday,
The Linux man-pages maintainer proudly announces:
man-pages-4.03 - man pages for Linux
This release includes input and contributions from
nearly 40 people.
Tarball download:
http://www.kernel.org/doc/man-pages/download.html
Git repository:
https://git.kernel.org/cgit/docs/ma
Hi yankejian,
[auto build test ERROR on net-next/master]
url:
https://github.com/0day-ci/linux/commits/yankejian/dts-hisi-fixes-can-t-find-eth-for-hip05-D02/20151205-155412
config: arm64-allmodconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git
The video engine has its own special module clock, consisting of a clock
gate, configurable dividers, and a reset control.
On later (sun[68]i) families, the reset control is moved out of this
piece of hardware and grouped with reset controls of other peripherals.
Signed-off-by: Chen-Yu Tsai
---
Hi everyone,
(Series resent with linux-arm-kernel list added.)
This series adds support for the clocks used by the Video Engine (VPU /
video codec hardware) on the Allwinner A10/A20. The series purposely
excludes sun5i (A10s/A13/R8) to avoid any conflicts with Maxime's KMS
driver series, but addi
The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun4i-a10.dtsi | 36
1 file changed,
The video engine has its own module clock, which also includes a
reset control for it.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun4i-a10.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 849d0242e
The video engine has its own module clock, which also includes a
reset control for it.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 21169c0a6
The A10/A20 share the same set of DRAM clock gates, which controls
direct memory access for some peripherals.
On the A10, bit 15 controls the system's DRAM clock output (possibly
to the DRAM chips), which we need to keep on.
On the A20 this has been moved to the DRAM controller, becoming a no-op.
The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20.dtsi | 32 +---
1 file changed, 29 i
On Thu, Dec 03, 2015 at 01:28:12PM -0500, Nicolas Pitre wrote:
> On Thu, 3 Dec 2015, Russell King - ARM Linux wrote:
>
> > On Thu, Dec 03, 2015 at 04:41:18PM +, Russell King - ARM Linux wrote:
> > > On Thu, Dec 03, 2015 at 04:12:06PM +, Peter Rosin wrote:
> > > > * uaccess_with_memcpy.c:__
The patch is mainly to show pagetable number of different level in the direct
mapping. pagetable is created from pud to pte in arm64 , resulting in different
resluts with x86. For instance, The kernel of two-level pages will produce three
types of pagetable.
It can also be used to detect whether
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On Sat, Dec 05, 2015 at 09:35:32PM +0800, zhongjiang wrote:
> The patch is mainly to show pagetable number of different level in the direct
> mapping. pagetable is created from pud to pte in arm64 , resulting in
> different
> resluts with x86. For instance, The kernel of two-level pages will prod
On Sat, 5 Dec 2015 03:18:07 -0200
Diego Viola wrote:
> Ping?
So you say, but this is the first I've seen of this patch. Please send
the original and I'll apply it.
Thanks,
jon
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Hello,
On Sat, Dec 05, 2015 at 09:10:08AM +0800, Herbert Xu wrote:
> On Fri, Nov 27, 2015 at 04:23:54PM +0100, Philipp Hahn wrote:
> >
> > I observed a strange stall in a multi-threaded process (originally
> > OpenLDAP slapd), which stalls during a call to getaddrinfo() after
> > upgrading the ke
Hello Hannes,
On Wed, Dec 02, 2015 at 12:40:32PM +0100, Hannes Frederic Sowa wrote:
> > git bisect tells me it stopped working after those two commits were applied:
> >
> > commit d48623677191e0f035d7afd344f92cf880b01f8e
> > Author: Herbert Xu
> > Date: Tue Sep 22 11:38:56 2015 +0800
> >
> >
Our records indicate that you have been chosen to be the award recipient of $1m
from the Tom Crist annual senior citizens donation.
Please send ur Name, age address Tel & Occupation for more info and a check for
$1m will be issued to you.
Sincerely,
Tom Crist
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Hello Philipp,
Am 05.12.2015 um 15:19 schrieb Philipp Matthias Hahn:
Hello Hannes,
On Wed, Dec 02, 2015 at 12:40:32PM +0100, Hannes Frederic Sowa wrote:
git bisect tells me it stopped working after those two commits were applied:
commit d48623677191e0f035d7afd344f92cf880b01f8e
Author: Herbert
Staging: Skein: Moved macros from skein_block.c to header
file.
The original code defined macros in the source code, making it
harder to read. Moved them to the header file, as per the TODO file.
Signed-off-by: Sanidhya Solanki
---
drivers/staging/skein/skein_block.c | 473 +---
On Wed, Nov 11, 2015 at 10:35:47AM +0100, Mathieu OTHACEHE wrote:
> Add a driver which supports :
>
> - UPort 1110 : 1 port RS-232 USB to Serial Hub.
> - UPort 1130 : 1 port RS-422/485 USB to Serial Hub.
> - UPort 1130I : 1 port RS-422/485 USB to Serial Hub with Isolation.
> - UPort 1150 : 1 po
The patch is included below.
I would like to apologize for the past few emails. It turns out the
documentation included in the eMail clients file is woefully out of
date. I have checked the patches for errors using the scripts provided.
However, it turns out that the scripts are slightly incorrect,
On 05/12/15 06:10 AM, Pavel Machek wrote:
> On Wed 2015-11-04 10:25:54, Minchan Kim wrote:
>> MADV_FREE is on linux-next so long time. The reason was two, I think.
>>
>> 1. MADV_FREE code on reclaim path was really mess.
>
> Could you explain what MADV_FREE does?
>
> Comment in code says 'free th
On Sat, Dec 05, 2015 at 01:54:49PM +0300, Matwey V. Kornilov wrote:
> Signed-off-by: Matwey V. Kornilov
Why?
Please say so in the changelog.
thanks,
greg k-h
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More ma
Hi Tim,
On Thu, Oct 22, 2015 at 02:12:17PM -0700, Tim Bird wrote:
> Add a regulator to control the OTG chargepath switch. The OTG
> switch gets its power from pm8941_5vs1, and that should be expressed
> as an usb_otg_in-supply property in the DT node for the charger driver.
> The regulator name i
On Sat, Dec 05, 2015 at 01:54:47AM +0100, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Add a MAINTAINERS entry for the PM core with myself as the maintainer
> and linux-pm as the mailing list.
>
> This actually documents the current state of things.
>
> Signed-off-by: Rafael J. Wysock
On Fri, Dec 04, 2015 at 11:49:17PM +0200, Andy Shevchenko wrote:
> The users of BUS_NOTIFY_BIND_DRIVER have no chance to do any cleanup in case
> of
> a probe failure. In the result there might be problems, such as some resources
> that had been allocated will continue to be allocated and therefor
On Sat, Dec 05, 2015 at 10:55:42AM +0800, Geliang Tang wrote:
> On Thu, Dec 03, 2015 at 05:27:18PM +0100, Michal Hocko wrote:
> > On Thu 03-12-15 22:16:55, Geliang Tang wrote:
> > > To make the intention clearer, use list_{first,next}_entry instead
> > > of list_entry.
> >
> > Does this really hel
On Fri, Dec 04, 2015 at 11:28:33PM -0500, John Stoffel wrote:
>
> Hi all,
>
> I've been trying to upgrade to something newer than 4.2.6 since I want
> to use LVM Cache on my home NFS fileserver, KVM server, test server,
> etc. So when it goes down, I lose all my other systems which mount
> stuff
On Sat, Dec 5, 2015 at 6:14 PM, Greg Kroah-Hartman
wrote:
> On Fri, Dec 04, 2015 at 11:49:17PM +0200, Andy Shevchenko wrote:
>> The users of BUS_NOTIFY_BIND_DRIVER have no chance to do any cleanup in case
>> of
>> a probe failure. In the result there might be problems, such as some
>> resources
Hi,
On Mon, Nov 16, 2015 at 02:33:31PM +0800, Baolin Wang wrote:
> +static ssize_t cur_limit_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct usb_charger *uchger = dev_to_uchger(dev);
> +
> + retu
Add a new DTS file to support the Zyxel NSA325(v2) dual bay
NAS device, based on the NSA320 DTS files.
The only difference to the NSA320 device is GPIO47.
This en/disables the power for the hdd in slot2, currently
fixed to on.
Signed-off-by: Hans Ulli Kroll
---
arch/arm/boot/dts/Makefile
On Sat, Dec 05, 2015 at 06:24:05PM +0200, Andy Shevchenko wrote:
> On Sat, Dec 5, 2015 at 6:14 PM, Greg Kroah-Hartman
> wrote:
> > On Fri, Dec 04, 2015 at 11:49:17PM +0200, Andy Shevchenko wrote:
> >> The users of BUS_NOTIFY_BIND_DRIVER have no chance to do any cleanup in
> >> case of
> >> a prob
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Hi Ramakrishna,
On Thu, Oct 29, 2015 at 10:07:03PM +0530, Ramakrishna Pallala wrote:
> This patch series adds the support for TI BQ24261 charger driver.
>
> TI BQ24261 charger driver relies on extcon notifications to get the
> charger cable type and based on that it will set the charging paramete
Hi Sanidhya,
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v4.4-rc3 next-20151203]
url:
https://github.com/0day-ci/linux/commits/Sanidhya-Solanki/Staging-Skein-Moved-macros-from-skein_block-c-to-header/20151205-233922
config: x86_64-randconfig-s4-12052352
Add a new DTS file to support the Zyxel NSA325(v2) dual bay
NAS device, based on the NSA320 DTS files.
The only difference to the NSA320 device is GPIO47.
This en/disables the power for the hdd in slot2, currently
fixed to on.
Signed-off-by: Hans Ulli Kroll
---
Patch is resend due an copy&paste
On Fri, Dec 04, 2015 at 05:37:09PM +0100, Pavel Machek wrote:
> On Tue 2015-10-13 21:07:00, Mark Brown wrote:
> > This is exactly the sort of use case this feature is intended for, and
> > is the sort of situation where a custom kernel is not going to be any
> > kind of practical problem.
> Well.
On Fri, Dec 04, 2015 at 12:26:58PM -, Simon Arlott wrote:
> On Fri, December 4, 2015 11:00, Mark Brown wrote:
> > OK, so the power domains should be being represented and managed as such
> > rather than using regulators - it's a better fit (doing things like
> > support atomic context) and it
Similar to other controller type checks add check function for
IMX51. It includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index f811f68.
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support 16 and 32 BPW.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 121 +++---
1 file changed, 95 i
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx
transfer->len % wml for DMA capable transactions will always be 0
due to recent change in can_dma checks. So it's safe to remove dead code
in processing DMA.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/spi/sp
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