Hello,
On Wed, Sep 23, 2015 at 12:00 AM, Maxime Ripard
wrote:
>
> On Tue, Sep 22, 2015 at 11:38:57PM +0800, Vishnu Patekar wrote:
> > H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
> > It has UART, ethernet, USB, HDMI, etc ports on it.
> >
> > It's name is confusing, Its A83T board ho
of_find_net_device_by_node() uses class_find_device() internally to
lookup the corresponding network device. class_find_device() returns
a reference to the embedded struct device, with its refcount
incremented.
Add a comment to the definition in net/core/net-sysfs.c indicating the
need to drop th
On 09/22/2015 05:42 AM, Juergen Gross wrote:
> One other thing I just discovered: there are other consumers of the
> topology sibling masks (e.g. topology_sibling_cpumask()) as well.
>
> I think we would want to avoid any optimizations based on those in
> drivers as well, not only in the scheduler
Take a refcount on the phy struct device when the phy device is attached
to a network device, and drop it after it's detached. This ensures that
a refcount is held on the phy device while the device is being used by
a network device, thereby preventing the phy_device from being
unexpectedly kfree(
is it possible to map in supplemental groups in a userns when the user
lacks setgid/etc... capabilities in the parent ns ? it doesn't seem
like it's currently possible, but is there a reason to not enable it ?
basically i have a build tool that i want to isolate a bit, but it
requires access to s
Re-implement the mdiobus module refcounting to ensure that we actually
ensure that the mdiobus module code does not go away while we might call
into it.
The old scheme using bus->dev.driver was buggy, because bus->dev is a
class device which never has a struct device_driver associated with it,
and
bus_find_device() is defined as:
* This is similar to the bus_for_each_dev() function above, but it
* returns a reference to a device that is 'found' for later use, as
* determined by the @match callback.
and it does indeed return a reference-counted pointer to the device:
while ((dev
> From: "Kirill A. Shutemov"
> Date: Tue, 22 Sep 2015 17:31:04 +0200
> On Tue, Sep 22, 2015 at 08:18:35AM -0700, Paul E. McKenney wrote:
> > On Tue, Sep 22, 2015 at 03:57:06PM +0200, Hans-Peter Nilsson wrote:
> > > I guess you hit the right spot, but I'd think people would be
> > > more comfortab
reada is using -1 instead of the -ENOMEM defined macro to specify that
a buffer allocation failed. Since the error number is propagated, the
caller will get a -EPERM which is the wrong error condition.
Smatch tool warning:
reada_add_block() warn: returning -1 instead of -ENOMEM is sloppy
Signed-o
From: Luis de Bethencourt
Hi,
These two patches fix instances where -1 is used to specify a buffer
allocation fail, instead of using -ENOMEM.
I could merge the two patches into one if that's more appropriate.
Thanks,
Luis
Luis de Bethencourt (2):
btrfs: check-integrity: Fix returned errno c
With future SoCs of keystone2 family, the generic compatible match may
not be sufficient to handle SoC specific handling. So introduce matches
based on SoC compatiblity.
Signed-off-by: Nishanth Menon
---
arch/arm/mach-keystone/keystone.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arc
Keystone2 devices are used on more platforms than just Texas
Instruments reference evaluation platforms called EVMs. Providing a
generic compatible "ti,keystone" is not sufficient to differentiate
various SoC definitions possible on various platforms. So, provide
compatible matches for each SoC fam
Theodore Ts'o wrote:
> So what this means is that on 32-bit systems, if we have a userspace
> program which isn't using the Largefile-enabled, and it opens a file
> which is larger than can be addressed with a 32-bit off_t, it can get
> surprised and possibly cause data loss.
Good point. I was
This is the second version of the series, with the comments David had
on the first patch fixed up. Original series description with updated
diffstat below.
While looking at the DSA code, I noticed we have a
of_find_net_device_by_node(), and it looks like users of that are
similarly buggy - it loo
of_mdio_find_bus() leaks a struct device refcount, caused by using
class_find_device() and not realising that the device reference has
its refcount incremented:
* Note, you will need to drop the reference with put_device() after use.
...
while ((dev = class_dev_iter_next(&iter))) {
Hi,
On Mon, Sep 14, 2015 at 04:26:08PM -0500, Andrew F. Davis wrote:
> Rename functions that are used by multiple devices. New devices
> have been added and the function names and driver name are no longer
> general enough for the functionality they provide.
This patch does not apply to my next t
of_phy_find_device() increments the phy struct device refcount,
which we need to properly balance. Add code to network drivers
using this function to ensure that the struct device refcount is
correctly balanced.
Signed-off-by: Russell King
---
drivers/net/ethernet/apm/xgene/xgene_enet_hw.c|
On 09/21, Michal Hocko wrote:
>
> On Mon 21-09-15 17:32:52, Oleg Nesterov wrote:
> > On 09/21, Michal Hocko wrote:
> > >
> > > On Mon 21-09-15 15:44:14, Oleg Nesterov wrote:
> > > [...]
> > > > So yes, in general oom_kill_process() can't call oom_unmap_func()
> > > > directly.
> > > > That is why
Hello, Herbert.
On Tue, Sep 22, 2015 at 11:38:56AM +0800, Herbert Xu wrote:
> On Mon, Sep 21, 2015 at 02:20:22PM -0400, Tejun Heo wrote:
> > store_release and load_acquire are different from the usual memory
> > barriers and can't be paired this way. You have to pair store_release
> > and load_ac
Current users of of_mdio_find_bus() leak a struct device refcount, as
they fail to clean up the reference obtained inside class_find_device().
Fix the DSA code to properly refcount the returned MDIO bus by:
1. taking a reference on the struct device whenever we assign it to
pd->chip[x].host_dev
On Thu, Sep 17, 2015 at 12:02:11PM -0700, Stephen Boyd wrote:
> Now that we have a generic library function for this, replace the
> open-coded instance.
>
> Cc: Hauke Mehrtens
> Cc: Rafał Miłecki
> Cc: Paul Walmsley
> Cc: linux-m...@linux-mips.org
> Signed-off-by: Stephen Boyd
Looking good.
Add a phy_device_remove() function to complement phy_device_register(),
which undoes the effects of phy_device_register() by removing the phy
device from visibility, but not freeing it.
This allows these details to be moved out of the mdio bus code into
the phy code where this action belongs.
Sig
Storvsc driver needs to ensure there are no 'holes' in the presented
sg list (all segments in the middle of the list need to be of PAGE_SIZE).
When a hole is detected storvsc driver creates a 'bounce sgl' without
holes and copies data over with its own copy_{to,from}_bounce_buffer()
functions. Scsi
PVCLOCK_COUNTS_FROM_ZERO broke ABI and (at least) three things with it.
All problems stem from repeated writes to MSR_KVM_SYSTEM_TIME(_NEW).
The reverted patch treated the MSR write as a one-shot initializer:
any write from VCPU 0 would reset system_time.
And this is what broke for Linux guests:
*
On Tue, Sep 22, 2015 at 04:58:28PM +0100, Will Deacon wrote:
> Hi Paul,
>
> On Tue, Sep 22, 2015 at 04:22:41PM +0100, Paul E. McKenney wrote:
> > On Mon, Sep 21, 2015 at 11:23:01PM +0100, Will Deacon wrote:
> > > On Mon, Sep 21, 2015 at 03:10:38PM +0100, Boqun Feng wrote:
> > > > On Mon, Sep 21, 2
On 19-09-15, 15:22, Stephen Boyd wrote:
> On 09/18, Viresh Kumar wrote:
> > On 17-09-15, 11:13, Stephen Boyd wrote:
> > > > + count = of_property_count_u32_elems(opp->np, "opp-microvolt");
> > > > + if (count < 0) {
> > >
> > > We can't test count for -EINVAL to detect the missing prop
Validate that the phy_device passed into fixed_phy_update_state() is a
fixed-phy device before walking the list of phys for a fixed phy at the
same address.
Signed-off-by: Russell King
---
drivers/net/phy/fixed_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net
On Thu, Sep 10, 2015 at 03:06:20PM -0700, Stephen Boyd wrote:
> Populate the owner field of the spmi driver when
> spmi_driver_register() is called in a similar fashion to how
> other *_driver_register() functions do it. This saves driver
> writers from having to do this themselves.
>
> Cc: Andy G
On PPC8xx, flushing instruction cache is performed by writing
in register SPRN_IC_CST. This registers suffers CPU6 ERRATA.
The patch rewrites the fonction in C so that CPU6 ERRATA will
be handled transparently
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/kernel/misc_32.S | 1
Remove one instruction in mulhdu
Signed-off-by: Christophe Leroy
---
New in v2
arch/powerpc/kernel/misc_32.S | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 1597424..870dc63 100644
--- a/arch/pow
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xf000 : fixmap
* 0xfde0..0xfe00 : consistent mem
* 0xfddf6000..0xfde0 : early ioremap
* 0xc900..0xfddf6000
On Tue, Sep 22, 2015 at 04:37:37PM +0100, Luis de Bethencourt wrote:
> The driver is using -1 instead of the -ENOMEM defined macro to specify
> that a buffer allocation failed. Since the error number is propagated,
> the caller will get a -EPERM which is the wrong error condition.
>
> Smatch tool
On Mon, 21 Sep 2015 22:58:37 +0200
Robert Richter wrote:
> From: Robert Richter
>
> Some GIC revisions require an individual configuration to esp. add
> workarounds for HW bugs. This patch implements generic code to parse
> the hw revision provided by an IIDR register value and runs specific
>
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTL
If anybody comes up with a patch to fix the original issue I easily
can test it, since I'm hitting "BUG: Bad page state" in a second when
fuzzing with KTSAN and Trinity.
On Tue, Sep 15, 2015 at 9:01 PM, Kirill A. Shutemov
wrote:
> On Tue, Sep 15, 2015 at 01:36:45PM -0400, Sasha Levin wrote:
>> On
On 22/09/15 16:52, Will Deacon wrote:
> On Tue, Sep 22, 2015 at 11:52:19AM +0100, Andre Przywara wrote:
>> Enable the new userfaultfd syscall in the generic syscall table.
>> Briefly tested on arm64 with the selftest from the tools directory.
>
> Can you update the selftest too, please? Last time
On Fri, Sep 11, 2015 at 03:00:17PM -0400, Tejun Heo wrote:
> This is v2 of atomic multi-process migration patchset. This one
> slipped through crack somehow. Changes from the last take[L] are.
Applied to cgroup/for-4.4.
Thanks.
--
tejun
--
To unsubscribe from this list: send the line "unsubsc
On 09/22, Viresh Kumar wrote:
> of_property_count_u32_elems() will never return 0, but a -ve error value
> of a positive count. And so the current !count check is wrong.
>
> Also, a missing "opp-microvolt" property isn't a problem and so we need
> to do of_find_property() separately to confirm tha
This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst
from C functions
Signed-off-by: Christophe Leroy
---
New in v2
arch/powerpc/include/asm/cache.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/ca
There is no real need to have set_context() in assembly.
Now that we have mtspr() handling CPU6 ERRATA directly, we
can rewrite set_context() in C language for easier maintenance.
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/kernel/head_8xx.S | 44 ---
On 2015-09-22 11:36, Minchan Kim wrote:
Hi Vitaly,
On Mon, Sep 21, 2015 at 11:11:00PM +0200, Vitaly Wool wrote:
Hello Minchan,
Sorry, because you wrote up "zram" in the title.
As I said earlier, we need several numbers to investigate.
First of all, what is culprit of your latency?
It seems y
MPC8xx has an ERRATA on the use of mtspr() for some registers
This patch includes the ERRATA handling directly into mtspr() macro
so that mtspr() users don't need to bother about that errata
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/include/asm/reg.h | 2 +
arch/powe
show IMMR area in startup memory layout
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/mem.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 22d94c3..e105ca6 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm
Since:
commit e0857ce58e8658657f5f12fe25272b93cfeb16aa
("usb: gadget: loopback: don't queue requests to bogus endpoints")
Loopback function is not realy working as that commit removed
all looping back logic. After that commit ep-out works like
/dev/null and ep-in works like /dev/zero.
This commi
CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/include/asm/time.h | 6 +-
arch/powerpc/kernel/head_8xx.S | 18 --
2 files changed, 1 insertion(+),
ioremap_base is not initialised and is nowhere used so remove it
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/mmu_decl.h | 1 -
arch/powerpc/mm/pgtable_32.c| 1 -
arch/powerpc/platforms/embedded6xx/mpc10x.h | 8
3 files changed, 1
Each instance of loopback function may have different qlen
and buflen attributes values. When linking function to
configuration those values had been assigned to global
variables. Linking other instance to config overwrites those
values.
This commit moves those values to f_loopback structure
to av
Inlining of _dcache_range() functions has shown that the compiler
does the same thing a bit better with one insn less
Signed-off-by: Christophe Leroy
---
New in v2
arch/powerpc/kernel/misc_32.S | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.
This simplification helps the compiler. We now have only one test
instead of two, so it reduces the number of branches.
Signed-off-by: Christophe Leroy
---
New in v2
arch/powerpc/mm/dma-noncoherent.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/dma-noncohe
On Mon, 21 Sep 2015 22:58:38 +0200
Robert Richter wrote:
> From: Robert Richter
>
> This implements two gicv3-its errata workarounds for ThunderX. Both
> with small impact affecting only ITS table allocation.
>
> erratum 22375: only alloc 8MB table size
> erratum 24313: ignore memory access
clear_pages() is never used, and PPC32 is the only architecture
(still) having this function. Neither PPC64 nor any other
architecture has it.
This patch removes clear_page() and move clear_page() function
inline (same as PPC64) as it only is a few isns
Signed-off-by: Christophe Leroy
---
No cha
flush/clean/invalidate _dcache_range() functions are all very
similar and are quite short. They are mainly used in __dma_sync()
perf_event locate them in the top 3 consumming functions during
heavy ethernet activity
They are good candidate for inlining, as __dma_sync() does
almost nothing but call
On Tue, Sep 22, 2015 at 06:39:26PM +0200, Krzysztof Opasiak wrote:
> Each instance of loopback function may have different qlen
> and buflen attributes values. When linking function to
> configuration those values had been assigned to global
> variables. Linking other instance to config overwrites
On Mon, 21 Sep 2015 22:58:39 +0200
Robert Richter wrote:
> From: Robert Richter
>
> Use newly introduced jump label API.
>
> Make this a separate patch for easier backporting to older kernels of
> the errata patch set.
>
> Signed-off-by: Robert Richter
Acked-by: Marc Zyngier
M.
--
We are spending between 40 and 160 cycles with a mean of 65 cycles
in the TLB handling routines (measured with mftbl) so make it more
simple althought it adds one instruction
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/kernel/head_8xx.S | 15 ---
1 file changed,
On Mon, 21 Sep 2015 22:58:33 +0200
Robert Richter wrote:
> From: Robert Richter
>
> This patch series adds gicv3 updates and workarounds for HW errata in
> Cavium's ThunderX GICV3.
>
> The patches has been rebased onto 4.3-rc1. Note that there are two
> important fixes. See below for all chang
On 09/22/2015 09:40 AM, Lorenzo Pieralisi wrote:
On Tue, Sep 22, 2015 at 05:13:45PM +0100, David Daney wrote:
On 09/22/2015 09:05 AM, Lorenzo Pieralisi wrote:
On Thu, Sep 17, 2015 at 11:41:34PM +0100, David Daney wrote:
[...]
Properties of the host controller node:
-- compatible : M
Commit 771168494719 ("[POWERPC] Remove unused machine call outs")
removed the call to setup_io_mappings(), so remove the associated
progress line message
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/init_32.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/pow
IMMR is now mapped at 0xff00 by page tables so it is not
anymore necessary to PIN TLBs
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/Kconfig.debug | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 70168a2..452
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
This
Move 8xx SPRN defines into reg_8xx.h and add some missing ones
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/include/asm/mmu-8xx.h | 26 +-
arch/powerpc/include/asm/reg_8xx.h | 24
2 files changed, 37 insertions(+), 13 deletion
On Mon, 21 Sep 2015 22:58:35 +0200
Robert Richter wrote:
> From: Robert Richter
>
> This patch implements Cavium ThunderX erratum 23154.
>
> The gicv3 of ThunderX requires a modified version for reading the IAR
> status to ensure data synchronization. Since this is in the fast-path
> and calle
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the missed are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
On 09/22/2015 06:53 PM, Felipe Balbi wrote:
On Tue, Sep 22, 2015 at 06:39:26PM +0200, Krzysztof Opasiak wrote:
Each instance of loopback function may have different qlen
and buflen attributes values. When linking function to
configuration those values had been assigned to global
variables. Lin
iounmap() cannot vunmap() area mapped by TLBCAMs either
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/pgtable_32.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 7692d1b..03a073a 1006
On Mon, Jul 13, 2015 at 05:44:59PM -0700, Paul E. McKenney wrote:
> On Tue, May 19, 2015 at 05:55:10PM -0700, Paul E. McKenney wrote:
> > Hello!
> >
> > Following up on last year's discussion (https://lwn.net/Articles/586838/,
> > https://lwn.net/Articles/588300/), I believe that we have a solutio
On 18-09-15, 17:52, Stephen Boyd wrote:
> /**
> + * dev_pm_opp_adjust_voltage() - helper to change the voltage of an OPP
> + * @dev: device for which we do this operation
> + * @freq:OPP frequency to adjust voltage of
> + * @u_volt: new OPP voltage
> + *
> + * Chan
Now the noltlbs kernel parameter is also applicable to PPC8xx
Signed-off-by: Christophe Leroy
---
No change in v2
Documentation/kernel-parameters.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
in
x_mapped_by_bats() and x_mapped_by_tlbcam() serve the same kind of
purpose, so lets group them into a single function.
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/pgtable_32.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff
We are spending between 40 and 160 cycles with a mean of 65 cycles in
the TLB handling routines (measured with mftbl) so make it more
simple althought it adds one instruction.
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/kernel/head_8xx.S | 13 -
1 file changed,
Now we have a 8xx specific .c file for that so put it in there
as other powerpc variants do
Signed-off-by: Christophe Leroy
---
No change in v2
arch/powerpc/mm/8xx_mmu.c | 17 +
arch/powerpc/mm/init_32.c | 19 ---
2 files changed, 17 insertions(+), 19 deletions(-
On 2015-09-22 11:57, Jacob Pan wrote:
On Tue, 22 Sep 2015 09:41:52 -0400
Austin S Hemmelgarn wrote:
On 2015-09-21 17:36, Jacob Pan wrote:
On Mon, 21 Sep 2015 11:48:14 +0800
Pengyu Ma wrote:
On 09/18/2015 11:43 PM, Jacob Pan wrote:
On Fri, 18 Sep 2015 02:09:55 +0200
"Rafael J. Wysocki"
Add kernel-doc headers to the remaining functions marked for export.
Signed-off-by: Ian Abbott
---
drivers/staging/comedi/comedi_buf.c | 69 ++---
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/comedi/comedi_buf.c
b/drivers/staging
The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we ge
1) staging: comedi: comedi_buf.c: tweak existing kernel-doc
2) staging: comedi: comedi_buf.c: document remaining exported functions
drivers/staging/comedi/comedi_buf.c | 106 ++--
1 file changed, 88 insertions(+), 18 deletions(-)
--
To unsubscribe from this list: s
On Tue, 22 Sep 2015 11:11:36 +0800
Pengyu Ma wrote:
>
>
> On 09/22/2015 05:36 AM, Jacob Pan wrote:
> > On Mon, 21 Sep 2015 11:48:14 +0800
> > Pengyu Ma wrote:
> >
> >>
> >> On 09/18/2015 11:43 PM, Jacob Pan wrote:
> >>> On Fri, 18 Sep 2015 02:09:55 +0200
> >>> "Rafael J. Wysocki" wrote:
> >>>
Expand the kernel-doc descriptions of those exported functions that
already have kernel-doc comments.
Signed-off-by: Ian Abbott
---
drivers/staging/comedi/comedi_buf.c | 37 +++--
1 file changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/staging/come
Improve readability by generalizing the profile validity checks.
Signed-off-by: Alexandru Moise <00moses.alexande...@gmail.com>
---
v2: Followed Dave's suggestion and renamed function to
validate_convert_profile instead of balance_relocate_invalid
fs/btrfs/volumes.c | 21 -
1
When debugging it can be helpful to change the policy for compiler use
of MIPSr6 compact branches, in order to rule out or home in on their
involvement in bugs. Allow the GCC -mcompact-branches= flag to be set
via Kconfig under the "Kernel hacking" menu.
Signed-off-by: Paul Burton
---
arch/mips
On 18-09-15, 17:52, Stephen Boyd wrote:
> We pass the dev_pm_opp structure to OPP notifiers but the users
> of the notifier need to surround calls to dev_pm_opp_get_*() with
> RCU read locks to avoid lockdep warnings. The notifier is already
> called with the dev_opp's srcu lock held, so it should
When debugging or examining the performance of a system it can be useful
to examine the effect of L2 prefetching. Provide an optional debugfs
entry to allow a user to enable or disable L2 prefetching.
Signed-off-by: Paul Burton
---
arch/mips/Kconfig.debug | 10 ++
arch/mips/mm/Makefile
This series introduces support for enabling & disabling L2 cache
prefetch units found in systems with CM 2.5 & above (P5600 & I6400 in
terms of currently supported cores). They are enabled by default during
boot and entries are optionally added to DebugFS to enable or disable
prefetching.
Paul Bu
On systems with CM 2.5 & beyond there may be L2 prefetch units present
which are not enabled by default. Detect them, configuring & enabling
prefetching when available.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/mips-cm.h | 17
arch/mips/mm/sc-mips.c | 61 +++
On Tue, 22 Sep 2015, Sebastian Reichel wrote:
> On Fri, Sep 11, 2015 at 11:05:21AM +0100, Adam Thomson wrote:
> > This patch set adds support for the Dialog DA9150 Fuel-Gauge.
> >
> > [...]
> >
> > Adam Thomson (6):
> > mfd: da9150: Add support for Fuel-Gauge
> > mfd: da9150: Update DT binding
Introduce new functions in struct bcache_ops to enable & disable L2
cache prefetching, and to retrieve the current state of L2 prefetching.
This will be used in later patches.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/bcache.h | 27 +++
1 file changed, 27 inse
On Tue, Sep 22, 2015 at 6:18 AM, Vitaly Wool wrote:
> Hi Dan,
>
> On Mon, Sep 21, 2015 at 6:17 PM, Dan Streetman wrote:
>> Please make sure to cc Seth also, he's the owner of zbud.
>
> Sure :)
>
>
>>> @@ -514,8 +552,17 @@ int zbud_reclaim_page(struct zbud_pool *pool, unsigned
>>> int retries)
>
On 08/28, Bartlomiej Zolnierkiewicz wrote:
> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> incorrectly used as a bit numbers. Fix it.
>
> Tested on Exynos4210 based Origen board and on Exynos5250 based
> Arndale board.
>
> Cc: Tomasz Figa
> Cc: Michael Turquette
> Cc: Thomas Ab
We have many extern declarations of mips_debugfs_dir through arch/mips/
in various C files. Unify them by declaring mips_debugfs_dir in a
header, including it in each affected C file & removing the duplicate
declarations.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/debug.h | 22
Hi Shuah, Andrea,
On 22/09/15 15:06, Andrea Arcangeli wrote:
> On Tue, Sep 22, 2015 at 07:49:13AM -0600, Shuah Khan wrote:
>> On 09/22/2015 04:45 AM, Andre Przywara wrote:
>>> At the moment the userfaultfd test program only supports x86 and an
>>> architecture called "powewrpc" ;-)
>>> Fix that ty
Rather than #ifdef on CONFIG_KVM_GUEST & redefine the guest kseg0 base
locally, make use of the CAC_BASE macro which has the correct value in
both cases.
Signed-off-by: Paul Burton
Cc: James Hogan
---
arch/mips/kernel/traps.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff
A boundary exists beyond which the timer frequency becomes high enough
that timer interrupts saturate the system and either cause it to slow to
a crawl or stop functioning entirely. Where that boundary lies depends
upon a number of factors such as the overhead of each interrupt and the
overall spee
Yuyang Du writes:
> On Mon, Sep 21, 2015 at 10:30:04AM -0700, bseg...@google.com wrote:
>> > But first, I think as load_sum and load_avg can afford NICE_0_LOAD with
>> > either high
>> > or low resolution. So we have no reason to have low resolution (10bits)
>> > load_avg
>> > when NICE_0_LOAD
On Tue, Sep 22, 2015 at 06:58:13PM +0200, Krzysztof Opasiak wrote:
>
>
> On 09/22/2015 06:53 PM, Felipe Balbi wrote:
> >On Tue, Sep 22, 2015 at 06:39:26PM +0200, Krzysztof Opasiak wrote:
> >>Each instance of loopback function may have different qlen
> >>and buflen attributes values. When linking
On Tue, Sep 22, 2015 at 06:54:57PM +0200, Krzysztof Opasiak wrote:
> Each instance of loopback function may have different qlen
> and buflen attributes values. When linking function to
> configuration those values had been assigned to global
> variables. Linking other instance to config overwrites
On Mon, Sep 21, 2015 at 11:08:55AM +0200, Jean-Michel Hautbois wrote:
> 2015-09-19 19:56 GMT+02:00 Mark Brown :
> > A calculated timeout is probably best.
> Well, it depends...
> If you have a 20MHz clock, then you can transfer a byte in 4µs.
> As most of the time pio_transfer is used for 8 to 32
CM3 has 64 bit GCR_ERROR_* registers, but the code in
mips_cm_error_report was previously only reading 32 bits of it in MIPS32
kernels. Fix by splitting the reads for CM2 & CM3, and making use of the
read64_ variants of the accessor function for CM3.
Signed-off-by: Paul Burton
---
arch/mips/inc
Hi Sasha,
Julia forwarded the report (see below) to me. Unless
IRQCHIP_ONESHOT_SAFE is set, requesting a threaded IRQ will always fail
when the primary handler is set to NULL. In some cases there's a
potential to run into stack overflows.
I attached a patch that fixes the issue.
Kind regards,
The printouts writen to the logs by suspend can be a bit opaque: it can
be hard to track them down to the actual function called. You might
see:
calling rfkill1+ @ 19473, parent: phy0
call rfkill1+ returned 0 after 1 usecs
calling phy0+ @ 19473, parent: mmc2:0001:1
call phy0+ returned 0
If we run a MIPS32 kernel on a system using CM3 we may still need to
access 64 bit GCRs, as will be done in later patches. Allow this by
having the read64_gcr_* accessor functions perform 2 x 32 bit reads on
those systems.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/mips-cm.h | 12
This series fixes a few problems with support for the CM, in particular
relating to CM3 which has a 64 bit interface to the core. These issues
prevented reporting of CM errors (useful debug output when tracking the
source of a bus error) in some situations, and could cause further
exceptions.
Paul
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