On Fri, 24 Apr 2015, Jerome Glisse wrote:
> > Right this is how things work and you could improve on that. Stay with the
> > scheme. Why would that not work if you map things the same way in both
> > environments if both accellerator and host processor can acceess each
> > others memory?
>
> Again
This is a preparatory patch that extracts out the following 2 code
snippets to prepare for the next performance optimization patch.
1) the logic for the exchange of new and previous tail code words
into a new xchg_tail() function.
2) the logic for clearing the pending bit and setting the loc
From: Peter Zijlstra (Intel)
When we allow for a max NR_CPUS < 2^14 we can optimize the pending
wait-acquire and the xchg_tail() operations.
By growing the pending bit to a byte, we reduce the tail to 16bit.
This means we can use xchg16 for the tail part and do away with all
the repeated compxch
In the pv_scan_next() function, the slow cmpxchg atomic operation is
performed even if the other CPU is not even close to being halted. This
extra cmpxchg can harm slowpath performance.
This patch introduces the new mayhalt flag to indicate if the other
spinning CPU is close to being halted or not
Currently, atomic_cmpxchg() is used to get the lock. However, this
is not really necessary if there is more than one task in the queue
and the queue head don't need to reset the tail code. For that case,
a simple write to set the lock bit is enough as the queue head will
be the only one eligible to
Before this patch, a CPU may have been kicked twice before getting
the lock - one before it becomes queue head and once before it gets
the lock. All these CPU kicking and halting (VMEXIT) can be expensive
and slow down system performance, especially in an overcommitted guest.
This patch adds a new
From: Peter Zijlstra (Intel)
We use the regular paravirt call patching to switch between:
native_queue_spin_lock_slowpath() __pv_queue_spin_lock_slowpath()
native_queue_spin_unlock()__pv_queue_spin_unlock()
We use a callee saved call for the unlock function which reduces the
This patch enables the accumulation of PV qspinlock statistics
when either one of the following three sets of CONFIG parameters
are enabled:
1) CONFIG_LOCK_STAT && CONFIG_DEBUG_FS
2) CONFIG_KVM_DEBUG_FS
3) CONFIG_XEN_DEBUG_FS
The accumulated lock statistics will be reported in debugfs under th
This patch adds the necessary KVM specific code to allow KVM to
support the CPU halting and kicking operations needed by the queue
spinlock PV code.
Signed-off-by: Waiman Long
---
arch/x86/kernel/kvm.c | 43 +++
kernel/Kconfig.locks |2 +-
2 files c
On Sat, 2015-04-25 at 00:22 +0530, Navya Sri Nizamkari wrote:
> This patch fixes the checkpatch.pl warning
> about line over 80 characters.
Don't give checkpatch any respect when it's being stupid.
> diff --git a/drivers/staging/slicoss/slicoss.c
> b/drivers/staging/slicoss/slicoss.c
[]
> @@ -98
From: David Vrabel
This patch adds the necessary Xen specific code to allow Xen to
support the CPU halting and kicking operations needed by the queue
spinlock PV code.
Signed-off-by: David Vrabel
Signed-off-by: Waiman Long
---
arch/x86/xen/spinlock.c | 64 +++
Provide a separate (second) version of the spin_lock_slowpath for
paravirt along with a special unlock path.
The second slowpath is generated by adding a few pv hooks to the
normal slowpath, but where those will compile away for the native
case, they expand into special wait/wake code for the pv v
From: Peter Zijlstra (Intel)
When we detect a hypervisor (!paravirt, see qspinlock paravirt support
patches), revert to a simple test-and-set lock to avoid the horrors
of queue preemption.
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Waiman Long
---
arch/x86/include/asm/qspinlock.h |
Commit-ID: 10a50f1ab5f06c9a3ee5ece3ec52e607ed53c79f
Gitweb: http://git.kernel.org/tip/10a50f1ab5f06c9a3ee5ece3ec52e607ed53c79f
Author: Roger Quadros
AuthorDate: Wed, 15 Apr 2015 11:14:11 +0300
Committer: Thomas Gleixner
CommitDate: Fri, 24 Apr 2015 20:57:06 +0200
genirq: Set IRQCHIP_SK
Currently when interface type is MAC to Phy, netif_carrier_(on/off)
is called which is not needed as Phy lib already updates the carrier
status to net stack. This is needed only for other interface types
Signed-off-by: Murali Karicheri
---
- Fixed comment against initial version
- Ok to apply t
This patch introduces a new generic queue spinlock implementation that
can serve as an alternative to the default ticket spinlock. Compared
with the ticket spinlock, this queue spinlock should be almost as fair
as the ticket spinlock. It has about the same speed in single-thread
and it can be much
On 04/24/15 20:24, John Tobias wrote:
Hi Arend,
Apologize for the confusion. I am asking the repo for the device
driver for 43340. Looking at the link you sent, it's more userspace
support and didn't see the device driver there...
crap. you are right. it is userspace and firmware. You need a k
From: Peter Zijlstra (Intel)
Because the qspinlock needs to touch a second cacheline (the per-cpu
mcs_nodes[]); add a pending bit and allow a single in-word spinner
before we punt to the second cacheline.
It is possible so observe the pending bit without the locked bit when
the last owner has ju
v15->v16:
- Remove the lfsr patch and use linear probing as lfsr is not really
necessary in most cases.
- Move the paravirt PV_CALLEE_SAVE_REGS_THUNK code to an asm header.
- Add a patch to collect PV qspinlock statistics which also
supersedes the PV lock hash debug patch.
- Add PV qspinl
This patch makes the necessary changes at the x86 architecture
specific layer to enable the use of queue spinlock for x86-64. As
x86-32 machines are typically not multi-socket. The benefit of queue
spinlock may not be apparent. So queue spinlock is not enabled.
Currently, there is some incompatibi
On 04/24/2015 11:20 AM, Mel Gorman wrote:
On Fri, Apr 24, 2015 at 10:35:49AM -0400, Waiman Long wrote:
On 04/23/2015 05:23 AM, Mel Gorman wrote:
On Wed, Apr 22, 2015 at 04:45:00PM -0700, Andrew Morton wrote:
On Wed, 22 Apr 2015 18:07:50 +0100 Mel Gorman wrote:
--- a/arch/x86/Kconfig
+++ b/
Commit-ID: 149aabcc44e3e2c1f8fe4f0832be53d2db55b598
Gitweb: http://git.kernel.org/tip/149aabcc44e3e2c1f8fe4f0832be53d2db55b598
Author: Viresh Kumar
AuthorDate: Fri, 10 Apr 2015 12:56:41 +0530
Committer: Thomas Gleixner
CommitDate: Fri, 24 Apr 2015 21:01:48 +0200
clockevents: Shutdown d
Quoting Andy Lutomirski (l...@amacapital.net):
> On Fri, Apr 24, 2015 at 10:53 AM, Serge Hallyn
> wrote:
> > Quoting Christoph Lameter (c...@linux.com):
> >> On Thu, 9 Apr 2015, Christoph Lameter wrote:
> >>
> >> > > I'll submit a new version this week with the securebits. Sorry for
> >> > > th
On Tue, Apr 14, 2015 at 06:49:40PM +0200, Michal Hocko wrote:
> On Wed 25-03-15 02:17:13, Johannes Weiner wrote:
> > @@ -5747,17 +5765,18 @@ static void __setup_per_zone_wmarks(void)
> >
> > min_pages = zone->managed_pages / 1024;
> > min_pages = clamp(min_
On Thu, Apr 23, 2015 at 01:46:55PM +0200, Paolo Bonzini wrote:
> From: Radim Krčmář
>
> The kvmclock spec says that the host will increment a version field to
> an odd number, then update stuff, then increment it to an even number.
> The host is buggy and doesn't do this, and the result is observ
On Fri, Apr 24, 2015 at 9:38 AM, Stephane Eranian wrote:
> On Fri, Apr 24, 2015 at 7:03 AM, Vince Weaver
> wrote:
>> On Fri, 24 Apr 2015, Vince Weaver wrote:
>>
>>> [ 79.473121] kernel BUG at mm/vmalloc.c:1335!
>>> [ 79.477705] invalid opcode: [#1] SMP
>> ...
>>> [ 79.694391] Call Tra
From: Rik van Riel
After system bootup, there is no totally reliable way to see
which CPUs are isolated, because the kernel may modify the
CPUs specified on the isolcpus= kernel command line option.
Export the CPU list that actually got isolated in sysfs,
specifically in the file /sys/devices/sy
Currently there is no good way to get the isolated and nohz_full
CPUs at runtime, because the kernel may have changed the CPUs
specified on the commandline (when specifying all CPUs as
isolated, or CPUs that do not exist, ...)
This series adds two files to /sys/devices/system/cpu, which can
be use
From: Rik van Riel
Currently there is no way to query which CPUs are in nohz_full
mode from userspace.
Export the CPU list running in nohz_full mode in sysfs,
specifically in the file /sys/devices/system/cpu/nohz_full
This can be used by system management tools like libvirt,
openstack, and othe
On Fri, Apr 24, 2015 at 04:34:34PM +0200, Lukasz Skalski wrote:
> On 04/24/2015 04:19 PM, Havoc Pennington wrote:
> > On Fri, Apr 24, 2015 at 9:50 AM, Lukasz Skalski
> > wrote:
> >> - client: http://fpaste.org/215156/
> >>
> >
> > Cool - it might also be interesting to try this without blocking
On Fri, 24 Apr 2015, Serge Hallyn wrote:
> > I object because CAP_SETPCAP is very powerful whereas
> > CAP_NET_BIND_SERVICE, for example, isn't. I'm fine with having a
> > switch to turn off ambient caps, but requiring the "on" state to give
>
> Would only really be needed for the initial 'enable
On Fri, Apr 24, 2015 at 01:56:45PM -0500, Christoph Lameter wrote:
> On Fri, 24 Apr 2015, Jerome Glisse wrote:
>
> > > Right this is how things work and you could improve on that. Stay with the
> > > scheme. Why would that not work if you map things the same way in both
> > > environments if both
On Fri, Apr 24, 2015 at 12:22 PM, Bjorn Helgaas wrote:
> On Fri, Apr 24, 2015 at 9:38 AM, Stephane Eranian wrote:
>> On Fri, Apr 24, 2015 at 7:03 AM, Vince Weaver
>> wrote:
>>> On Fri, 24 Apr 2015, Vince Weaver wrote:
>>>
[ 79.473121] kernel BUG at mm/vmalloc.c:1335!
[ 79.477705]
If a file contains AUX area tracing data then always allow
fields 'addr' and 'cpu' to be selected as options for perf
script. This is necessary because AUX area decoding
may synthesize events with that information.
Signed-off-by: Adrian Hunter
---
tools/perf/builtin-script.c | 29 ++
Add support for making snapshots of
AUX area tracing data.
Signed-off-by: Adrian Hunter
---
tools/perf/perf.h | 3 ++
tools/perf/util/auxtrace.c | 85 --
tools/perf/util/auxtrace.h | 41 ++
3 files changed, 119 insertions(
The enhanced thread stack is used by higher layers but still
requires the trace number. The trace number is used to
distinguish discontinuous sections of trace (for example
from Snapshot mode or Sample mode), which cause the thread
stack to be flushed.
Signed-off-by: Adrian Hunter
---
tools/per
To record an AUX area, the weak function
auxtrace_record__init() must be implemented.
Equally to decode an AUX area, the
AUX area tracing type must be added to the
perf_event__process_auxtrace_info() function.
This patch makes those two changes plus hooks
up default config for the intel_pt PMU.
Add a facility to log Intel Processor Trace
decoding. The log is intended for debugging
purposes only.
The log file name is "intel_pt.log" and is
opened in the current directory.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-pt-decoder/Build | 2 +-
tools/perf/util/intel-pt
Add a new option and support for Instruction
Tracing Snapshot Mode. When the new option is
selected, no AUX area tracing data is
captured until a signal (SIGUSR2) is received.
Signed-off-by: Adrian Hunter
---
tools/perf/Documentation/perf-record.txt | 7 ++
tools/perf/builtin-record.c
intel_bts synthesizes samples. Fill in the new flags and
insn_len members with instruction information.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-bts.c | 127 ++--
1 file changed, 123 insertions(+), 4 deletions(-)
diff --git a/tools/perf/uti
The enhanced thread stack is used by higher layers but still
requires the trace number. The trace number is used to
distinguish discontinuous sections of trace (for example
from Snapshot mode or Sample mode), which cause the thread
stack to be flushed.
Signed-off-by: Adrian Hunter
---
tools/per
intel_pt synthesizes samples. Fill in the new flags and
insn_len members with instruction information.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-pt.c | 4
1 file changed, 4 insertions(+)
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 8ba4ce7..cf6b4
Signed-off-by: Adrian Hunter
---
.../scripts/python/call-graph-from-postgresql.py | 285 +
1 file changed, 285 insertions(+)
create mode 100644 tools/perf/scripts/python/call-graph-from-postgresql.py
diff --git a/tools/perf/scripts/python/call-graph-from-postgresql.py
b/t
Signed-off-by: Adrian Hunter
---
tools/perf/Documentation/intel-bts.txt | 69 +++
tools/perf/arch/x86/util/Build | 1 +
tools/perf/arch/x86/util/auxtrace.c| 49 +-
tools/perf/arch/x86/util/intel-bts.c | 458 +++
tools/perf/util/Build | 1 +
too
Add support for Intel Processor Trace.
Signed-off-by: Adrian Hunter
---
tools/perf/arch/x86/util/Build |2 +
tools/perf/arch/x86/util/intel-pt.c | 752 ++
tools/perf/util/Build |1 +
tools/perf/util/intel-pt.c | 1891 ++
Allow auxtrace data to be a multiple of
something other than page size. That is
needed for BTS where the buffer contains
24-byte records.
Signed-off-by: Adrian Hunter
---
tools/perf/util/auxtrace.c | 7 +++
tools/perf/util/auxtrace.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/too
Add support for decoding Intel Processor Trace
packets.
Signed-off-by: Adrian Hunter
---
tools/perf/util/Build | 1 +
tools/perf/util/intel-pt-decoder/Build | 1 +
.../util/intel-pt-decoder/intel-pt-pkt-decoder.c | 400 +
.../uti
On Fri, Apr 24, 2015 at 5:31 PM, Denys Vlasenko
> diff --git a/arch/x86/include/asm/processor.h
b/arch/x86/include/asm/processor.h
> index 23ba676..3754dac 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -304,6 +304,8 @@ DECLARE_PER_CPU_SHARED_ALIGNED(
Add support for decoding instructions for Intel
Processor Trace. The kernel x86 instruction
decoder is used for this.
Signed-off-by: Adrian Hunter
---
tools/build/Makefile.build | 2 +
tools/perf/.gitignore | 2 +
tools/perf/Makefile.perf
Add support for decoding an Intel Processor Trace.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-pt-decoder/Build |2 +-
.../perf/util/intel-pt-decoder/intel-pt-decoder.c | 1738
.../perf/util/intel-pt-decoder/intel-pt-decoder.h | 89 +
3 files c
Add an index of AUX area tracing events within
a perf.data file.
perf record uses a special user event
PERF_RECORD_FINISHED_ROUND to enable sorting of
events in chunks instead of having to sort all
events altogether.
AUX area tracing events contain data that can
span back to the very beginning of
Add the Intel Processor Trace type
constant PERF_AUXTRACE_INTEL_PT.
Signed-off-by: Adrian Hunter
---
tools/perf/util/auxtrace.c | 1 +
tools/perf/util/auxtrace.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c
index 4f024eb..81419c6 1
Add support for the PERF_RECORD_ITRACE_START event type.
This event can be used to determine the pid and tid that
are running when Instruction Tracing starts. Generally
that information would come from a sched_switch event
but, at the start, no sched_switch events may yet have
been recorded.
Sign
We need to include all buildids when a perf.data
file contains AUX area tracing data because we
do not decode the trace for that purpose because
it would take too long.
Signed-off-by: Adrian Hunter
---
tools/perf/builtin-buildid-list.c | 9 +
tools/perf/builtin-inject.c | 8 +
Add AUX area tracing option 'x' to synthesize events for
transactions. This will be used by Intel PT to synthesize
an event record for each TSX start, commit or abort.
Signed-off-by: Adrian Hunter
---
tools/perf/Documentation/perf-inject.txt | 9 +
tools/perf/Documentation/perf-report.tx
Add support for the PERF_RECORD_AUX event type.
Signed-off-by: Adrian Hunter
---
tools/perf/builtin-inject.c | 1 +
tools/perf/util/event.c | 21 +
tools/perf/util/event.h | 13 +
tools/perf/util/machine.c | 10 ++
tools/perf/util/machine.h |
Add build option NO_AUXTRACE to exclude compiling support
for AUX area tracing. Support for both recording and
processing is excluded and by implication any future
additions such as Intel PT and Intel BTS will also not
be compiled in with this option.
Signed-off-by: Adrian Hunter
---
tools/perf/
Add support for decoding an AUX area assuming
it contains instruction tracing data.
Signed-off-by: Adrian Hunter
---
tools/perf/Documentation/perf-report.txt | 27 +++
tools/perf/builtin-report.c | 11 +++
2 files changed, 38 insertions(+)
diff --git
Hi
Here is V3 patches for the introduction of an abstraction for
using the AUX area and Instruction tracing.
The patches can also be found here:
http://git.infradead.org/users/ahunter/linux-perf.git
An example perf.data file and build id archive can be found here:
http://git.in
Reference counting of the mmap buffer does not work
correctly when there is an AUX area mmap also.
In snapshot mode it is not easy to know if the AUX area
mmap buffer contains usefull information. Equally the
evlist does not know if the recording is in sanpshot
mode anyway.
Consequently, for now
Richard Guy Briggs writes:
> On 15/04/22, Richard Guy Briggs wrote:
>> On 15/04/20, Eric W. Biederman wrote:
>> > Richard Guy Briggs writes:
>> >
>> > > The purpose is to track namespace instances in use by logged processes
>> > > from the
>> > > perspective of init_*_ns by logging the namespa
Signed-off-by: Christoph Hellwig
---
block/blk-core.c | 2 --
include/linux/blk_types.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/block/blk-core.c b/block/blk-core.c
index 57da507..4085265 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -1716,8 +1716,6 @@ static void
Since the big barrier rewrite/removal in 2007 we never fail FLUSH or
FUA requests, which means we can remove the magic BIO_EOPNOTSUPP flag
to help propagating those to the buffer_head layer.
Signed-off-by: Christoph Hellwig
---
block/bounce.c| 3 ---
fs/btrfs/disk-io.c| 11 +
Add a debug message to indicate that the build id didn't match.
Signed-off-by: Naveen N. Rao
---
tools/perf/util/symbol-elf.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index b7c533c..6e6ca23 100644
--- a/tools/perf/util/symbol
Christoph Hellwig writes:
> diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
> index c2ee937..b0a5bff 100644
> --- a/include/linux/blk_types.h
> +++ b/include/linux/blk_types.h
> @@ -112,8 +112,6 @@ struct bio {
> * bio flags
> */
> #define BIO_UPTODATE 0 /* ok after
On 04/23/2015 11:53 AM, Daniel J Blueman wrote:
On Thu, Apr 23, 2015 at 6:33 PM, Mel Gorman wrote:
The big change here is an adjustment to the topology_init path that
caused
soft lockups on Waiman and Daniel Blue had reported it was an expensive
function.
Changelog since v2
o Reduce overhead
On Thu, 23 Apr 2015 23:40:01 +0200 Hagen Paul Pfeifer wrote:
> GCC inlining heuristics are sometimes quizzical. Especially with inline
> assembler constructs GCC seems to have issues. A allyesconfig show a rather
> long list of functions where GCC inlining decisions are questionable (not
> inline
Hi,
On Thu, Apr 23, 2015 at 03:37:48PM -0700, David Cohen wrote:
> On Fri, Apr 17, 2015 at 02:43:27PM -0500, Felipe Balbi wrote:
> > On Fri, Apr 17, 2015 at 11:41:56AM -0700, David Cohen wrote:
> > > From: Felipe Balbi
> >
> > missing the required:
> >
> > [ Upstream commit bc5ba2e0b829c9397f96
We give up old_addr hint from the coming patch module in cases when kernel
load base has been randomized (as in such case, the coming module has no
idea about the exact randomization offset).
We are currently too pessimistic, and give up immediately as soon as
CONFIG_RANDOMIZE_BASE is set; this
On Fri, Apr 24, 2015 at 03:47:37PM -0400, Jeff Moyer wrote:
> Any particular reason you elected to leave a hole in the numbering? I
> don't have a preference either way, but I don't think there's any harm
> in compressing it.
This was the simplest way to do it and I'm a lazy bastard.
--
To unsubs
On Fri, Apr 24, 2015 at 12:09 PM, Serge Hallyn wrote:
> Quoting Andy Lutomirski (l...@amacapital.net):
>> On Fri, Apr 24, 2015 at 10:53 AM, Serge Hallyn
>> wrote:
>> > Quoting Christoph Lameter (c...@linux.com):
>> >> On Thu, 9 Apr 2015, Christoph Lameter wrote:
>> >>
>> >> > > I'll submit a new
On Fri, Apr 24, 2015 at 12:59:06PM +0200, Borislav Petkov wrote:
> Yeah, that makes more sense. So I tested Andy's patch but changed it as
> above and I get
>
> $ taskset -c 0 ./sysret_ss_attrs_32
> [RUN] Syscalls followed by SS validation
> [OK]We survived
Andy, you wanted the 64-bit versi
Am Montag, den 20.10.2014, 11:56 +0200 schrieb Richard Weinberger:
> Am 20.10.2014 um 11:51 schrieb Thomas Meyer:
> >> Hmm, does this always happen?
> >
> > Yes, my single core system seems to trigger this every time after resume
> > from ram.
>
> What is your host kernel?
>
> >> At least on my
We give up old_addr hint from the coming patch module in cases when kernel load
base has been randomized (as in such case, the coming module has no idea about
the exact randomization offset).
We are currently too pessimistic, and give up immediately as soon as
CONFIG_RANDOMIZE_BASE is set; this d
On Fri, 24 Apr 2015, Jerome Glisse wrote:
> > Still no answer as to why is that not possible with the current scheme?
> > You keep on talking about pointers and I keep on responding that this is a
> > matter of making the address space compatible on both sides.
>
> So if do that in a naive way, ho
On Fri, 24 Apr 2015 17:58:33 +0800 Gu Zheng wrote:
> Since the change to the cpu <--> mapping (map the cpu to the physical
> node for all possible at the boot), the node of cpu may be not present,
> so we use the best near online node if the node is not present in the low
> level allocation APIs.
On Fri, Apr 24, 2015 at 07:17:45PM +0100, Mark Brown wrote:
> On Thu, Apr 23, 2015 at 03:06:22PM -0300, Jonatas Rech wrote:
>
> > I agree, but please note that this came up while I was trying to fix the
> > full-duplex functionality, and it's a different problem. Fixing this would
> > impact proto
Dear Friend,
I know that this mail will come to you as a surprise since we have not
known or met before now, but please, I would like you to treat it like
blood brother affair and with the urgency and secrecy it requires. I
am Mr. Hassan Alwan Ali, an Audit staff of (C.B.N) Central Bank of
Nigeria
On Fri, 24 Apr 2015, Andy Lutomirski wrote:
> That's sort of what my patch does -- you need CAP_SETPCAP to switch
> the securebit.
>
> But Christoph's patch required it to add caps to the ambient set, right?
Yes but you seem to be just adding one additional step without too much of
a benefit beca
On Fri, Apr 24, 2015 at 12:49:05PM -0700, Andrew Morton wrote:
> On Thu, 23 Apr 2015 23:40:01 +0200 Hagen Paul Pfeifer wrote:
>
> > GCC inlining heuristics are sometimes quizzical. Especially with inline
> > assembler constructs GCC seems to have issues. A allyesconfig show a rather
> > long list
On Friday 24 April 2015 11:58:31 Frederic Weisbecker wrote:
> From: Chris Metcalf
>
> nohz_full is only useful with isolcpus also set, since otherwise the
> scheduler has to run periodically to try to determine whether to steal
> work from other cores.
>
> Accordingly, when booting with nohz_full=
On Fri, Apr 24, 2015 at 1:13 PM, Christoph Lameter wrote:
> On Fri, 24 Apr 2015, Andy Lutomirski wrote:
>
>> That's sort of what my patch does -- you need CAP_SETPCAP to switch
>> the securebit.
>>
>> But Christoph's patch required it to add caps to the ambient set, right?
>
> Yes but you seem to
On Thu, Apr 23, 2015 at 7:15 PM, Andy Lutomirski wrote:
> AMD CPUs don't reinitialize the SS descriptor on SYSRET, so SYSRET
> with SS == 0 results in an invalid usermode state in which SS is
> apparently equal to __USER_DS but causes #SS if used.
>
> Work around the issue by replacing NULL SS val
On Fri, Apr 24, 2015 at 12:45:42PM +0300, Pantelis Antoniou wrote:
> A throw once master enable switch to protect against any
> further overlay applications if the administrator desires so.
>
> Signed-off-by: Pantelis Antoniou
> ---
> drivers/of/overlay.c | 45 +++
On Fri, 2015-04-24 at 11:34 -0700, six...@microsoft.com wrote:
> From: Simon Xiao
>
> 1. Introduce netif-msg to netvsc to control debug logging output
> and keep msg_enable in netvsc_device_context so that it is
> kept persistently.
> 2. Only call dump_rndis_message() when NETIF_MSG_RX_ERR or abo
On Mon, Apr 6, 2015 at 9:15 AM, Javier Martinez Canillas
wrote:
> Commit 1b84f2a4cd4a ("mfd: cros_ec: Use fixed size arrays to transfer
> data with the EC") modified the struct cros_ec_command fields to not
> use pointers for the input and output buffers and use fixed length
> arrays instead.
>
>
On Fri, Apr 24, 2015 at 12:45:44PM +0300, Pantelis Antoniou wrote:
> Documentation ABI entry for overlays sysfs entries.
>
> Signed-off-by: Pantelis Antoniou
> ---
> .../ABI/testing/sysfs-firmware-devicetree-overlays | 23
> ++
> 1 file changed, 23 insertions(+)
> create mo
Christoph Hellwig writes:
> Since the big barrier rewrite/removal in 2007 we never fail FLUSH or
> FUA requests, which means we can remove the magic BIO_EOPNOTSUPP flag
> to help propagating those to the buffer_head layer.
I had a look through the kernel, checking for places where maybe we were
On Fri, Apr 24, 2015 at 03:00:18PM -0500, Christoph Lameter wrote:
> On Fri, 24 Apr 2015, Jerome Glisse wrote:
>
> > > Still no answer as to why is that not possible with the current scheme?
> > > You keep on talking about pointers and I keep on responding that this is a
> > > matter of making the
On Fri, Apr 24, 2015 at 01:37:34AM +0200, Richard Weinberger wrote:
> On Fri, Apr 24, 2015 at 1:19 AM, Andrew Morton
> wrote:
> > On Thu, 23 Apr 2015 16:04:18 -0700 Mark Fasheh wrote:
> >
> >> > This code needs some pretty serious rework and rethink, perhaps
> >> > involving a change to the emitt
Christoph Hellwig writes:
> On Fri, Apr 24, 2015 at 03:47:37PM -0400, Jeff Moyer wrote:
>> Any particular reason you elected to leave a hole in the numbering? I
>> don't have a preference either way, but I don't think there's any harm
>> in compressing it.
>
> This was the simplest way to do it
Em Fri, Apr 24, 2015 at 10:29:42PM +0300, Adrian Hunter escreveu:
> Hi
>
> Here is V3 patches for the introduction of an abstraction for
> using the AUX area and Instruction tracing.
>
> The patches can also be found here:
>
> http://git.infradead.org/users/ahunter/linux-perf.git
>
> An e
On Fri, Apr 24, 2015 at 12:45:42PM +0300, Pantelis Antoniou wrote:
> A throw once master enable switch to protect against any
> further overlay applications if the administrator desires so.
>
> Signed-off-by: Pantelis Antoniou
> ---
> drivers/of/overlay.c | 45 +++
On 24 April 2015 at 21:49, Andrew Morton wrote:
> I can't reproduce this with either gcc-4.8.2 or gcc-4.4.4. The patch
> makes zero difference to `size vmlinux' and a bit of poking around with
> nm doesn't show any out-of-lined versions of the functions you
> identify.
>
> So. More details, plea
On Fri, 2015-04-24 at 13:54 -0400, Waiman Long wrote:
> This patch also checks one more time in __rwsem_do_wake() to see if
> the rwsem was stolen just before doing the expensive wakeup operation
> which will be unnecessary if the lock was stolen.
It strikes me that this should be another patch, a
d_inode() annotations from David Howells (sat in for-next since
before the beginning of merge window) + four assorted fixes. FWIW,
the only things here that had been worked on during the merge window are
regression fix for 9p readdir breakage and unlazy_walk() misuse fix...
Please
On 24 April 2015 at 22:13, Paul E. McKenney wrote:
Hey Paul,
> Hmmm... allyesconfig would have PROVE_RCU=y, which would mean that the
> above two would contain lockdep calls that might in some cases defeat
> inlining. With the more typical production choice of PROVE_RCU=n, I would
> expect the
On 4/23/15 12:02, Rafael J. Wysocki wrote:
On Thursday, April 23, 2015 04:32:25 PM Suthikulpanit, Suravee wrote:
>Mika/Rafael,
>
>If there are no other concerns about this patch series, do you think this
>ready to be pushed to linux-next tree along with the rest of the ARM64
>ACPI patch series
On Fri, Apr 24, 2015 at 10:21 PM, Andy Lutomirski wrote:
> On Thu, Apr 23, 2015 at 7:15 PM, Andy Lutomirski wrote:
>> AMD CPUs don't reinitialize the SS descriptor on SYSRET, so SYSRET
>> with SS == 0 results in an invalid usermode state in which SS is
>> apparently equal to __USER_DS but causes
On Fri, Apr 24, 2015 at 1:46 PM, Denys Vlasenko
wrote:
> On Fri, Apr 24, 2015 at 10:21 PM, Andy Lutomirski wrote:
>> On Thu, Apr 23, 2015 at 7:15 PM, Andy Lutomirski wrote:
>>> AMD CPUs don't reinitialize the SS descriptor on SYSRET, so SYSRET
>>> with SS == 0 results in an invalid usermode stat
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