Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-25 Thread Li, Aubrey
On 2018/11/18 22:03, Samuel Neves wrote: > On 11/17/18 12:36 AM, Li, Aubrey wrote: >> On 2018/11/17 7:10, Dave Hansen wrote: >>> Just to be clear: there are 3 AVX-512 XSAVE states: >>> >>> XFEATURE_OPMASK, >>> XFEATURE_ZMM_Hi256, >>> XFEATURE_Hi16_ZMM, >>> >>> I honestly

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-20 Thread Samuel Neves
On Tue, Nov 20, 2018 at 1:32 PM Li, Aubrey wrote: > Thanks for your program, Samuel, it's very helpful. But I saw a different > output on my side, May I have your glibc version? > This system is running glibc 2.27, and kernel 4.18.7. The Xeon Gold 5120 also happens to be one of the Skylake-SP mod

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-20 Thread Li, Aubrey
On 2018/11/18 22:03, Samuel Neves wrote: > On 11/17/18 12:36 AM, Li, Aubrey wrote: >> On 2018/11/17 7:10, Dave Hansen wrote: >>> Just to be clear: there are 3 AVX-512 XSAVE states: >>> >>> XFEATURE_OPMASK, >>> XFEATURE_ZMM_Hi256, >>> XFEATURE_Hi16_ZMM, >>> >>> I honestly

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-18 Thread Samuel Neves
On 11/17/18 12:36 AM, Li, Aubrey wrote: > On 2018/11/17 7:10, Dave Hansen wrote: >> Just to be clear: there are 3 AVX-512 XSAVE states: >> >> XFEATURE_OPMASK, >> XFEATURE_ZMM_Hi256, >> XFEATURE_Hi16_ZMM, >> >> I honestly don't know what XFEATURE_OPMASK does. It does not

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-16 Thread Li, Aubrey
On 2018/11/17 7:10, Dave Hansen wrote: > On 11/15/18 4:21 PM, Li, Aubrey wrote: >> "Core cycles where the core was running with power delivery for license >> level 2 (introduced in Skylake Server microarchitecture). This includes >> high current AVX 512-bit instructions." >> >> I translated license

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-16 Thread Dave Hansen
On 11/15/18 4:21 PM, Li, Aubrey wrote: > "Core cycles where the core was running with power delivery for license > level 2 (introduced in Skylake Server microarchitecture). This includes > high current AVX 512-bit instructions." > > I translated license level 2 to frequency drop. BTW, the "high"

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-15 Thread Dave Hansen
On 11/15/18 4:21 PM, Li, Aubrey wrote: > On 2018/11/15 23:40, Dave Hansen wrote: >> On 11/14/18 3:00 PM, Aubrey Li wrote: >>> AVX-512 component has 3 states, only Hi16_ZMM state causes notable >>> frequency drop. Add per task Hi16_ZMM state tracking to context switch. >> >> Just curious, but is the

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-15 Thread Li, Aubrey
On 2018/11/15 23:40, Dave Hansen wrote: > On 11/14/18 3:00 PM, Aubrey Li wrote: >> AVX-512 component has 3 states, only Hi16_ZMM state causes notable >> frequency drop. Add per task Hi16_ZMM state tracking to context switch. > > Just curious, but is there any public documentation of this? It seem

Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks

2018-11-15 Thread Dave Hansen
On 11/14/18 3:00 PM, Aubrey Li wrote: > AVX-512 component has 3 states, only Hi16_ZMM state causes notable > frequency drop. Add per task Hi16_ZMM state tracking to context switch. Just curious, but is there any public documentation of this? It seems really odd to me that something using the same