On 2018/11/15 23:40, Dave Hansen wrote: > On 11/14/18 3:00 PM, Aubrey Li wrote: >> AVX-512 component has 3 states, only Hi16_ZMM state causes notable >> frequency drop. Add per task Hi16_ZMM state tracking to context switch. > > Just curious, but is there any public documentation of this? It seems > really odd to me that something using the same AVX-512 instructions on > some low-numbered registers would behave differently than the same > instructions on some high-numbered registers. I'm not saying this is > wrong, but it's certainly counter-intuitive and I think that begs for > some more explanation.
Yes, Intel 64 and IA-32 Architectures software developer's Manual mentioned this in performance event CORE_POWER.LVL2_TURBO_LICENSE. "Core cycles where the core was running with power delivery for license level 2 (introduced in Skylake Server microarchitecture). This includes high current AVX 512-bit instructions." I translated license level 2 to frequency drop. Thanks, -Aubrey
