Re: [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella

2014-11-08 Thread Olof Johansson
On Fri, Nov 07, 2014 at 07:44:16AM +0100, Michal Simek wrote: > On 11/06/2014 06:22 PM, Andreas Färber wrote: > > The Parallella board comes with a U-Boot bootloader that loads one of > > two predefined FPGA bitstreams before booting the kernel. Both define an > > AXI interface to the on-board Epip

Re: [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella

2014-11-06 Thread Michal Simek
On 11/06/2014 06:22 PM, Andreas Färber wrote: > The Parallella board comes with a U-Boot bootloader that loads one of > two predefined FPGA bitstreams before booting the kernel. Both define an > AXI interface to the on-board Epiphany processor. > > Enable clocks FCLK0..FCLK3 for the Programmable L

Re: [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella

2014-11-06 Thread Andreas Färber
Hi Sören, Am 06.11.2014 um 18:33 schrieb Sören Brinkmann: > On Thu, 2014-11-06 at 06:22PM +0100, Andreas Färber wrote: >> The Parallella board comes with a U-Boot bootloader that loads one of >> two predefined FPGA bitstreams before booting the kernel. Both define an >> AXI interface to the on-boa

Re: [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella

2014-11-06 Thread Sören Brinkmann
Hi Andreas, On Thu, 2014-11-06 at 06:22PM +0100, Andreas Färber wrote: > The Parallella board comes with a U-Boot bootloader that loads one of > two predefined FPGA bitstreams before booting the kernel. Both define an > AXI interface to the on-board Epiphany processor. > > Enable clocks FCLK0..FC