> > Yes, that makes sense.
> > But on the machine, I see IBRS bit set on all cores. As you said,
> > someone else might be writing the MSR. I will try to find that out and will
> update the patch accordingly.
> >
> > I initially suspected it to be __ssb_select_mitigation() as I have
> > "spec_store
On Tue, 31 Jul 2018, Prakhya, Sai Praneeth wrote:
> > The feature strings are automatically generated from the define. The comment
> > can be used to supress them by an empty "" string or to modify them by a
> > "override" string at the beginning of the comment.
>
> I overlooked "override" part.
> The feature strings are automatically generated from the define. The comment
> can be used to supress them by an empty "" string or to modify them by a
> "override" string at the beginning of the comment.
I overlooked "override" part. Sorry! about that.
It's clear now. Thanks for the explanation
On Tue, 31 Jul 2018, Prakhya, Sai Praneeth wrote:
> > > +#define X86_FEATURE_IBRS_ENHANCED( 7*32+29) /*
> > "ibrs_enhanced" Use Enhanced IBRS in kernel */
> >
> > That "ibrs_enhanced" part is not needed.
>
> Just wanted to confirm with you before removing it,
> Presently, on plat
> There is no reason not to use indentation and quotation marks in a changelog.
> Squeezing it into square brackets does not really improve readability.
>
> From the specification [1]:
>
> "With enhanced IBRS, the predicted targets of indirect branches executed
>cannot be controlled by sof
On Mon, 30 Jul 2018, Sai Praneeth Prakhya wrote:
> Some future Intel processors may support "Enhanced IBRS" which is an
Future Intel processors will support ...
> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
> never disabled.
>
> [With enhanced IBRS, the predicted targets
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