> "Manfred" == Manfred Spraul <[EMAIL PROTECTED]> writes:
Manfred> First of all HW_CACHEALIGN aligns to the L1 cache, not
Manfred> SMP_CACHE_BYTES. Additionally you sometimes need a
Manfred> guaranteed alignment for other problems, afaik ARM needs 1024
Manfred> bytes for some structures due
From: "Jes Sorensen" <[EMAIL PROTECTED]>
> > "Manfred" == Manfred Spraul <[EMAIL PROTECTED]> writes:
>
> Manfred> Mark Hemment wrote:
> >> As no one uses the feature it could well be broken, but is that a
> >> reason to change its meaning?
>
> Manfred> Some hardware drivers use HW_CACHEALIGN a
> "Manfred" == Manfred Spraul <[EMAIL PROTECTED]> writes:
Manfred> Mark Hemment wrote:
>> As no one uses the feature it could well be broken, but is that a
>> reason to change its meaning?
Manfred> Some hardware drivers use HW_CACHEALIGN and assume certain
Manfred> byte alignments, and arm n
Mark Hemment wrote:
>
> > > Hmm, no that note, seen the L1 line size defined for a Pentium ?
> > > 128 bytes!! (CONFIG_X86_L1_CACHE_SHIFT of 7). That is probably going to
> > > waste a lot of space for small objects.
> > >
> > No, it doesn't:
> > HWCACHE_ALIGN means "do not cross a cache l
On Fri, 2 Mar 2001, Manfred Spraul wrote:
> Zitiere Mark Hemment <[EMAIL PROTECTED]>:
> > Could be a win on archs with small L1 cache line sizes (16bytes on a
> > 486) - but most modern processors have larger lines.
>
> IIRC cache colouring was introduced for some sun hardware with 2 memory bus
Zitiere Mark Hemment <[EMAIL PROTECTED]>:
>
>
> > In which cases an offset > alignment is really a win?
>
> You've got me. :) I don't know.
> In the Bonwick paper, such a facility was described, so I thought
> "hey,
> sounds like that might be useful".
> Could be a win on archs with sma
On Thu, 1 Mar 2001, Manfred Spraul wrote:
> Yes, I see the difference, but I'm not sure that it will work as
> intended.
> offset must be a multiple of the alignment, everything else won't work.
The code does force the offset to be a multiple of the alignment -
rounding the offset up. The ide
Mark Hemment wrote:
>
> On Thu, 1 Mar 2001, Manfred Spraul wrote:
>
> > Mark Hemment wrote:
> > >
> > > The original idea behind offset was for objects with a "hot" area
> > > greater than a single L1 cache line. By using offset correctly (and to my
> > > knowledge it has never been used anyw
On Thu, 1 Mar 2001, Manfred Spraul wrote:
> Mark Hemment wrote:
> >
> > The original idea behind offset was for objects with a "hot" area
> > greater than a single L1 cache line. By using offset correctly (and to my
> > knowledge it has never been used anywhere in the Linux kernel), a SLAB
>
Mark Hemment wrote:
>
> The original idea behind offset was for objects with a "hot" area
> greater than a single L1 cache line. By using offset correctly (and to my
> knowledge it has never been used anywhere in the Linux kernel), a SLAB
> cache creator (caller of kmem_cache_create()) could a
"David S. Miller" wrote:
>
> Manfred, why are you changing the cache alignment to
> SMP_CACHE_BYTES? If you read the original SLAB papers
> and other documents, the code intends to color the L1
> cache not the L2 or subsidiary caches.
>
I'll undo that change.
I only found this comment in the so
On Thu, 1 Mar 2001, Manfred Spraul wrote:
> Alan added a CONFIG options for FORCED_DEBUG slab debugging, but there
> is one minor problem with FORCED_DEBUG: FORCED_DEBUG disables
> HW_CACHEALIGN, and several drivers assume that HW_CACHEALIGN implies a
> certain alignment (iirc usb/uhci.c assumes
Manfred, why are you changing the cache alignment to
SMP_CACHE_BYTES? If you read the original SLAB papers
and other documents, the code intends to color the L1
cache not the L2 or subsidiary caches.
Later,
David S. Miller
[EMAIL PROTECTED]
-
To unsubscribe from this list: send the line "unsubs
Alan added a CONFIG options for FORCED_DEBUG slab debugging, but there
is one minor problem with FORCED_DEBUG: FORCED_DEBUG disables
HW_CACHEALIGN, and several drivers assume that HW_CACHEALIGN implies a
certain alignment (iirc usb/uhci.c assumes 16-byte alignment)
I've attached a patch that fixe
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