Richard B. Johnson wrote:
> Woof... More GAWDAUFULL junk. You mean that if I write 0xff to the R/W
> interrupt line register and read it back, it's only 0x0f?
Yes, and that disables generation of audio interrupts.
> This didn't
> save any money. There are only 4 interrupt 'pins', i.e., inte
On Mon, 30 Apr 2001, Jeff Garzik wrote:
> "Richard B. Johnson" wrote:
> > Observe that the PCI DWORD (long) register at DWORD offset 15 consists
> > of 4 byte-wide registers (from the PCI specification), Max_lat, Min_Gnt,
> > Interrupt pin, and interrupt line. Nothing has to fit into 4 bits, you
"Richard B. Johnson" wrote:
> Observe that the PCI DWORD (long) register at DWORD offset 15 consists
> of 4 byte-wide registers (from the PCI specification), Max_lat, Min_Gnt,
> Interrupt pin, and interrupt line. Nothing has to fit into 4 bits, you
> have 8 bits. I haven't looked at the Linux cod
On Mon, 30 Apr 2001, Greg Hosler wrote:
> The AC'97 has an IRQ register which allows for IRQ's 1, and 3 thru 14
> (page 107 of the VT82C686 datasheet, under section "Offset 3C, Interrupt Line")
>
> The problem I'm seeing is that on a SMB machine, the IRQ's get reassigned by
> the I/O APIC code,
The AC'97 has an IRQ register which allows for IRQ's 1, and 3 thru 14
(page 107 of the VT82C686 datasheet, under section "Offset 3C, Interrupt Line")
The problem I'm seeing is that on a SMB machine, the IRQ's get reassigned by
the I/O APIC code, and my AC'97 gets assigned an IRQ of 18 (which won'
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