Richard B. Johnson wrote:
> Woof... More GAWDAUFULL junk. You mean that if I write 0xff to the R/W
> interrupt line register and read it back, it's only 0x0f?
Yes, and that disables generation of audio interrupts.
> This didn't
> save any money. There are only 4 interrupt 'pins', i.e., interrupt lines
> that go to the PCI bus (A thru D). What these lines connect to for
> actual IRQs is known only to the motherboard manufacturer hence the
> BIOS has to check the pin value and write the appropriate IRQ value
> into the interrupt line register. This register is used only as a
> scratch-pad so that a driver "knows" what IRQ goes to the board. The
> board, itself, never accesses this register. The board only gets one
> interrupt connected (A thru D), and to the board, all interrupts are
> the same.
I'm currently writing the BIOS for a PowerPC embedded system using the
686B southbridge. On the 686 the 8259 interrupt controller and the
audio system are inside the same physical device. The value you write to
offset 0x3c actually makes the internal connection between the audio
interrupt and the PIC. There is a trick to route that interrupt to an
external APIC involving config register 0x58 in function 0, but I've not
used it.
Most southbridge functions work this way. The USB on the 686B is like
this, and the the IDE controller always generates the legacy IRQ 14/15.
- Adrian Cox
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