Re: [Xen-devel] [V1 PATCH 2/2] PVH: set EFER.NX and EFER.SCE for secondary vcpus

On 27/08/14 23:33, Mukesh Rathor wrote: > This patch addresses three things for a pvh secondary vcpu: I don't understand why you have separated this into two patches. Please fold into one. > Please note: We create a new glue assembly entry point because the > secondary vcpus come up on kernel pa

[V1 PATCH 2/2] PVH: set EFER.NX and EFER.SCE for secondary vcpus

This patch addresses three things for a pvh secondary vcpu: - NX bug on intel: It was recenlty discovered that NX is not being honored in PVH on intel since EFER.NX is not being set. The pte.NX bits are ignored if EFER.NX is not set on intel. - PVH boot hang on newer xen: Following c