Re: [PATCH 2/3] fpga: altera-cvp: Preparation for V2 parts.

On 7/14/19 1:46 PM, Moritz Fischer wrote: Hi Thor, On Thu, Jul 11, 2019 at 03:32:49PM -0500, thor.tha...@linux.intel.com wrote: From: Thor Thayer In preparation for adding newer V2 parts that use a FIFO, reorganize altera_cvp_chk_error() and change the write function to block based. V2 parts

Re: [PATCH 2/3] fpga: altera-cvp: Preparation for V2 parts.

Hi Thor, On Thu, Jul 11, 2019 at 03:32:49PM -0500, thor.tha...@linux.intel.com wrote: > From: Thor Thayer > > In preparation for adding newer V2 parts that use a FIFO, > reorganize altera_cvp_chk_error() and change the write > function to block based. > V2 parts have a block size matching the FI

[PATCH 2/3] fpga: altera-cvp: Preparation for V2 parts.

From: Thor Thayer In preparation for adding newer V2 parts that use a FIFO, reorganize altera_cvp_chk_error() and change the write function to block based. V2 parts have a block size matching the FIFO while older V1 parts write a 32 bit word at a time. Signed-off-by: Thor Thayer --- drivers/fp