Re: [PATCH] x86/centaur: Mark TSC invariant

2018-01-24 Thread Alan Cox
On Mon, 15 Jan 2018 09:35:45 +0800 TimGuo wrote: > Centaur CPU has a constant frequency TSC and that TSC does not stop in > C-States. > But because the flags are not set for that CPU, the TSC is treated as non > constant > frequency and assumed to stop in C-States, which makes it an unreliable

[PATCH] x86/centaur: Mark TSC invariant

2018-01-22 Thread davidwang
Centaur CPU has a constant frequency TSC and that TSC does not stop in C-States. But because the flags are not set for that CPU, the TSC is treated as not constant frequency and assumed to stop in C-States, which makes it an unreliable and unusable clock source. Setting those flags tells the kernel

Re: [PATCH] x86/centaur: Mark TSC invariant

2018-01-15 Thread Thomas Gleixner
On Mon, 15 Jan 2018, TimGuo wrote: > Centaur CPU has a constant frequency TSC and that TSC does not stop in > C-States. > But because the flags are not set for that CPU, the TSC is treated as non > constant > frequency and assumed to stop in C-States, which makes it an unreliable and > unusable

[PATCH] x86/centaur: Mark TSC invariant

2018-01-14 Thread TimGuo
Centaur CPU has a constant frequency TSC and that TSC does not stop in C-States. But because the flags are not set for that CPU, the TSC is treated as non constant frequency and assumed to stop in C-States, which makes it an unreliable and unusable clock source. Setting those flags tells the kern

Re: [PATCH] x86/centaur: Mark TSC invariant

2018-01-14 Thread Thomas Gleixner
On Wed, 10 Jan 2018, TimGuo wrote: Please be more careful when sending patches. The subject line of you mail was empty Also this patch was copy pasted or whatever into the mail and got white space damaged by your mail client, so it does not apply. See Documentation/process/email-clients.txt