> On Thu, Jun 29, 2017 at 03:50:29PM +, Liang, Kan wrote:
> >
> >
> > >
> > > On Thu, Jun 29, 2017 at 03:31:45PM +, Liang, Kan wrote:
> > >
> > > SNIP
> > >
> > > > > > static int intel_pt_recording_options(struct auxtrace_record *itr,
> > > > > > struct
On Thu, Jun 29, 2017 at 03:50:29PM +, Liang, Kan wrote:
>
>
> >
> > On Thu, Jun 29, 2017 at 03:31:45PM +, Liang, Kan wrote:
> >
> > SNIP
> >
> > > > > static int intel_pt_recording_options(struct auxtrace_record *itr,
> > > > > struct perf_evlist *e
>
> On Thu, Jun 29, 2017 at 03:31:45PM +, Liang, Kan wrote:
>
> SNIP
>
> > > > static int intel_pt_recording_options(struct auxtrace_record *itr,
> > > > struct perf_evlist *evlist,
> > > > struct record_opts *opt
On Thu, Jun 29, 2017 at 03:31:45PM +, Liang, Kan wrote:
SNIP
> > > static int intel_pt_recording_options(struct auxtrace_record *itr,
> > > struct perf_evlist *evlist,
> > > struct record_opts *opts)
> > > @@ -701,6 +717,8 @@ st
> On Wed, Jun 28, 2017 at 10:31:53AM -0400, kan.li...@intel.com wrote:
> > From: Kan Liang
> >
> > An earlier kernel patch allowed enabling PT and LBR at the same time
> > on Goldmont.
> > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
> > if the core supports it") Howeve
On Wed, Jun 28, 2017 at 10:31:53AM -0400, kan.li...@intel.com wrote:
> From: Kan Liang
>
> An earlier kernel patch allowed enabling PT and LBR at the same
> time on Goldmont.
> commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR
> exclusivity if the core supports it")
> However, users sti
From: Kan Liang
An earlier kernel patch allowed enabling PT and LBR at the same
time on Goldmont.
commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR
exclusivity if the core supports it")
However, users still cannot use Intel PT and LBRs simultaneously.
$ sudo perf record -e cycles,in
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