From: Kan Liang <kan.li...@intel.com>

An earlier kernel patch allowed enabling PT and LBR at the same
time on Goldmont. 
commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR
exclusivity if the core supports it")
However, users still cannot use Intel PT and LBRs simultaneously.
    $ sudo perf record -e cycles,intel_pt//u -b  -- sleep 1
    Error:
    PMU Hardware doesn't support sampling/overflow-interrupts.

PT implicitly adds dummy event in perf tool. dummy event is
software event which doesn't support LBR.

Always setting branch_type=no for dummy event in Intel PT.

Signed-off-by: Kan Liang <kan.li...@intel.com>
---
 tools/perf/arch/x86/util/intel-pt.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/tools/perf/arch/x86/util/intel-pt.c 
b/tools/perf/arch/x86/util/intel-pt.c
index f630de0..651ab9e 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -544,6 +544,22 @@ static int intel_pt_validate_config(struct perf_pmu 
*intel_pt_pmu,
                                        evsel->attr.config);
 }
 
+static int add_no_lbr_config_term(struct list_head *config_terms)
+{
+       struct perf_evsel_config_term *lbr_term;
+
+       lbr_term = zalloc(sizeof(*lbr_term));
+       if (!lbr_term)
+               return -ENOMEM;
+
+       INIT_LIST_HEAD(&lbr_term->list);
+       lbr_term->type = PERF_EVSEL__CONFIG_TERM_BRANCH;
+       lbr_term->val.branch = strdup("no");
+       list_add_tail(&lbr_term->list, config_terms);
+
+       return 0;
+}
+
 static int intel_pt_recording_options(struct auxtrace_record *itr,
                                      struct perf_evlist *evlist,
                                      struct record_opts *opts)
@@ -701,6 +717,8 @@ static int intel_pt_recording_options(struct 
auxtrace_record *itr,
                                perf_evsel__set_sample_bit(switch_evsel, TIME);
                                perf_evsel__set_sample_bit(switch_evsel, CPU);
 
+                               
add_no_lbr_config_term(&switch_evsel->config_terms);
+
                                opts->record_switch_events = false;
                                ptr->have_sched_switch = 3;
                        } else {
@@ -760,6 +778,7 @@ static int intel_pt_recording_options(struct 
auxtrace_record *itr,
                        /* And the CPU for switch events */
                        perf_evsel__set_sample_bit(tracking_evsel, CPU);
                }
+               add_no_lbr_config_term(&tracking_evsel->config_terms);
        }
 
        /*
-- 
2.9.4

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