-kernel@vger.kernel.org
Cc: Gong, Richard
Subject: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region
From: Richard Gong
This is 5th submission of Intel service layer and FPGA patches, which includes
the missing standalone patch in the 4th submission.
This submission includes
Hi Moritz,
On 3/30/21 11:15 AM, Moritz Fischer wrote:
Hi Richard,
On Tue, Mar 30, 2021 at 09:33:05AM -0500, richard.g...@linux.intel.com wrote:
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of
Hi David,
On 3/30/21 9:19 AM, David Laight wrote:
From: richard.g...@linux.intel.com
Sent: 30 March 2021 15:33
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of Intel service layer
driver's client, can decide whether t
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of Intel service layer
driver's client, can decide whether to handle the newly added bitstream
authentication function based on the retrieved fir
From: Richard Gong
Hi Greg,
Please take this stratix10-svc patch, which has been reviewed on the
mailing list and applied cleanly on current linux-next and
char-misc-testing.
Thanks,
Richard
Richard Gong (1):
firmware: stratix10-svc: extend SVC driver to get the firmware version
drivers
diff --git a/MAINTAINERS b/MAINTAINERS
index 67b104202602..00828de0a7bc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9266,6 +9266,7 @@ F:tools/power/x86/intel-speed-select/
INTEL STRATIX10 FIRMWARE DRIVERS
M:Richard Gong
+R: Tom RixL: linux-kernel@vger.kernel.or
tristate "Intel Stratix10 Service Layer"
- depends on ARCH_INTEL_SOCFPGA && HAVE_ARM_SMCCC
+ depends on ARCH_INTEL_SOCFPGA && ARM64 && HAVE_ARM_SMCCC
default n
help
Intel Stratix10 service layer runs at privileged exception level,
Acked-by: Richard Gong
Regards,
Richard
Hi Tom,
On 3/22/21 8:53 AM, Tom Rix wrote:
On 3/21/21 2:05 PM, Richard Gong wrote:
Hi Tom >>
On 3/19/21 4:22 PM, Richard Gong wrote:
Hi Moritz,
Thanks for approving the 1st patch of my version 5 patchest, which submitted on
02/09/21.
This change
e23bd83368af (&qu
On 3/22/21 7:41 AM, Krzysztof Kozlowski wrote:
On 22/03/2021 13:58, Richard Gong wrote:
On 3/22/21 3:26 AM, Krzysztof Kozlowski wrote:
On 21/03/2021 22:09, Arnd Bergmann wrote:
On Sun, Mar 21, 2021 at 7:46 PM Krzysztof Kozlowski
wrote:
The Stratix10 service layer and RCU drivers are
On 3/22/21 3:26 AM, Krzysztof Kozlowski wrote:
On 21/03/2021 22:09, Arnd Bergmann wrote:
On Sun, Mar 21, 2021 at 7:46 PM Krzysztof Kozlowski
wrote:
The Stratix10 service layer and RCU drivers are useful only on
Stratix10, so on ARMv8. Compile testing the RCU driver on 32-bit ARM
fails:
Hi Tom,
On 3/19/21 4:22 PM, Richard Gong wrote:
Hi Moritz,
Thanks for approving the 1st patch of my version 5 patchest, which submitted on
02/09/21.
This change
e23bd83368af ("firmware: stratix10-svc: fix kernel-doc markups")
This patch e23bd83368af is not from my versi
, 2021 4:20 PM
To: m...@kernel.org; t...@redhat.com; gre...@linuxfoundation.org;
linux-f...@vger.kernel.org; linux-kernel@vger.kernel.org
Cc: Gong, Richard
Subject: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region
From: Richard Gong
This is 5th submission of Intel service layer
-f...@vger.kernel.org; linux-kernel@vger.kernel.org
Cc: Gong, Richard
Subject: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region
From: Richard Gong
This is 5th submission of Intel service layer and FPGA patches, which includes
the missing standalone patch in the 4th submission
From: Richard Gong
Clean up COMMAND_RECONFIG_FLAG_PARTIAL flag by resetting it to 0, which
aligns with the firmware settings.
Cc: # 5.9+
Fixes: 36847f9e3e56 ("firmware: stratix10-svc: correct reconfig flag and
timeout values")
Signed-off-by: Richard Gong
---
v3: correct the missi
Hi Tom,
On 2/13/21 9:44 AM, Tom Rix wrote:
On 2/9/21 2:20 PM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Clean up COMMAND_RECONFIG_FLAG_PARTIAL flag by resetting it to 0, which
aligns with the firmware settings.
Fixes: 36847f9e3e56 ("firmware: stratix10-svc: correct rec
From: Richard Gong
Add FPGA_MGR_BITSTREAM_AUTHENTICATE flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Except for the actual configuration of the device, the authentication works
the same way as FPGA configuration does. If the authentication
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v5: no change
v4: add additional checks to make sure *only* authenticate
v3: no change
v2: changed in
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v5: no change
v4: s/FPGA_MGR_BITSTREM_AUTHENTICATION/FPGA_MGR_BITSTREAM_AUTHENTICATE
v3: add handle to retriev the firmware version to keep driver
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of Intel service layer
driver's client, can decide whether to handle the newly added bitstream
authentication function based on the retrieved fir
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bitstream is to make sure a signed
bitstream has the valid signatures.
Except for the actual configuration of the device, the bitstream
authentication works the
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v5: rewrite the description to highlight two things with
authenticate-fpga-config flag
v4: explain
From: Richard Gong
Clean up COMMAND_RECONFIG_FLAG_PARTIAL flag by resetting it to 0, which
aligns with the firmware settings.
Fixes: 36847f9e3e56 ("firmware: stratix10-svc: correct reconfig flag and
timeout values")
Signed-off-by: Richard Gong
---
v5: new add, add the missing standa
From: Richard Gong
This is 5th submission of Intel service layer and FPGA patches, which
includes the missing standalone patch in the 4th submission.
This submission includes additional changes for Intel service layer driver
to get the firmware version running at FPGA SoC device. Then FPGA
Hi Moritz,
On 2/1/21 10:27 PM, Moritz Fischer wrote:
On Mon, Feb 01, 2021 at 09:21:58AM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed
From: Richard Gong
Add FPGA_MGR_BITSTREAM_AUTHENTICATE flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Except for the actual configuration of the device, the authentication works
the same way as FPGA configuration does. If the authentication
From: Richard Gong
This is 4th submission of Intel service layer and FPGA patches.
This submission includes additional changes for Intel service layer driver
to get the firmware version running at FPGA SoC device. Then FPGA manager
driver, one of Intel service layer driver's client, can d
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v4: s/FPGA_MGR_BITSTREM_AUTHENTICATION/FPGA_MGR_BITSTREAM_AUTHENTICATE
v3: add handle to retriev the firmware version to keep driver
back
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bitstream is to make sure a signed
bitstream has the valid signatures.
Except for the actual configuration of the device, the bitstream
authentication works the
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v4: add additional checks to make sure *only* authenticate
v3: no change
v2: changed in alphabetical
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of Intel service layer
driver's client, can decide whether to handle the newly added bitstream
authentication function based on the retrieved fir
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v4: explain authenticate-fpga-config flag further
v3: no change
v2: put authenticate-fpga-config above partial
From: Richard Gong
Clean up COMMAND_RECONFIG_FLAG_PARTIAL flag by resetting it to 0, which
aligns with the firmware settings.
Cc: # 5.9+
Fixes: 36847f9e3e56 ("firmware: correct reconfig flag and timeout values")
Signed-off-by: Richard Gong
---
v2: add tag Cc: # 5.9+
Hi Moritz,
Sorry for the confusion.
On 1/27/21 3:41 PM, Moritz Fischer wrote:
On Wed, Jan 27, 2021 at 07:05:41AM -0600, Richard Gong wrote:
Hi Greg,
Thanks for review!
On 1/27/21 6:04 AM, Greg KH wrote:
On Mon, Jan 25, 2021 at 02:56:23PM -0600, richard.g...@linux.intel.com wrote:
From
From: Richard Gong
This is a bug fix and needs to be backported to stable kernel releases.
Richard Gong (1):
firmware: stratix10-svc: reset COMMAND_RECONFIG_FLAG_PARTIAL to 0
include/linux/firmware/intel/stratix10-svc-client.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
From: Richard Gong
Clean up COMMAND_RECONFIG_FLAG_PARTIAL flag by resetting it to 0, which
aligns with the firmware settings.
Signed-off-by: Richard Gong
---
include/linux/firmware/intel/stratix10-svc-client.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include
Hi Greg,
Thanks for review!
On 1/27/21 6:04 AM, Greg KH wrote:
On Mon, Jan 25, 2021 at 02:56:23PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bitstream is to
Hi Moritz,
On 1/25/21 11:09 PM, Moritz Fischer wrote:
On Mon, Jan 25, 2021 at 02:56:28PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v3: add
Hi Moritz,
On 1/25/21 11:10 PM, Moritz Fischer wrote:
On Mon, Jan 25, 2021 at 02:56:26PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures
On 1/25/21 11:05 PM, Moritz Fischer wrote:
On Mon, Jan 25, 2021 at 02:56:27PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by
Hi Moritz,
On 1/25/21 11:04 PM, Moritz Fischer wrote:
On Mon, Jan 25, 2021 at 02:56:25PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures
Hi Moritz,
Thanks for your reviews!
On 1/25/21 11:01 PM, Moritz Fischer wrote:
Hi Richard,
On Mon, Jan 25, 2021 at 02:56:24PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA
Hi Tom,
On 1/25/21 4:56 PM, Tom Rix wrote:
On 1/25/21 12:56 PM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bitstream is to make sure a signed
bitstream has the valid
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v3: add handle to retriev the firmware version to keep driver
back compatible
v2: use flag defined in stratix10-svc driver
---
drivers/fpga
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v3: no change
v2: changed in alphabetical order
---
drivers/fpga/of-fpga-region.c | 3 +++
1 file
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v3: no change
v2: put authenticate-fpga-config above partial-fpga-config
update commit messages
From: Richard Gong
This is 3rd submission of Intel service layer and FPGA patches.
This submission include additional changes for Intel service layer driver
to get the firmware version running at FPGA SoC device. Then FPGA manager
driver, one of Intel service layer driver's client, can d
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Except for the actual configuration of the device, the authentication works
the same way as FPGA configuration does. If the authentication
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bitstream is to make sure a signed
bitstream has the valid signatures.
Except for the actual configuration of the device, the bitstream
authentication works the
From: Richard Gong
Extend Intel service layer driver to get the firmware version running at
FPGA device. Therefore FPGA manager driver, one of Intel service layer
driver's client, can decide whether to handle the newly added bitstream
authentication function based on the retrieved fir
From: Richard Gong
This is 2nd submission of Intel service layer and FPGA patches.
The customer wants to verify that a FPGA bitstream can be started properly
before saving the bitstream to the QSPI flash memory.
Bitstream authentication makes sure a signed bitstream has valid signatures.
The
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Except for the actual configuration of the device, the authentication works
the same way as FPGA configuration does. If the authentication
Hi Greg,
On 12/14/20 8:05 AM, Greg KH wrote:
On Mon, Dec 14, 2020 at 08:03:07AM -0600, Richard Gong wrote:
Hi Moritz, Greg,
Sorry for asking.
Any comment on Intel service layer and FPGA patches submitted on 11/18/20?
I don't see them in my review queue, sorry.
I just re-submitte
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v2: changed in alphabetical order
---
drivers/fpga/of-fpga-region.c | 3 +++
1 file changed, 3
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bistream is to make sure a signed
bitstream has the valid signatures.
Except for the actual configuration of the device, the bitstream
authentication works the
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v2: use flag defined in stratix10-svc driver
---
drivers/fpga/stratix10-soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/fpga
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v2: put authenticate-fpga-config above partial-fpga-config
update commit messages
---
Documentation
Hi Moritz, Greg,
Sorry for asking.
Any comment on Intel service layer and FPGA patches submitted on 11/18/20?
Regards,
Richard
On 11/18/20 8:29 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
This is 2nd submission of Intel service layer and FPGA patches.
The customer wants
Hi Moritz,
On 12/1/20 1:19 PM, Moritz Fischer wrote:
Hi Richard,
On Tue, Dec 01, 2020 at 01:30:16PM -0600, Richard Gong wrote:
Can U-Boot determine whether it's the new or old flow? Can you set a
different compatible value in your device-tree, to disambiguate
behaviors?
The boot fl
Hi Moritz,
On 11/30/20 10:31 PM, Moritz Fischer wrote:
Hi Richard,
On Mon, Nov 30, 2020 at 12:55:44PM -0600, Richard Gong wrote:
Hi Moritz,
Sorry for late reply, I was out last week.
No worries, usually I'm late with replies ;-)
On 11/21/20 7:10 PM, Moritz Fischer wrote:
Richard
Hi Moritz,
Sorry for late reply, I was out last week.
On 11/21/20 7:10 PM, Moritz Fischer wrote:
Richard,
On Wed, Nov 18, 2020 at 12:16:09PM -0600, Richard Gong wrote:
-#define COMMAND_RECONFIG_FLAG_PARTIAL 1
+#define COMMAND_RECONFIG_FLAG_PARTIAL 0
+#define
Hi Moritz,
On 11/18/20 9:30 AM, Moritz Fischer wrote:
On Wed, Nov 18, 2020 at 08:29:09AM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bistream is to make sure a
From: Richard Gong
This is 2nd submission of Intel service layer and FPGA patches.
The customer wants to verify that a FPGA bitstream can be started properly
before saving the bitstream to the QSPI flash memory.
Bitstream authentication makes sure a signed bitstream has valid signatures.
The
From: Richard Gong
Extend FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
v2: use flag defined in stratix10-svc driver
---
drivers/fpga/stratix10-soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/fpga
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v2: changed in alphabetical order
---
drivers/fpga/of-fpga-region.c | 3 +++
1 file changed, 3
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication,
which makes sure a signed bitstream has valid signatures.
Signed-off-by: Richard Gong
---
v2: put authenticate-fpga-config above partial-fpga-config
update commit messages
---
Documentation
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication, which makes sure a signed bitstream has valid signatures.
Except for the actual configuration of the device, the authentication works
the same way as FPGA configuration does. If the authentication
From: Richard Gong
Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
authentication feature. Authenticating a bistream is to make sure a signed
bitstream has the valid signatures.
Except for the actual configuration of the device, the bitstream
authentication works the
On 11/17/20 11:47 PM, Xu Yilun wrote:
On Tue, Nov 17, 2020 at 09:39:55AM -0600, Richard Gong wrote:
On 11/16/20 8:24 PM, Xu Yilun wrote:
On Mon, Nov 16, 2020 at 08:14:52AM -0600, Richard Gong wrote:
Hi Yilun,
On 11/15/20 8:47 PM, Xu Yilun wrote:
On Sun, Nov 15, 2020 at 11:21:06AM
On 11/16/20 8:24 PM, Xu Yilun wrote:
On Mon, Nov 16, 2020 at 08:14:52AM -0600, Richard Gong wrote:
Hi Yilun,
On 11/15/20 8:47 PM, Xu Yilun wrote:
On Sun, Nov 15, 2020 at 11:21:06AM -0800, Moritz Fischer wrote:
Hi Richard,
On Thu, Nov 12, 2020 at 12:06:42PM -0600, richard.g
Hi Moritz,
On 11/15/20 1:19 PM, Moritz Fischer wrote:
On Thu, Nov 12, 2020 at 12:06:43PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Exten FPGA manager driver to support FPGA bitstream authentication on
Nit: Extend
Sorry, I will fix that in version 2.
Intel SocFPGA
Hi Yilun,
On 11/15/20 8:47 PM, Xu Yilun wrote:
On Sun, Nov 15, 2020 at 11:21:06AM -0800, Moritz Fischer wrote:
Hi Richard,
On Thu, Nov 12, 2020 at 12:06:42PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream
Hi Yilun,
On 11/15/20 8:41 PM, Xu Yilun wrote:
On Thu, Nov 12, 2020 at 12:06:39PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
The customer wants to verify that a FPGA bitstream can be started properly
before saving the bitstream to the QSPI flash memory.
The customer
Hi Moritz,
On 11/15/20 1:21 PM, Moritz Fischer wrote:
Hi Richard,
On Thu, Nov 12, 2020 at 12:06:42PM -0600, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication.
Signed-off-by: Richard Gong
---
Documentation
Hi Tom,
On 11/14/20 9:59 AM, Tom Rix wrote:
On 11/14/20 6:52 AM, Richard Gong wrote:
Hi Tom,
prior to OS boot up.
- encrypted-fpga-config : boolean, set if the bitstream is encrypted
+- authenticate-fpga-config : boolean, set if do bitstream authentication
The list is mostly in
Hi Tom,
On 11/14/20 9:53 AM, Tom Rix wrote:
On 11/14/20 6:30 AM, Richard Gong wrote:
A whitespace issue, the new BIT(5) should align with the others, so add two
spaces to the others.
There is only one space, also I ran checkpatch with strict option and didn't
see any whitespace
Hi Tom.
On 11/13/20 2:31 PM, Tom Rix wrote:
On 11/12/20 10:06 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Exten FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
drivers/fpga/stratix10-soc.c | 5
Hi Tom,
On 11/13/20 2:28 PM, Tom Rix wrote:
On 11/12/20 10:06 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication.
Signed-off-by: Richard Gong
---
Documentation/devicetree/bindings/fpga/fpga-region.txt | 1
Hi Tom,
Thanks for review!
On 11/13/20 2:24 PM, Tom Rix wrote:
On 11/12/20 10:06 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication.
Should improve this commit so explain what you mean authentication.
it
From: Richard Gong
Add authenticate-fpga-config property for FPGA bitstream authentication.
Signed-off-by: Richard Gong
---
Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt
b
From: Richard Gong
Exten FPGA manager driver to support FPGA bitstream authentication on
Intel SocFPGA platforms.
Signed-off-by: Richard Gong
---
drivers/fpga/stratix10-soc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga
From: Richard Gong
Add authenticate-fpga-config property to support FPGA bitstream
authentication.
Signed-off-by: Richard Gong
---
drivers/fpga/of-fpga-region.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
index e405309
From: Richard Gong
The customer wants to verify that a FPGA bitstream can be started properly
before saving the bitstream to the QSPI flash memory.
The customer sends the bitstream via FPGA framework and overlay, the
firmware will authenticate the bitstream but not program the bitstream to
From: Richard Gong
Add FPGA_MGR_BITSTREM_AUTHENTICATION flag for FPGA bitstream
authentication.
Signed-off-by: Richard Gong
---
include/linux/fpga/fpga-mgr.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 2bc3030
Acked-by: Richard Gong
On 10/23/20 11:33 AM, Mauro Carvalho Chehab wrote:
There are some common comments marked, instead, with kernel-doc
notation, which won't work.
While here, rename an identifier, in order to match the
function prototype below kernel-doc markup.
Signed-off-by:
Hi,
Sorry for asking.
This patch was submitted on July and is pending for approval. Would you
mind reviewing that?
Regards,
Richard
On 7/24/20 10:59 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
Thor is moving to a new position and I will take over the maintainership.
Add
Hi Greg,
Many thanks for your review comments!
On 8/28/20 5:47 AM, Greg KH wrote:
On Mon, Aug 17, 2020 at 08:47:30AM -0500, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add Intel FPGA crypto service (FCS) driver to support new crypto services
on Intel SoCFPGA platforms.
The
From: Richard Gong
Add the device tree files for Intel Diamond Mesa SoC
Signed-off-by: Richard Gong
---
v2: use socfpga_agilex.dtsi rather than socfpga_diamondmesa.dtsi
---
arch/arm64/Kconfig.platforms | 5 ++
arch/arm64/boot/dts/intel/Makefile| 1
From: Richard Gong
Add the device tree files for Intel Diamond Mesa SoC
Signed-off-by: Richard Gong
---
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/intel/Makefile | 1 +
arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts | 41 ++
arch
From: Richard Gong
Include Intel Diamond Mesa SoC platform to the arm64 defconfig so that we
build the Diamond Mesa in the standard arm64 defconfig.
Signed-off-by: Richard Gong
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b
From: Richard Gong
Extend Intel service layer driver to support new crypto services on
Intel SoCFPGA platforms.
The crypto services include security certificate, image boot validation,
security key cancellation, get provision data, random number generation,
advance encrtption standard (AES
From: Richard Gong
Add Intel FPGA crypto service (FCS) driver to support new crypto services
on Intel SoCFPGA platforms.
The crypto services include security certificate, image boot validation,
security key cancellation, get provision data, random number generation,
advance encrtption standard
From: Richard Gong
This is the 2nd submission of Intel SoCFPGA crypto service driver.
I followed the process to register or request a valid IOCTL number/letter,
but I got the delivery failure status notification.
Cypto service driver and service layer driver patches have been reviewed
I will move them to drivers/misc.
Regards,
Richard
On 8/11/20 7:34 PM, Herbert Xu wrote:
On Tue, Aug 11, 2020 at 08:56:22AM -0500, richard.g...@linux.intel.com wrote:
From: Richard Gong
Add Intel FPGA crypto service (FCS) driver to support new crypto services
on Intel SoCFPGA platforms
From: Richard Gong
Add Intel FPGA crypto service (FCS) driver to support new crypto services
on Intel SoCFPGA platforms.
The crypto services include security certificate, image boot validation,
security key cancellation, get provision data, random number generation,
advance encrtption standard
From: Richard Gong
Extend Intel service layer driver to support new crypto services on
Intel SoCFPGA platforms.
The crypto services include security certificate, image boot validation,
security key cancellation, get provision data, random number generation,
advance encrtption standard (AES
From: Richard Gong
I followed the process to register or request a valid IOCTL number/letter,
but I got the delivery failure status notification.
Cypto service driver and service layer driver patches have been reviewed
internally by colleagues at Intel.
Intel SoCFPGA is composed of a 64 bit
From: Richard Gong
Increase the shared memory size from 16Mb to 32Mb so that we can properly
handle the image authorization for 12+ Mb RBF/JIC files.
Signed-off-by: Richard Gong
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Moritz,
No problem.
Thanks you very much for applying patch to the next!
Regards,
Richard
On 8/4/20 11:43 AM, Moritz Fischer wrote:
On Fri, Jul 24, 2020 at 11:10:09AM -0500, richard.g...@linux.intel.com wrote:
From: Richard Gong
When CTRL+C occurs during the process of FPGA
From: Richard Gong
When CTRL+C occurs during the process of FPGA reconfiguration, the FPGA
reconfiguration process stops and the user can't perform a new FPGA
reconfiguration properly.
Set FPGA task to be not interruptible so that the user can properly
perform FPGA reconfiguration after C
From: Richard Gong
Thor is moving to a new position and I will take over the maintainership.
Add myself as maintainer for 3 Altera drivers below:
1. Altera I2C driver
2. Altera System Manager driver
3. Altera System Resource driver
Signed-off-by: Richard Gong
Acked-by: Thor Thayer
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