Hi
Am Mittwoch, 11. September 2019, 04:37:46 CEST schrieb Masahiro Yamada:
> Hi Dinh,
>
> On Wed, Sep 11, 2019 at 12:22 AM Dinh Nguyen wrote:
> > On 9/10/19 8:48 AM, Tim Sander wrote:
> > > Hi
> > >
> > > I have noticed that my SPF records where not
Hi
Am Mittwoch, 11. September 2019, 04:37:46 CEST schrieb Masahiro Yamada:
> - Does the SOCFPGA boot ROM support the NAND boot mode?
Cyclone V HPS TRM Section "A3 Booting and Configuration" lists QSPI, SD/MMC and
Nand as bootsource.
> - If so, which value does it use for SPARE_AREA_SKIP_BYTES?
I
Hi
I have noticed that my SPF records where not in place after moving the server,
so it seems the mail didn't go to the mailing list. Hopefully that's fixed now.
Am Dienstag, 10. September 2019, 09:16:37 CEST schrieb Masahiro Yamada:
> On Fri, Sep 6, 2019 at 9:39 PM Tim Sander
Hi
I have noticed that there multiple breakages piling up for the denali nand
driver on the Intel/Altera Cyclone V. Unfortunately i had no time to track the
mainline kernel closely. So the breakage seems to pile up. I am a little
disapointed that Intel is not on the lookout that the kernel works o
Hi
I just tested this kernel and saw the stall output below. I think there is
something
fishy with the ethernet driver. I had one time where it just locked up on
network traffic on issuing "ip a" via serial port on the device. All the
problems i see,
seem to be related to network traffic via the
Hi
I am currently using ptp on a Altera/Intel SOC with a dp8640 PHY.
PTP functionality seems to be right. But i am doing timestamping
with gpio0 and sometimes i loose the sync of the stamping and
the events. So i would like to read out all messages. Reading O_NONBLOCK
does not work so i tried poll
ned-off-by: Tim Sander
---
drivers/i2c/busses/i2c-designware-core.c| 14 -
drivers/i2c/busses/i2c-designware-core.h| 4 ++
drivers/i2c/busses/i2c-designware-platdrv.c | 90 -
3 files changed, 104 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/
Hi
I am currently seeing a error with the designware driver on
Intel/Altera ARM Cortex A9 Cyclone SOC V Hardware. The USB PHY is a
TUSB1210 without a hw reset line connected. The error only occurs on
plugging in of the device in host mode. Once the USB device is
enumerated i have not seen any erro
Good Day Phil
Am Mittwoch, 3. Mai 2017, 09:30:50 CEST schrieb Phil Reid:
> G'day Tim,
>
> On 1/05/2017 21:31, Tim Sander wrote:
> > Good Day Phil
> >
> > Am Montag, 1. Mai 2017, 09:57:35 CEST schrieb Phil Reid:
> >>> So i took a look into the
Good Day Phil
Am Montag, 1. Mai 2017, 09:57:35 CEST schrieb Phil Reid:
> > So i took a look into the device tree file socfpga.dtsi and found that the
> > reset lines where not defined (although available in the corresponding
> > reset manager). Is there a reason for this? Other components are
> >
Hi
After sending this mail i just found out how i could reset the i2c-1 controller
manually with
devmem 0xffd05014 32 0x2000
devmem 0xffd05014 32 0
So i took a look into the device tree file socfpga.dtsi and found that the
reset lines
where not defined (although available in the corresponding
Hi
I have tried to add a gpio recovery gpio controller to the designware i2c
driver. The attempt is
attached below. I have a Intel(Altera) Cyclone V SOC Platform attached to a
buggy power
supply which gives a lockup on the i2c controller as a external device gives to
much noise
on the signal an
Hi
I have been testing the 4.11-rc6 kernel on Intel(ex Altera) Arm SOC Cyclone
with dynamic Firmware loading. As i didn't know how to trigger dynamic
loading from userspace i also applied the following patch:
OF: DT-Overlay configfs interface
https://github.com/raspberrypi/linux/commit/8f1079750c
Hi Dinh
On Thursday 25 February 2016 10:56:28 Dinh Nguyen wrote:
> On 02/25/2016 04:38 AM, Steffen Trumtrar wrote:
> > Hi Tim!
> >
> > On Thu, Feb 25, 2016 at 11:05:05AM +0100, Tim Sander wrote:
> >> From: Tim Sander
> >>
> >> Add a more speci
From: Tim Sander
Add a more specific compatible string:"terasic,de0-nano-soc" for respective
board.
Background: when checking for bootspec entries, some board specific fixups are
not apropriate for board of the same platform ("altr,socfpga-cyclone5").
The same aproach i
Hi Sebastian
Am Freitag, 12. Februar 2016, 10:07:59 schrieben Sie:
...
> What about rt4? It is only the stable update so you should see here the
> numbers from rt3. If that is true and your numbers are stable it should
> be easy to run git bisect between rt4 and rt5. And looking at
> https://git
Hi Sebastian
As you got correctly i was talking about 4.4.1-rt5 and not 4.1 i replied to by
accident.
Am Freitag, 12. Februar 2016, 10:07:59 schrieb Sebastian Andrzej Siewior:
> On 02/12/2016 09:28 AM, Tim Sander wrote:
> > Hi Sebastian
>
> Hi Tim,
>
> > Am Sonntag, 1
From: Tim Sander
Add a more specific compatible string:"terasic,de0-nano-soc" for respective
board.
Background: when checking for bootspec entries, some board specific fixups
are not apropriate for board of the same platform
("altr,s
Hi Sebastian
Am Sonntag, 16. August 2015, 15:56:30 schrieb Sebastian Andrzej Siewior:
> I'm pleased to announce the v4.1.5-rt5 patch set.
I have just tested it with a Altera SoC ARM v7. The latencies seem to have
gotten a little bit worse with each release. The first core has always been
worse (
ry no photos, no special blinking.
Best regards
Tim
Signed-off-by: Tim Sander
--- linux-4.4-rc6/
Hi
Please consider this patch for the next release. It won't recognize my Plextor
M6e PCIE disk without it. Please cc as i am not on the list.
Signed-off-by: Tim Sander
PCI: Add quirk for Lite-On IT Corp. / Plextor M6e PCI Express SSD [Marvell
88SS9183] (rev 14)
---
drivers/pci/qui
Hi Bjorn
Am Montag, 2. Februar 2015, 08:55:33 schrieb Bjorn Helgaas:
> [+cc Alex]
>
> On Mon, Feb 2, 2015 at 5:29 AM, Tim Sander wrote:
> > The long name for this device is
> > Lite-On IT Corp. / Plextor M6e PCI Express SSD [Marvell 88SS9183] (rev 14)
> >
> >
Hi Bjorn
Am Montag 02 Februar 2015, 08:55:33 schrieb Bjorn Helgaas:
> [+cc Alex]
>
> On Mon, Feb 2, 2015 at 5:29 AM, Tim Sander wrote:
> > The long name for this device is
> > Lite-On IT Corp. / Plextor M6e PCI Express SSD [Marvell 88SS9183] (rev 14)
> >
> >
representation is not visible before this patch.
After this patch it appears as a normal device. Formatting
and mounting worked so far.
Signed-off-by: Tim Sander
---
drivers/pci/quirks.c| 4
include/linux/pci_ids.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/drivers/pci/quirks.c b
that the FIQ IPI
patches are to be merged proper beforhand).
Am Montag, 1. Dezember 2014, 15:02:40 schrieb Russell King - ARM Linux:
> On Mon, Dec 01, 2014 at 02:54:10PM +0100, Tim Sander wrote:
> > Hi Russell
> >
> > Am Montag, 1. Dezember 2014, 10:38:32 schrieb Russell Ki
Hi Daniel
Am Montag, 1. Dezember 2014, 14:13:52 schrieb Daniel Thompson:
> On 01/12/14 13:54, Tim Sander wrote:
> >> Look, in my mind it is very simple. If you are using CONFIG_FIQ on a
> >> SMP platform, your life will be very difficult. The FIQ code enabled
> >>
Hi Russell
Am Montag, 1. Dezember 2014, 10:38:32 schrieb Russell King - ARM Linux:
> On Mon, Dec 01, 2014 at 11:32:00AM +0100, Tim Sander wrote:
> > Hi Russel, Daniel
> >
> > Am Freitag, 28. November 2014, 10:08:28 schrieb Russell King - ARM Linux:
> > > The two
Hi Russel, Daniel
Am Freitag, 28. November 2014, 10:08:28 schrieb Russell King - ARM Linux:
> On Fri, Nov 28, 2014 at 10:10:04AM +0100, Tim Sander wrote:
> > Hi Daniel, Russell
> >
> > Am Mittwoch, 26. November 2014, 16:17:06 schrieb Daniel Thompson:
> > > On 26/1
Hi Daniel, Russell
Am Mittwoch, 26. November 2014, 16:17:06 schrieb Daniel Thompson:
> On 26/11/14 13:12, Russell King - ARM Linux wrote:
> > On Wed, Nov 26, 2014 at 01:46:52PM +0100, Tim Sander wrote:
> >> Hi Daniel
> >>
> >> Am Dienstag, 25. November 20
Am Mittwoch, 26. November 2014, 15:48:47 schrieb Daniel Thompson:
> On 26/11/14 15:09, Tim Sander wrote:
> > I would be quite happy if grouping support for gic would be mainlined.
> > Then only the dance to get the old gic version 1 working with fiqs would
> > be
> >
I would be quite happy if grouping support for gic would be mainlined.
Then only the dance to get the old gic version 1 working with fiqs would be
needed...
I have on comment inline below which seems as a race to me.
Am Dienstag, 25. November 2014, 17:26:39 schrieb Daniel Thompson:
> Currently i
Hi Daniel
Am Dienstag, 25. November 2014, 17:26:41 schrieb Daniel Thompson:
> Previous changes have introduced both a replacement default FIQ handler
> and an implementation of arch_trigger_all_cpu_backtrace for ARM but
> these are currently independent of each other.
>
> This patch plumbs togeth
Hi
I am currently trying to get the FIQ interrupt working with linux. I want to
have the FIQ to have an interrupt which is not masked by linux and gives the
lowest irq latencys the hardware can deliver.
In the case of the xilinx zynx i have seen that the ICCICR register enables
the FIQ via the f
Hi Steven
> This is the RT stable review cycle of patch 3.4.69-rt86-rc1.
Thanks for this release, unfortunatly i am only able to test this stuff in
indeterministic time slices... I am currently testing this stuff.
No news is good news.
> Please scream at me if I messed something up. Please test the
Hi Sebastian
> I'm pleased to announce the v3.12.0-rt1 patch set.
>
> Changes since v3.10.18-rt14
> - updated to v3.12
> - dropped SLAB support. It was broken in v3.10 and therefore not available
> for RT. Nobody complained except that it did not compile on !RT. Since
> SLUB performs a little
Hi
> > > I'm pleased to announce the 3.4.41-rt55-feat3 feature release.
> > >
> > > Note, I first uploaded -feat2 then realized I didn't add a compile fix
> > > by
> > > Mike Galbraith, and then created the -feat3 with that fix.
> >
> > I just wanted to say thanks that this patch enables compilat
Hi Haojian and Linux-Folks
Thanks for your reply. This is just a short followup how i got it working. But
as the 3.8.4 kernel on the beaglebone is having no ethernet connectivity i
went back to the 3.2 kernel without device tree support for the time beeing.
So i didn't spent to much time on the d
Hi Steve and all RT Folks
> I'm pleased to announce the 3.4.41-rt55-feat3 feature release.
>
> Note, I first uploaded -feat2 then realized I didn't add a compile fix by
> Mike Galbraith, and then created the -feat3 with that fix.
I just wanted to say thanks that this patch enables compilation aga
Hi Thomas
> On Thu, 25 Apr 2013, Tim Sander wrote:
> > handler. But normally the HR_TIMER is set. So we switched it off on this
> > very purpose. As we also have also PREEMPT_RT_FULL set the proposed
> > solution to allow only PREEMPT_RT_FULL with PREEMPT_RT_FULL set is not
Hi Sebastian
> > I just wanted to test this release but it fails to compile with the the
> > following error:
> >
> > kernel/hrtimer.c: In function '__hrtimer_start_range_ns':
> > kernel/hrtimer.c:1045:7: error: implicit declaration of function
> > 'hrtimer_rt_defer'
> > kernel/hrtimer.c: At top l
Hi
I just wanted to test this release but it fails to compile with the the
following error:
kernel/hrtimer.c: In function '__hrtimer_start_range_ns':
kernel/hrtimer.c:1045:7: error: implicit declaration of function
'hrtimer_rt_defer'
kernel/hrtimer.c: At top level:
kernel/hrtimer.c:1416:12: er
Hi
I am currently trying to get pinmuxing working on a beaglebone board with an
offtree driver. This is for a custom handbuild hardware so i guess there is no
point in bringing this mainline.
While this is havyly patched 3.8.4 version running over here i think the
pinmux infrastructure is the n
Am Montag, 18. Februar 2013, 12:16:41 schrieb Thomas Gleixner:
> On Mon, 18 Feb 2013, Tim Sander wrote:
> > Here is a transtribed backtrace for easier reading:
> > c0010fac t dump_backtrace
> > c022c188 T dump_stack
> > c022c71c t __schedule_bug
> > c02
Am Montag, 18. Februar 2013, 12:16:41 schrieb Thomas Gleixner:
> On Mon, 18 Feb 2013, Tim Sander wrote:
> > Here is a transtribed backtrace for easier reading:
> > c0010fac t dump_backtrace
> > c022c188 T dump_stack
> > c022c71c t __schedule_bug
> > c02
Hi
> On Thu, Feb 14, 2013 at 5:35 PM, Thomas Gleixner wrote:
> > On Thu, 14 Feb 2013, Tim Sander wrote:
> >> > That's true, but w/o seing the OOM output I can't tell what's
> >> > exhausting the memory.
> >>
> >> When fuzzing t
rogram i posted is able to give the
> > system an Out Of Memory condition is strange. I mean throwing random
> > chars at a getty should'nt exhaust memory so fast.
>
> That's true, but w/o seing the OOM output I can't tell what's
> exhausting the memory.
W
Hi
> Also: Has s.th. changed in respect to the modules. I have one module wich
> goes on an endless interrupt loop freezing the device. The driver works
> fine for 3.0 - 3.4 preempt rt kernels? This is a miscdev based driver. If
> someone is interested i can post the source over here. But unfortun
Hi Thomas
> I'm pleased to announce the 3.6.9-rt21 release. 3.6.7-rt18, 3.6.8-rt19
> and 3.6.9-rt20 are not announced updates to the respective 3.6.y
> stable releases without any RT changes
There is some progress here. It boots but sometimes i see the backtrace below.
Also: Has s.th. changed in r
Hi
After Frank posted a patch i managed the 3.6.7-rt18 kernel to boot:
There are some local platform modifications for arm mach-pcm043 but nothing
which should
cause this. The kernel got renamed so that the hw debugger works. HR_TIMERS are
disabled in my config.
The kernel continues to work af
Hi
After Frank posted a patch i managed the 3.6.7-rt18 kernel to boot:
There are some local platform modifications for arm mach-pcm043 but nothing
which should
cause this. The kernel got renamed so that the hw debugger works. HR_TIMERS are
disabled in my config.
The kernel continues to work af
Hi
I have been trying to get the 3.7-rc6 kernel to compile for a beaglebone board
with device tree but it seems there are still bits missing. Especially it
seems as if the sd card reader and network is not working properly?
I would also like to combine the barebone with a recent 3.6 preempt rt
Hi Paul
Sorry english somehow i tried to shoehorn more than one sentence into one
sentence in the last mail.
> OK, how much memory does your device have?
It's 128Mb of memory.
Best regards
Tim
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Hi Paul
> I know of people using TINY_RCU, TREE_RCU, and TREE_PREEMPT_RCU, but I
> have not heard of anyone using TINY_PREEMPT_RCU for whom TREE_PREEMPT_RCU
> was not a viable option (in contrast, the people running Linux on
> tiny-memmory systems typically use TINY_RCU). Of course, if no one
> re
Hi Thomas
> I'm pleased to announce the 3.6.1-rt1 release.
I also have to second the big thanks of Steven!
>* Fix for a potential deadlock in mm/slab.c. This had been reported
> as lockdep splats several times and stupidly ignored as a false
> positive, but in fact it's a real (thoug
Hi
After fixing the realtime prios which got shuffled due to other irq thread names
I just tested the realtime latency for interrupts on the i.mx35. With our own
systemtimer which does not get into the way of the measurement interrupt this
kernel has 30µs worst time (caveat: short measurement
Hi Rt-Folks
I just found out that the name of the rt irq of the fec device changed so it
had the same rtprio as my measurement interrupt. With the rt prios fixed the
performance seems to be roughly like the 3.0 kernel. If will give a further
update if there are any findings.
Best regards
Tim
Dear Linux-Realtimers
I just had the time to test this realtime release. Due to time constraints
this is the first test on the 3.4 rt series. The HW Platform i used for testing
is a ARM PCM043 i.mx35 with some tweaks to decrease latency. One of them is
using an interrupt to drive our system tim
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