>
> Signed-off-by: Guido Günther
'arm64: dts: ...' for subject prefix.
Fixed it up and applied, thanks!
Shawn
no-map;
> + };
Please have a newline between nodes.
Shawn
> + dsp_vdev0vring1: vdev0vring1@942f8000 {
> + reg = <0 0x942f8000 0 0x8000>;
> + no-map;
> + };
> +
des table by parsing the mapping from DT.
The BRCMF_BUSTYPE_SDIO bus_type check gets separated from general DT
validation, so that country code can be handled as general part rather
than SDIO bus specific one.
Signed-off-by: Shawn Guo
Reviewed-by: Arend van Spriel
---
Changes for v3:
- Add miss
On Fri, Apr 16, 2021 at 2:00 PM Arend Van Spriel
wrote:
>
> On 4/15/2021 12:47 PM, Shawn Guo wrote:
> > With any regulatory domain requests coming from either user space or
> > 802.11 IE (Information Element), the country is coded in ISO3166
> > standard. It needs to b
to the chip, certain country revision needs to be
specified. As such they could be seen as device specific calibration
data which is a good fit into device tree.
Signed-off-by: Shawn Guo
Reviewed-by: Arend van Spriel
---
.../bindings/net/wireless/brcm,bcm4329-fmac.yaml | 8
1
des table by parsing the mapping from DT.
The BRCMF_BUSTYPE_SDIO bus_type check gets separated from general DT
validation, so that country code can be handled as general part rather
than SDIO bus specific one.
Signed-off-by: Shawn Guo
Reviewed-by: Arend van Spriel
---
.../wireless/broadcom/brcm80
ation.
[1]
https://patchwork.kernel.org/project/linux-wireless/patch/20210315105911.138553-1-linus.wall...@linaro.org/
Shawn Guo (2):
dt-bindings: bcm4329-fmac: add optional brcm,ccode-map
brcmfmac: support parse country code map from DT
.../net/wireless/brcm,bcm4329-fmac.yaml
On Mon, Apr 12, 2021 at 10:22:47AM +0200, Arend van Spriel wrote:
> On 08-04-2021 13:30, Shawn Guo wrote:
> > With any regulatory domain requests coming from either user space or
> > 802.11 IE (Information Element), the country is coded in ISO3166
> > standard. It need
On Mon, Apr 12, 2021 at 10:09:38AM +0200, Arend van Spriel wrote:
> On 08-04-2021 13:30, Shawn Guo wrote:
> > With any regulatory domain requests coming from either user space or
> > 802.11 IE (Information Element), the country is coded in ISO3166
> > standard. It need
On Mon, Apr 12, 2021 at 02:54:46PM +0300, Kalle Valo wrote:
> Shawn Guo writes:
>
> > On Sun, Apr 11, 2021 at 10:57:54AM +0300, Kalle Valo wrote:
> >> Shawn Guo writes:
> >>
> >> > Add optional brcm,ccode-map property to support translation from ISO316
On Sun, Apr 11, 2021 at 10:57:54AM +0300, Kalle Valo wrote:
> Shawn Guo writes:
>
> > Add optional brcm,ccode-map property to support translation from ISO3166
> > country code to brcmfmac firmware country code and revision.
> >
> > Signed-off-by: Shawn Guo
> &
On Fri, Apr 09, 2021 at 01:46:06PM -0500, Rob Herring wrote:
> On Thu, Apr 08, 2021 at 07:30:21PM +0800, Shawn Guo wrote:
> > Add optional brcm,ccode-map property to support translation from ISO3166
> > country code to brcmfmac firmware country code and revision.
> >
> &g
Add optional brcm,ccode-map property to support translation from ISO3166
country code to brcmfmac firmware country code and revision.
Signed-off-by: Shawn Guo
---
.../devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git
a/Documentation
des table by parsing the mapping from DT.
Signed-off-by: Shawn Guo
---
.../wireless/broadcom/brcm80211/brcmfmac/of.c | 53 +++
1 file changed, 53 insertions(+)
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/o
This is a couple of patches adding optional brcm,ccode-map bindings for
brcmfmac driver to parse country code map from DT.
Shawn Guo (2):
dt-binding: bcm43xx-fmac: add optional brcm,ccode-map
brcmfmac: support parse country code map from DT
.../net/wireless/brcm,bcm43xx-fmac.txt| 7
On Mon, Mar 29, 2021 at 03:01:01PM +0200, Stefan Riedmueller wrote:
> The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
> be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
> since it is actually the regulator enable pin.
>
> Signed-off-by: Stefan Riedmuel
On Wed, Mar 24, 2021 at 02:28:41PM +0100, Oliver Stäbler wrote:
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2. This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
>
> Signed-of
On Tue, Mar 23, 2021 at 04:07:56PM +0100, Michael Walle wrote:
> The aliases are board-specific and shouldn't be included in the common
> SoC dtsi. Move them over to the boards.
>
> Signed-off-by: Michael Walle
Applied both, thanks.
> board")
> Signed-off-by: Heiko Thiery
> ---
> v2:
> - add desciption what issue will be fixed
> - add Fixes tag
My branch is not a stable one, so I just squashed it into the original
commit.
Shawn
On Mon, Mar 22, 2021 at 09:09:25AM -0400, Alistair Francis wrote:
> reMarkable AS produces eInk tablets
>
> Signed-off-by: Alistair Francis
Applied all, thanks.
On Sat, Mar 20, 2021 at 07:34:36PM +0100, Michael Walle wrote:
> This driver is used on Layerscape SoCs to wake up the system from
> standby. It works in conjunction with the RCPM driver. The latter is
> only available as a builtin.
>
> Signed-off-by: Michael Walle
Applied, thanks.
On Fri, Mar 19, 2021 at 04:23:52PM -0500, Frank Li wrote:
> ADC1 is not defined in pd driver on 8QM.
>
> Signed-off-by: Frank Li
> Reviewed-by: Dong Aisheng
Applied, thanks.
regulator-min-microvolt = <1605000>;
> + regulator-max-microvolt = <1995000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
>
On Thu, Mar 18, 2021 at 06:18:55PM +0100, Michael Walle wrote:
> Move the MTD partitions to the partitions subnode. This is the new way
> to specify the partitions, see
> Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
>
> Signed-off-by: Michael Walle
Applied, thanks.
On Wed, Mar 17, 2021 at 10:31:17AM +0100, Ulf Hansson wrote:
> Since the introduction of the PM domain support for the scu-pd, the genpd
> framework has been continuously improved. More preciously, using a single
> global power domain can quite easily be deployed for imx platforms.
>
> To avoid co
On Wed, Mar 24, 2021 at 06:54:24AM +0100, Oleksij Rempel wrote:
> Hi Shawn,
>
> ping, do this patches need some ACK from some one?
As this will break existing DTBs, I need more ACKs from people to see
the consensus that this is the right thing to do.
Shawn
>
> Regards,
> O
On Mon, Mar 22, 2021 at 06:12:06PM -0500, Li Yang wrote:
> On Thu, Mar 18, 2021 at 3:36 AM Michael Walle wrote:
> >
> > Don't enable the optee node in the SoC include. It is an optional
> > component and actually, if enabled, breaks boards which doesn't have it.
&g
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: 483028edacab374060d93955382b4865a9e07cba
Gitweb:
https://git.kernel.org/tip/483028edacab374060d93955382b4865a9e07cba
Author:Shawn Guo
AuthorDate:Wed, 17 Mar 2021 14:36:06 +08:00
Committer
;;
> eee-broken-1000t;
> - reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
Hmm, DT is describing hardware. If board schematic says there is
a reset GPIO, we should have it.
Shawn
> };
> };
> };
> --
> 2.17.1
>
On Mon, Mar 15, 2021 at 12:28:29PM +0800, Shawn Guo wrote:
> On Fri, Mar 05, 2021 at 02:03:51PM +0530, Sahil Malhotra wrote:
> > From: Sahil Malhotra
> >
> > optee node was disabled in ls1028a.dtsi, enabling it by default.
> >
> > Signed-off-by: Sahil Malho
6, read only 22528 bytes, retry
> [9.532845] ubi0 error: ubi_io_read: error -74 (ECC error) while reading
> 22528 bytes from PEB 513:4096, read 22528 bytes
>
> Fixes: f9ecf10cb88c ("ARM: dts: imx6ull: add MYiR MYS-6ULX SBC")
> Signed-off-by: dillon min
> Reviewed-by: Fabio Estevam
> Signed-off-by: Shawn Guo
Replaced with this version.
Shawn
On Wed, Mar 17, 2021 at 01:11:37PM +0100, Heiko Thiery wrote:
> Enable PCI_IMX6 to get PCI support for imx8mq boards like imx8mq-evk,
> imx8mq-kontron-pitx-imx8m and imx8mq-zii-ultra.
>
> The driver only has build-in support and cannot be compiled as module.
>
> Signed-off-by: Heiko Thiery
Appl
On Tue, Mar 09, 2021 at 02:15:20PM +0800, dillon.min...@gmail.com wrote:
> From: dillon min
>
> since Micron MT29F2G08ABAEAWP's ecc error management:
>
> |Description | Requirement
> |Minimum required ECC | 4-bit ECC per 528 bytes
> |Minim
On Tue, Mar 16, 2021 at 08:59:26AM +0100, Heiko Schocher wrote:
> add compatible entry in nxp_fspi driver for imx8mp
>
> @Shawn: If this series is accepted, can you apply the DTS patches from
> series v2?
> http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643
ch/arm64/configs/defconfig
> @@ -225,6 +225,7 @@ CONFIG_PCI_HOST_THUNDER_PEM=y
> CONFIG_PCI_HOST_THUNDER_ECAM=y
> CONFIG_PCIE_ROCKCHIP_HOST=m
> CONFIG_PCIE_BRCMSTB=m
> +CONFIG_PCI_IMX6=y
Do we really want it to be built-in? If so, it would be nice to have some
comments about that in commit log.
Shawn
one
> if we want to wait for it to be out of staging.
>
> revision history
> ----
> v2: (thanks Shawn)
> * fix commit hash in commit message
>
> v1:
> *
> https://lore.kernel.org/phone-devel/20210311120259.3310499-1-martin.kepplin...@puri.sm/T/
>
On Thu, Mar 11, 2021 at 01:02:58PM +0100, Martin Kepplinger wrote:
> From: Sebastian Krzyszkowiak
>
> Commit 66d3f246d79f ("arm64: dts: librem5: Don't mark buck3 as always on")
I cannot find this commit.
Shawn
> removed always-on marking from GPU regulator, which
On Mon, Mar 15, 2021 at 08:10:37AM +0100, Heiko Schocher wrote:
> Hello Shawn,
>
> On 15.03.21 07:47, Shawn Guo wrote:
> > On Tue, Mar 09, 2021 at 06:31:12AM +0100, Heiko Schocher wrote:
> >>
> >> This series enables support for the SPI NOR on the
> >&
On Tue, Mar 09, 2021 at 04:44:23PM +0530, Kuldeep Singh wrote:
> This patches series aim is to resolve NXP flexspi bindings compatibility
> warnings which were observed after running 'make dtbs_check' with
> https://lore.kernel.org/linux-devicetree/20210309103528.3538910-1-kuldeep.si...@nxp.com/
>
o.
>
> Heiko Schocher (4):
> spi: fspi: enable fspi driver for on imx8mp
> dt-bindings: spi: add compatible entry for imx8mp in FlexSPI
> controller
> arm64: dts: imx8mp: add flexspi node
> arm64: imx8mp: imx8mp-phycore-som enable spi nor
Two DTS patch look good. Ping me when driver and bindings changes are
accepted.
Shawn
On Mon, Mar 08, 2021 at 04:18:25PM +0100, Sebastian Reichel wrote:
> Bx50v3 DT improvements
>
> These are a bunch of small unrelated improvements for the GE Bx50v3
> device tree (and BA16 system on module, which is currently only used
> by Bx50v3).
>
> Changes since PATCHv1 [1]:
> * change patch
On Mon, Mar 08, 2021 at 01:55:18PM +0100, Adrien Grassein wrote:
> Add the description for ecspi2 support.
>
> Signed-off-by: Adrien Grassein
> Reviewed-by: Krzysztof Kozlowski
> Reviewed-by: Fabio Estevam
Applied, thanks.
| 1 +
This would be patch #2.
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
Patch #1.
> arch/arm/boot/dts/Makefile| 1 +
> arch/arm/boot/dts/imx7d-remarkable2.dts | 166 ++
Patch #3.
Shawn
> 4 files changed, 170 insertions(+
On Sun, Mar 07, 2021 at 10:56:29PM +0200, Horia Geantă wrote:
> Crypto engine (CAAM) on LS1021A platform is configured HW-coherent,
> mark accordingly the DT node.
>
> Signed-off-by: Horia Geantă
Applied, thanks.
On Sun, Mar 07, 2021 at 10:47:34PM +0200, Horia Geantă wrote:
> This patch set adds "dma-coherent" property to the crypto node
> for NXP Layerscape platforms where the IP (CAAM) is configured
> HW-coherent.
>
> Horia Geantă (3):
> arm64: dts: ls1046a: mark crypto engine dma coherent
> arm64: d
On Fri, Mar 05, 2021 at 02:03:51PM +0530, Sahil Malhotra wrote:
> From: Sahil Malhotra
>
> optee node was disabled in ls1028a.dtsi, enabling it by default.
>
> Signed-off-by: Sahil Malhotra
Applied, thanks.
On Mon, Mar 08, 2021 at 12:54:05PM +0100, Adrien Grassein wrote:
> Le lun. 8 mars 2021 à 01:46, Shawn Guo a écrit :
> >
> > On Tue, Feb 23, 2021 at 08:16:43PM +0100, Adrien Grassein wrote:
> > > Adrien Grassein (10):
> > > arm64: dts: imx8mm-nitrogen-r2: ad
On Sun, Mar 07, 2021 at 06:30:03PM +0800, peng@oss.nxp.com wrote:
> From: Peng Fan
>
> There is wdog[2,3] in i.MX8MP, so add them.
>
> Signed-off-by: Peng Fan
Applied, thanks.
On Thu, Mar 04, 2021 at 10:31:39AM +0100, Philippe Schenker wrote:
> The current setting reflects about 86 Ohms of source-impedance
> on the SDIO signals where the WiFi board is hooked up. PCB traces are
> routed with 50 Ohms impedance and there are no serial resistors on
> those traces.
>
> This
On Wed, Mar 03, 2021 at 10:10:01PM +0100, Heiko Thiery wrote:
> This patch series adds support for the Kontron pITX-imx8m board:
>
> https://www.kontron.com/products/boards-and-standard-form-factors/single-board-computer/pitx-imx8m.html
>
> Heiko Thiery (2):
> dt-bindings: arm: fsl: add Kontron
On Fri, Feb 26, 2021 at 12:53:59AM +0530, Jagan Teki wrote:
> Jagan Teki (5):
> dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
> arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
> arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
> dt-bindings: arm: fsl: Add
On Wed, Mar 03, 2021 at 03:00:57AM +, Peng Fan (OSS) wrote:
> Hi Shawn,
>
> > Subject: Re: [PATCH V3 0/5] imx esdhc dt/driver update
> >
> > On Thu, 25 Feb 2021 at 04:22, wrote:
> > >
> > > From: Peng Fan
> > >
> > > V3:
> >
On Tue, Feb 23, 2021 at 08:16:43PM +0100, Adrien Grassein wrote:
> Adrien Grassein (10):
> arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
> arm64: dts: imx8mm-nitrogen-r2: rework USDHC1
> arm64: dts: imx8mm-nitrogen-r2: add USB support
> arm64: dts: imx8mm-nitrogen-r2: add espi2 support
>
b/arch/arm/boot/dts/imx6q-ba16.dtsi
> @@ -177,6 +177,18 @@ &fec {
> pinctrl-0 = <&pinctrl_enet>;
> phy-mode = "rgmii-id";
> status = "okay";
> + phy-supply = <®_3p3v>;
> + phy-handle = <&phy0&g
/arm/boot/dts/imx6q-ba16.dtsi
> @@ -124,6 +124,10 @@ reg_usb_otg_vbus: regulator-usbotgvbus {
> regulator-name = "usb_otg_vbus";
> regulator-min-microvolt = <500>;
> regulator-max-microvolt = <500>;
> +
This
gt; arch/arm64/boot/dts/freescale/imx8mm-evk-inmate.dts | 7 +++
Upstream doesn't have this file.
Shawn
> arch/arm64/boot/dts/freescale/imx8mn-evk-inmate.dts | 8
> arch/arm64/boot/dts/freescale/imx8mp-evk-inmate.dts | 8
> arch/arm64/boot/dts/freescale/imx8mq
On Sun, Feb 21, 2021 at 12:07:05PM +0100, Guido Günther wrote:
> So far only headphone output worked. Thesse patches add support for the
> built in speaker and mic, allow a headset microphone to work and wire up jack
> detection so audio output can switch to headphones automatically. They also
> a
000 {
> + label = "protected1";
> + reg = <0x3 0x1>;
> + read-only;
> + };
Please have a newline between nodes.
I fixed it up when applying.
Shawn
> + partition@4 {
> + label = "rw";
> + reg = <0x4 0x1C>;
> + };
> };
> };
>
> --
> 2.20.1
>
On Fri, Feb 19, 2021 at 11:04:34AM +0100, Martin Kepplinger wrote:
> Angus Ainslie (1):
> arm64: dts: librem5: protect some partitions of the nor-flash
>
> Guido Günther (3):
> arm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delay
> arm64: dts: librem5: Drop assigned-clocks from S
Copy Abel who is stepping up to maintain i.MX clock drivers.
Shawn
On Thu, Feb 18, 2021 at 04:33:46PM +0800, Richard Zhu wrote:
> In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external
> OSC or internal system PLL. It is configured in the IOMUX_GPR14 register
> dire
+ Abel
On Thu, Feb 18, 2021 at 03:29:34PM +0800, Richard Zhu wrote:
> The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock,
> Change the sys2_pll_500m to sys2_pll_50m.
>
> Signed-off-by: Richard Zhu
> ---
> drivers/clk/imx/clk-imx8mq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 d
On Sun, Feb 14, 2021 at 02:17:42PM -0600, Adam Ford wrote:
> Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
> to enable SDR104 on usdhc1 connecting the WiFi chip.
>
> Signed-off-by: Adam Ford
Applied, thanks.
On Sun, Feb 14, 2021 at 02:13:48PM +0100, Oliver Graute wrote:
> This patch adds support for the i.MX6UL variant of the Variscite DART-6UL
> SoM Carrier-Board
>
> Signed-off-by: Oliver Graute
> Cc: Shawn Guo
> Cc: Neil Armstrong
> Cc: Marco Felsch
> C
On Tue, Feb 09, 2021 at 01:52:59AM +0100, Michael Walle wrote:
> The legacy interrupt INT_A is hardwired to the event collector. RCEC is
> bascially supported starting with v5.11. Having a correct interrupt, will
> make RCEC at least probe correctly.
>
> There are still issues with how RCEC is imp
12 @@
> full-duplex;
> };
> };
> +
> + rcec@1f,0 {
Just curious how unit-address comes to '1f,0'?
Shawn
> +
" . Make sure the "snps,dwc3"-compatible nodes are correctly
> named.
>
> Signed-off-by: Serge Semin
> Acked-by: Krzysztof Kozlowski
> Cc: Shawn Guo
Applied, thanks.
On Fri, Feb 05, 2021 at 02:08:31PM +0530, Bhaskar Chowdhury wrote:
>
> s/confgiured/configured/
>
>
> Signed-off-by: Bhaskar Chowdhury
Applied, thanks.
On Wed, Feb 03, 2021 at 07:03:16PM -0800, Alistair Francis wrote:
> Run make imx_v6_v7_defconfig; make savedefconfig to regenerate the
> defconfig.
>
> Signed-off-by: Alistair Francis
We can leave it to future updates on the defconfig.
Shawn
imx7d-remarkable2.dts
> index 0aae13f5eed6..0978e26f5db5 100644
> --- a/arch/arm/boot/dts/imx7d-remarkable2.dts
> +++ b/arch/arm/boot/dts/imx7d-remarkable2.dts
> @@ -62,6 +62,10 @@ &sdma {
> status = "okay";
> };
>
> +&snvs_pwrkey {
> +
model = "reMarkable 2.0";
> + compatible = "fsl,imx7d-remarkable2", "fsl,imx7d";
The new compatible needs to be documented. Also the compatible doesn't
look right, as this is a device from reMarkable rather than FSL.
Shawn
> +
> + chosen {
&g
On Thu, Feb 04, 2021 at 05:38:46PM -0800, Saravana Kannan wrote:
> Using IRQCHIP_DECLARE lets fw_devlink know that it should not wait for
> these interrupt controllers to be populated as struct devices. Without
> this change, fw_devlink=on will make the consumers of these interrupt
> controllers wa
On Sun, Jan 31, 2021 at 06:54:46PM +0300, Dima Azarkin wrote:
> The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze
> on low level at the end of transaction so the bus can no longer work. This
> impacts reading of EDID data leading to incorrect TV resolution and no audio.
On Wed, Jan 27, 2021 at 06:40:22PM +0100, Sebastian Reichel wrote:
> Sebastian Reichel (2):
> ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
> soc: imx: add i.MX51/i.MX53 unique id support
Applied both, thanks.
On Mon, Jan 25, 2021 at 08:08:04PM +0100, Andreas Kemnade wrote:
> For now, the driver detects an incompatible version, but since
> that can be handled by auto-detection, add the controller to the
> devicetree now. Only PWM seems to be available, there is no RTC
> in that controller.
>
> Signed-of
On Sun, Jan 24, 2021 at 10:41:27PM +0100, Jonathan Neuschäfer wrote:
> Enable the Netronix EC on the Kobo Aura ebook reader.
>
> Several features are still missing:
> - Frontlight/backlight. The vendor kernel drives the frontlight LED
>using the PWM output of the EC and an additional boost pi
ot
Reported-by: Dan Carpenter
Signed-off-by: Shawn Guo
---
Viresh,
The issue was introduced by v2 of "cpufreq: qcom-hw: drop devm_xxx()
calls from init/exit hooks", which misses the conversion of 'data->base'
in error path. Sorry!
Shawn
drivers/cpufreq/qcom-cpufreq-hw
smatch warnings:
> drivers/cpufreq/qcom-cpufreq-hw.c:377 qcom_cpufreq_hw_cpu_init() error: we
> previously assumed 'data' could be null (see line 327)
> drivers/cpufreq/qcom-cpufreq-hw.c:377 qcom_cpufreq_hw_cpu_init() error:
> dereferencing freed memory 'data'
Thanks for the report! I will send a fix for it right away.
Shawn
64 with
> initrd table overrides, in which case the DSDT is not mapped with
> read/write permissions.
>
> Cc: Robert Moore
> Cc: Erik Kaneda
> Cc: "Rafael J. Wysocki"
> Cc: Len Brown
> Reported-by: Shawn Guo
> Signed-off-by: Ard Biesheuvel
Tested-by: Shawn Guo
Thanks for fixing the regression, Ard!
Shawn
On Thu, Jan 28, 2021 at 08:35:52PM +0100, Adrien Grassein wrote:
> The Nitrogen8M Mini is an ARM based single board computer (SBC).
>
> Signed-off-by: Adrien Grassein
> Reviewed-by: Krzysztof Kozlowski
Applied all 3, thanks.
On Tue, Jan 26, 2021 at 12:45:39PM +, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
>
> drivers/clk/imx/clk-imx6sl.c:156:6: warning: no previous prototype for
> ‘imx6sl_set_wait_clk’ [-Wmissing-prototypes]
>
> Cc: Russell King
> Cc: Shawn Gu
subject prefix to 'arm64: dts: ls1046a: ...', and applied the
patch with Fixes tag below.
Fixes: 8126d88162a5 ("arm64: dts: add QorIQ LS1046A SoC support")
Shawn
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 delet
On Thu, Jan 21, 2021 at 04:27:36PM +0530, Kuldeep Singh wrote:
> This patch set adds device-tree support for LX2160A-RDB/QDS.
>
> Also, update flexcan entry for LS1028A and enable support further for
> LS1028A-RDB/QDS.
>
> Patch1: Add dtsi and dts properties for LX2160A
> Patch2: Update dtsi pro
On Sun, Jan 17, 2021 at 10:03:01AM -0800, Alistair Francis wrote:
> The reMarkable2 requires VMSPLIT_2G, so lets set this in the
> imx_v6_v7_defconfig.
Hmm, why is VMSPLIT_2G required by reMarkable2?
Shawn
>
> Signed-off-by: Alistair Francis
> ---
> arch/arm/configs/imx_v
On Fri, Jan 15, 2021 at 11:26:57AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> We are using Jailhouse Hypervsior which has virtual pci node that
> use dt domains. so also use dt domains for pci node, this will avoid
> conflict with Jailhouse Hypervisor to trigger the following error:
>
k node is present irrespective of controlled_remotely property.
>
> Signed-off-by: Thara Gopinath
Reviewed-by: Shawn Guo
On Fri, Jan 22, 2021 at 10:44:09AM -0500, Thara Gopinath wrote:
> Hi Shawn,
>
> Thanks for the review
>
> On 1/22/21 12:10 AM, Shawn Guo wrote:
> > On Thu, Jan 21, 2021 at 09:52:51PM -0500, Thara Gopinath wrote:
> > > When bam dma is "controlled remotely&qu
;bamclk);
> + if (ret)
> + return ret;
>
> - if (!bdev->controlled_remotely)
> - pm_runtime_force_resume(dev);
> + if (!bdev->controlled_remotely)
Why do we still need controlled_remotely check here?
Shawn
> + pm_runtime_force_resume(dev);
> + }
>
> return 0;
> }
> --
> 2.25.1
>
On Mon, Jan 18, 2021 at 11:08:11AM +0100, Paweł Dembicki wrote:
> On 18.01.2021 at 08:36 Shawn Guo wrote:
> >
> > On Fri, Jan 15, 2021 at 11:16:12AM +0100, Pawel Dembicki wrote:
> > > LS1012A-RDB equipped in some i2c devices:
> > > - 3x GPIO Expander: PCAL9555
sing dummy regulator
> usb_phy_generic usbphynop2: supply vcc not found, using dummy regulator
So the patch is all for removing this kernel message, with introducing
the following potential breakage?
Shawn
>
> warnings on boot up. The USB IP vcc-supply - separate from the vusb - is
> h
On Tue, Jan 19, 2021 at 09:59:41AM +0200, Stanimir Varbanov wrote:
> On 1/19/21 9:40 AM, Shawn Guo wrote:
> > On Mon, Dec 21, 2020 at 11:58:20AM +0200, Stanimir Varbanov wrote:
> >> With TZ system reboot cannot finish successfully. To fix that
> >> enable core clocks by
n callback for venus")
> Signed-off-by: Stanimir Varbanov
Hi Mauro,
Could you help pick this fix up?
Shawn
> ---
> drivers/media/platform/qcom/venus/core.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/media/platform/qcom/venus/core.c
> b/dr
On Mon, Jan 18, 2021 at 04:36:55AM +, Aisheng Dong wrote:
> > From: Randy Dunlap
> > Sent: Saturday, January 16, 2021 11:33 AM
> > Subject: [PATCH] imx: select SOC_BUS to fix firmware build
>
> Patch title probably is better to be:
> firmware: imx: x
Fixed it up and applied.
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
> + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
> + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
> + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
> +
spi-max-frequency = <400>;
> + clocks = <&sc16is7xx_clk>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
> +
> + sc16is7xx_clk: sc16is7
lt;&gpio26>;
> + interrupts = <13 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "INT1";
> + };
> +
> + gyroscope@20 {
Please sort these device node in unit-address.
Shawn
> + compatible = "nxp,fxas21002c"
On Wed, Jan 13, 2021 at 02:53:08PM +0200, Abel Vesa wrote:
> Add a section for NXP i.MX clock drivers and list myself
> as the maintainer.
>
> Signed-off-by: Abel Vesa
Acked-by: Shawn Guo
On Wed, Jan 13, 2021 at 12:15:44AM +0100, Andreas Kemnade wrote:
> - add second uart
> - correct pinmux for console uart (it was working before because of
> setup by uboot)
> - document locations on board
>
> Andreas Kemnade (4):
> ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
ht = <&backlight_dsi>;
> + reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
Have a newline between properties and child node.
> + port {
> + panel_in: endpoint {
> + remote-endpoint = <&mipi_dsi_out>;
> + };
> + };
> + };
> +
> + ports {
> + port@1 {
> + reg = <1>;
Ditto
Shawn
> + mipi_dsi_out: endpoint {
> + remote-endpoint = <&panel_in>;
> + };
> + };
> + };
> +};
> +
> &pgc_gpu {
> power-supply = <&buck3_reg>;
> };
> --
> 2.20.1
>
On Mon, Jan 11, 2021 at 04:17:04PM +0100, Max Krummenacher wrote:
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
>
> It looks like the CPU resumes unconditionally in AR
It sound that the existing DTBs are broken by this default behaviour
change?
>
> Fixes: 71ac13457d9d ("rtc: pcf2127: only use watchdog when explicitly
> available")
>
> Signed-off-by: Bruno Thomsen
> Cc: Bruno Thomsen
> Cc: Uwe Kleine-König
> Cc: Rasmus Villemo
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