urn -EINVAL.
> This peculiarity is documented by commit 5c56dfe63b6e ("clk: Add comment
> about __of_clk_get_by_name() error values").
>
> Let's further document this function so that it's clear what the return
> value is and how to use the arguments to parse
Hi Geert,
On 03 June 2019 09:39 Geert Uytterhoeven wrote:
> On Mon, Jun 3, 2019 at 10:29 AM Phil Edworthy wrote:
> > On 28 May 2019 08:29 Geert Uytterhoeven wrote:
> > > On Fri, May 24, 2019 at 5:32 PM Gareth Williams wrote:
> > > > The driver is gaining power
Hi Geert,
On 28 May 2019 08:29 Geert Uytterhoeven wrote:
> On Fri, May 24, 2019 at 5:32 PM Gareth Williams wrote:
> > The driver is gaining power domain support, so add the new property to
> > the DT binding and update the examples.
> >
> > Signed-off-by: Gareth Williams
>
> Thanks for your patc
Hi Gareth,
On 17 May 2019 15:48, Gareth Williams wrote:
> There are several clocks on the r9ag032 which are currently not enabled
> in their drivers that can be delegated to clock domain system for power
> management. Therefore add support for clock domain functionality to the
> r9a06g032 clock dr
Hi Marc,
On 20 February 2019 11:33 Phil Edworthy wrote:
> On 20 February 2019 10:05 Marc Zyngier wrote:
> > On Wed, 20 Feb 2019 09:07:02 +0000, Phil Edworthy wrote:
> > > On 19 February 2019 20:29 Marc Zyngier wrote:
> >
> > [...]
> >
> > > &
Hi Marc,
On 20 February 2019 10:05 Marc Zyngier wrote:
> On Wed, 20 Feb 2019 09:07:02 +0000, Phil Edworthy wrote:
> > On 19 February 2019 20:29 Marc Zyngier wrote:
>
> [...]
>
> > > > + for (i = 0; i < MAX_NR_INPUT_IRQS; i++)
> > > > +
Hi Marc
On 19 February 2019 20:29 Marc Zyngier wrote:
> On Tue, 19 Feb 2019 15:55:11 +0000 Phil Edworthy wrote:
>
> + LinusW, who seem to have taken an interest in irqchip hierarchies...
>
> > On RZ/N1 devices, there are 3 Synopsys DesignWare GPIO blocks each
> > configu
. It's likely that the firmware will use some of these GPIO
interrupts and so we don't want them to move around.
Signed-off-by: Phil Edworthy
---
v4:
- Fix DT binding nits
v3:
- Use 'interrupt-map' DT property to map the interrupts, this is very similar
to PCIe MSI. The only d
d, so there is nothing to do in this driver when an interrupt
is received, other than tell the corresponding GPIO block.
Signed-off-by: Phil Edworthy
---
v4:
- No change.
v3:
- Use 'interrupt-map' DT property to map the interrupts, this is very similar
to PCIe MSI. The only differ
Hi Marc,
> On Tue, 19 Feb 2019 15:27:25 +
> Phil Edworthy wrote:
>
> > Hello,
> >
> > Any comments on this patch?
>
> Err... I'm afraid it fell through the cracks. It's been three months, and I've
> paged out most of last year.
>
>
Hello,
Any comments on this patch?
Thanks
Phil
> -Original Message-
> From: Phil Edworthy
> Sent: 13 November 2018 13:09
> To: Marc Zyngier ; Thomas Gleixner
> ; Jason Cooper
> Cc: Geert Uytterhoeven ; linux-renesas-
> s...@vger.kernel.org; linux-kernel@vger.kern
Hi,
Any other comments on this patch and patch 2/2
(https://lkml.org/lkml/2018/12/3/326)?
Thanks
Phil
> -Original Message-
> From: Phil Edworthy
> Sent: 06 December 2018 12:31
> To: 'Andy Shevchenko'
> Cc: Michael Turquette ; Stephen Boyd
> ; Russell King
Hi Andy,
On 03 December 2018 13:31 Andy Shevchenko wrote:
> On Mon, Dec 03, 2018 at 11:13:08AM +0000, Phil Edworthy wrote:
> > It's not immediately obvious from the code that failure to get a clock
> > provider can return either -ENOENT or -EINVAL. Therefore, add a
> >
t's a function.
- Add kernel doc for clk_get_optional().
Phil Edworthy (2):
clk: Add comment about __of_clk_get_by_name() error values
clk: Add (devm_)clk_get_optional() functions
drivers/clk/clk-devres.c | 11 +++
drivers/clk/clkdev.c | 6 ++
include/linux/clk.h
It's not immediately obvious from the code that failure to get a
clock provider can return either -ENOENT or -EINVAL. Therefore, add
a comment to highlight this.
Signed-off-by: Phil Edworthy
---
drivers/clk/clkdev.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/clk
clk_prepare_enable, etc to be called on the returned reference
without additional checks.
Signed-off-by: Phil Edworthy
Reviewed-by: Andy Shevchenko
---
v9:
- Add brackets after devm_clk_get so people know it's a function.
- Add kernel doc for clk_get_optional().
v8:
- Remove else clause
v7:
- In
Hi Stephen,
On 30 November 2018 09:09 Stephen Boyd wrote:
> Quoting Phil Edworthy (2018-11-20 06:14:45)
> > This adds clk_get_optional() and devm_clk_get_optional() functions to
> > get optional clocks.
> > They behave the same as (devm_)clk_get except where there is no c
interrupt-controller"
Signed-off-by: Phil Edworthy
---
arch/arm64/boot/dts/al/alpine-v2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi
b/arch/arm64/boot/dts/al/alpine-v2.dtsi
index 5b7bef684256..6f35bab10e9d 100644
--- a/arch
interrupt-controller"
Signed-off-by: Phil Edworthy
---
arch/arm/boot/dts/alpine.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index 731df7a8c4e6..533c876497ff 100644
--- a/arch/arm/boot/dts/alpine.dtsi
interrupt-controller"
Signed-off-by: Phil Edworthy
---
arch/arm/boot/dts/ox820.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ox820.dtsi b/arch/arm/boot/dts/ox820.dtsi
index 085bbd33eadc..3a17ab4e7c2f 100644
--- a/arch/arm/boot/dts/ox820.dtsi
+++
Hi Geert,
On 23 November 2018 09:41 Geert Uytterhoeven wrote:
> Subject: Re: [PATCH] pinctrl: rzn1: Fix check for used MDIO bus
> On Mon, Nov 19, 2018 at 5:18 PM Phil Edworthy wrote:
> > This fixes the check for unused mdio bus setting and the following
> > static checker war
Hi Simon,
On 22 November 2018 14:09 Simon Horman wrote:
> On Mon, Nov 19, 2018 at 04:18:38PM +0000, Phil Edworthy wrote:
> > This fixes the check for unused mdio bus setting and the following
> > static checker warning:
> > drivers/pinctrl/pinctrl-rzn1.c:198 rzn1_pinctrl_md
clk_prepare_enable, etc to be called on the returned reference
without additional checks.
Signed-off-by: Phil Edworthy
Reviewed-by: Andy Shevchenko
---
v8:
- Remove else clause
v7:
- Instead of messing with the core functions, simply wrap them for the
_optional() versions. By putting clk_get_optional
The sub-nodes should not be called gpio-controller, but simply gpio.
Signed-off-by: Phil Edworthy
---
Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
b
Hi Andy,
On 20 November 2018 10:39 Andy Shevchenko wrote:
> On Mon, Nov 19, 2018 at 02:12:59PM +0000, Phil Edworthy wrote:
> > This adds clk_get_optional() and devm_clk_get_optional() functions to
> > get optional clocks.
> > They behave the same as (devm_)clk_get except wh
ing of_get_child_count()
Reported-by: Dan Carpenter
Signed-off-by: Phil Edworthy
---
v2:
- Don't rely on rely on the implicit typecast from -1 to uint
---
drivers/pinctrl/pinctrl-rzn1.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rzn1.c b/d
clk_prepare_enable, etc to be called on the returned reference
without additional checks.
Signed-off-by: Phil Edworthy
---
v7:
- Instead of messing with the core functions, simply wrap them for the
_optional() versions. By putting clk_get_optional() inline in the header
file, we can get rid of the
Hi Uwe,
On 19 November 2018 12:58 Uwe Kleine-König wrote:
> On Mon, Nov 19, 2018 at 12:53:46PM +0000, Phil Edworthy wrote:
> > On 19 November 2018 10:46 Uwe Kleine-König wrote:
> > > On Mon, Nov 19, 2018 at 10:41:42AM +0000, Phil Edworthy wrote:
> > &g
Hi Uwe,
On 19 November 2018 10:46 Uwe Kleine-König wrote:
> On Mon, Nov 19, 2018 at 10:41:42AM +0000, Phil Edworthy wrote:
> > On 16 November 2018 16:11 Uwe Kleine-König wrote:
> > > On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> > > > Other
Hi Uwe,
On 16 November 2018 16:11 Uwe Kleine-König wrote:
> On Fri, Nov 16, 2018 at 05:01:28PM +0100, Uwe Kleine-König wrote:
> > Other than that I think the patch is fine
>
> Thinking again, I wonder why not just do:
>
> static inline struct clk *clk_get_optional(struct device *dev, const char
Hi Rob,
On 17 November 2018 14:33 Rob Herring wrote:
> On Tue, Nov 13, 2018 at 01:09:09PM +0000, Phil Edworthy wrote:
> > Add device binding documentation for the Renesas RZ/N1 GPIO interrupt
> > multiplexer.
> >
> > Signed-off-by: Phil Edworthy
> > ---
>
d, so there is nothing to do in this driver when an interrupt
is received, other than tell the corresponding GPIO block.
Signed-off-by: Phil Edworthy
---
v2:
- Use interrupt-map to allow the GPIO controller info to be specified
as part of the irq.
- Renamed struct and funcs from 'girq&
This provides a pinctrl driver for the Renesas R9A06G032 SoC
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy
---
v6:
- No changes.
v5:
- No changes.
v4:
- No changes.
v3:
- No changes.
v2:
- Add "renesas,rzn1-pinctrl" compatibl
This provides a pinctrl driver for the Renesas RZ/N1 device family.
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy
Reviewed-by: Jacopo Mondi
---
v6:
- Instead of combining the pin nr and func into a single element, use
a pair of 8-bit elements
The Renesas RZ/N1 device family PINCTRL node description.
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy
Reviewed-by: Jacopo Mondi
---
v6:
- Instead of combining the pin nr and func into a single element, use
a pair of 8-bit elements.
v5
mple.
- Change the way the functions are defined so it is easy to check
against the hardware numbering.
v2:
- Change to generic rzn1 family driver, instead of device specific.
- Review comments fixed.
- Fix error handling during probe
Phil Edworthy (3):
dt-bindings: pinctrl: renes
Hi Geert,
On 24 September 2018 12:59 Geert Uytterhoeven wrote:
> On Wed, Sep 19, 2018 at 4:24 PM Phil Edworthy wrote:
> > This provides a pinctrl driver for the Renesas RZ/N1 device family.
> >
> > Based on a patch originally written by Michel Pollet at Renesas.
> &
Hi Stephen,
On 03 September 2018 10:33 Phil Edworthy wrote:
> On 01 September 2018 03:46, Stephen Boyd wrote:
> > Quoting Phil Edworthy (2018-08-31 07:07:22)
> > > diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c index
> > > 9ab3db8..4adb99e 100644
>
Hi Stephen,
On 01 September 2018 03:46, Stephen Boyd wrote:
> Quoting Phil Edworthy (2018-08-31 07:07:22)
> > diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c index
> > 9ab3db8..4adb99e 100644
> > --- a/drivers/clk/clkdev.c
> > +++ b/drivers/clk/cl
: Phil Edworthy
---
v5:
- No changes.
v4:
- No changes.
v3:
- No changes.
---
drivers/clk/clk-devres.c | 18 --
drivers/clk/clkdev.c | 17 +++--
include/linux/clk.h | 29 +
3 files changed, 60 insertions(+), 4 deletions(-)
diff
Quite a few drivers get an optional clock, e.g. a clock required
to access peripheral's registers that is always enabled on some
devices.
This function behaves the same as of_clk_get_by_name() except that
it will return NULL instead of -ENOENT.
Signed-off-by: Phil Edworthy
---
v5:
- Simpl
Quite a few drivers get an optional clock, e.g. a bus clock required to
access peripheral's registers that is always enabled on some devices.
Phil Edworthy (2):
clk: Add of_clk_get_by_name_optional() function
clk: Add functions to get optional clocks
drivers/clk/clk-devres.c
Hi Andy,
On 29 August 2018 18:11 Andy Shevchenko wrote:
> On Tue, Jul 31, 2018 at 01:10:59PM +0100, Phil Edworthy wrote:
> > Quite a few drivers get an optional clock, e.g. a clock required
> > to access peripheral's registers that is always enabled on some
> > devi
: Phil Edworthy
---
v4:
- No changes.
v3:
- No changes.
---
drivers/clk/clk-devres.c | 18 --
drivers/clk/clkdev.c | 17 +++--
include/linux/clk.h | 29 +
3 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/drivers/clk
Quite a few drivers get an optional clock, e.g. a clock required
to access peripheral's registers that is always enabled on some
devices.
This function behaves the same as of_clk_get_by_name() except that
it will return NULL instead of -ENOENT.
Signed-off-by: Phil Edworthy
---
v4:
Quite a few drivers get an optional clock, e.g. a bus clock required to
access peripheral's registers that is always enabled on some devices.
Phil Edworthy (2):
clk: Add of_clk_get_by_name_optional() function
clk: Add functions to get optional clocks
drivers/clk/clk-devres.c
Hi Andy,
On 30 July 2018 17:04, Andy Shevchenko wrote:
> On Mon, 2018-07-30 at 14:31 +0100, Phil Edworthy wrote:
> > Quite a few drivers get an optional clock, e.g. a clock required to
> > access peripheral's registers that is always enabled on some devices.
> >
> >
: Phil Edworthy
---
v3:
- No changes.
---
drivers/clk/clk-devres.c | 18 --
drivers/clk/clkdev.c | 17 +++--
include/linux/clk.h | 29 +
3 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-devres.c b
Quite a few drivers get an optional clock, e.g. a bus clock required to
access peripheral's registers that is always enabled on some devices.
Phil Edworthy (2):
clk: Add of_clk_get_by_name_optional() function
clk: Add functions to get optional clocks
drivers/clk/clk-devres.c
Quite a few drivers get an optional clock, e.g. a clock required
to access peripheral's registers that is always enabled on some
devices.
This function behaves the same as of_clk_get_by_name() except that
it will return NULL instead of -EINVAL.
Signed-off-by: Phil Edworthy
---
v3:
- Fix
Hi Geert,
On 30 July 2018 09:56, Geert Uytterhoeven wrote:
> On Mon, Jul 30, 2018 at 10:36 AM Phil Edworthy wrote:
> > Quite a few drivers get an optional clock, e.g. a clock required to
> > access peripheral's registers that is always enabled on some devices.
> >
>
r and allows clk_prepare_enable, etc to be called
on the returned reference without additional checks.
Signed-off-by: Phil Edworthy
---
drivers/clk/clkdev.c | 34 ++
include/linux/clk.h | 1 +
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/driver
Quite a few drivers get an optional clock, e.g. a clock required
to access peripheral's registers that is always enabled on some
devices.
Phil Edworthy (2):
clk: Add of_clk_get_by_name_optional() function
clk: Add functions to get optional clocks
drivers/clk/clk-devres.c
: Phil Edworthy
---
drivers/clk/clk-devres.c | 18 --
drivers/clk/clkdev.c | 17 +++--
include/linux/clk.h | 29 +
3 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
Hi Stephen,
On 25 July 2018 23:37, Stephen Boyd wrote:
> Quoting Phil Edworthy (2018-07-18 06:56:26)
> > On 18 July 2018 14:19, Geert Uytterhoeven wrote:
> > > On Wed, Jul 18, 2018 at 3:02 PM Russell King - ARM Linux wrote:
> > > > On Wed, Jul 18, 2018 at 01:57:3
Hi Geert,
On 20 July 2018 13:12, Geert Uytterhoeven wrote:
> On Fri, Jul 20, 2018 at 2:06 PM Phil Edworthy wrote:
> > On 20 July 2018 12:21, Geert Uytterhoeven wrote:
> > > On Wed, Jul 18, 2018 at 4:34 PM Phil Edworthy wrote:
> > > > To avoid all SoC peripheral
Hi Russell,
On 18 July 2018 14:19, Geert Uytterhoeven wrote:
> On Wed, Jul 18, 2018 at 3:02 PM Russell King - ARM Linux wrote:
> > On Wed, Jul 18, 2018 at 01:57:38PM +0100, Phil Edworthy wrote:
> > > Behaves the same as (devm_)clk_get except where there is no clock
> >
: Phil Edworthy
---
drivers/clk/clk-devres.c | 11 +++
drivers/clk/clkdev.c | 11 +++
include/linux/clk.h | 27 +++
3 files changed, 49 insertions(+)
diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
index d854e26..63295d9 100644
--- a
The driver requires an undocumented clock property, so detail it.
Add documentation for a separate bus clock.
Signed-off-by: Phil Edworthy
---
Documentation/devicetree/bindings/i2c/i2c-designware.txt | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation
The Synopsys I2C Controller has a bus clock, but typically SoCs hide this away.
However, on some SoCs you need to explicity enable the bus clock in order to
access the registers.
Therefore, enable an optional bus clock specified by DT.
Signed-off-by: Phil Edworthy
---
drivers/i2c/busses/i2c
Hi Dan,
On 31 May 2018 07:24 Dan Carpenter wrote:
> Smatch flags a couple bugs here:
>
> drivers/gpio/gpio-dwapb.c:447 dwapb_configure_irqs() warn: always true
> condition '(pp->irq[i] >= 0) => (0-u32max >= 0)'
> drivers/gpio/gpio-dwapb.c:627 dwapb_gpio_get_pdata() warn: always true
> condition '
r feedback came afterwards.
However, in my haste I managed to drop the changes made to dwapb_port_property
struct. This patch includes those missing changes.
Signed-off-by: Phil Edworthy
---
include/linux/platform_data/gpio-dwapb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Simon,
On 23 May 2018 10:12 Simon Horman wrote:
> On Wed, May 23, 2018 at 09:52:44AM +0100, Phil Edworthy wrote:
> > Treat DT and ACPI the same as much as possible. Note that we can't use
> > platform_get_irq() to get the DT interrupts as they are in the port
> > sub-
t_irq().
Signed-off-by: Phil Edworthy
---
drivers/gpio/gpio-dwapb.c | 53 ---
1 file changed, 22 insertions(+), 31 deletions(-)
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 7dcd06b..15b4154 100644
--- a/drivers/gpio/gpio-dwapb.c
Hi Linus,
On 23 May 2018 09:29, Linus Walleij wrote:
> On Fri, May 11, 2018 at 10:31 AM, Phil Edworthy wrote:
>
> > The DesignWare GPIO IP can be configured for either 1 interrupt or 1
> > per GPIO in port A, but the driver currently only supports 1 interrupt.
> > See th
s, it will
get as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
Signed-off-by: Phil Edworthy
Reviewed-by: Rob Herring
Acked-by: Lee Jones
When using kgdb, you get an abort when accessing the UART registers.
This is because the driver has already entered runtime PM and so turned
off the bus clock needed to access the registers.
To fix this, set the capability indicating Runtime PM is active while idle.
Signed-off-by: Phil Edworthy
From: Michel Pollet
A message can be forged to crash the stack; here we make sure we don't
completely break the system if this occurs
Signed-off-by: Michel Pollet
---
drivers/usb/gadget/function/rndis.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/gadget/function/rndis.c
Hi Andy,
On 05 May 2018 11:49 Andy Shevchenko wrote:
> On Thu, Apr 26, 2018 at 7:19 PM, Phil Edworthy wrote:
>
> Sotty fo a late response. Consider follow up fixes for below.
>
> > if (!pp->irq_shared) {
> > + int i;
> > +
> > +
Hi Rob,
On 01 May 2018 14:29 Rob Herring wrote:
> On Mon, Apr 23, 2018 at 02:33:06PM +0100, Phil Edworthy wrote:
> > On RZ/N1 devices, there are 3 Synopsys DesignWare GPIO blocks each
> > configured to have 32 interrupt outputs, so we have a total of 96 GPIO
> > interru
s, it will
get as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
ACPI companion code provided by Hoan Tran . This was tested
on X-Gene by H
d, so there is nothing to do in this driver when an interrupt
is received, other than tell the corresponding GPIO block.
Signed-off-by: Phil Edworthy
---
.../interrupt-controller/renesas,rzn1-mux.txt | 85 ++
drivers/irqchip/Kconfig| 10 ++
drivers/ir
Hi Hoan
On 18 April 2018 08:03 Hoan Tran wrote:
> On Fri, Apr 13, 2018 at 9:47 AM, Phil Edworthy wrote:
> > On 13 April 2018 17:37 Hoan Tran wrote:
> >> On Fri, Apr 13, 2018 at 1:51 AM, Phil Edworthy wrote:
> >> > The DesignWare GPIO IP can be configured for eith
s, it will
get as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
Signed-off-by: Phil Edworthy
---
One point to mention is that I have made
Hi Rob,
On 16 April 2018 21:03 Rob Herring wrote:
> On Fri, Apr 13, 2018 at 09:51:12AM +0100, Phil Edworthy wrote:
> > The DesignWare GPIO IP can be configured for either 1 interrupt or 1
> > per GPIO in port A, but the driver currently only supports 1 interrupt.
> &g
Hi Hoan,
On 13 April 2018 17:37 Hoan Tran wrote:
> On Fri, Apr 13, 2018 at 1:51 AM, Phil Edworthy wrote:
> > The DesignWare GPIO IP can be configured for either 1 interrupt or 1
> > per GPIO in port A, but the driver currently only supports 1 interrupt.
> > See the DesignWare
s, it will
get as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
Signed-off-by: Phil Edworthy
---
One point to mention is that I have made
Hi Geert,
On 13 April 2018 09:20 Geert Uytterhoeven wrote:
> On Fri, Apr 13, 2018 at 10:08 AM, Phil Edworthy wrote:
> > Since the way the Synopsys GPIO interrupts are stored has changed,
> > this driver needs to be updated in line with the changes.
> >
> > S
Since the way the Synopsys GPIO interrupts are stored has changed, this
driver needs to be updated in line with the changes.
Signed-off-by: Phil Edworthy
---
v2:
- New patch in v2 to fix the only other user of struct dwapb_port_property.
---
drivers/mfd/intel_quark_i2c_gpio.c | 3 ++-
1 file
s, it will
get as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
Signed-off-by: Phil Edworthy
---
v2:
- Replaced interrupt-mask DT
interrupts-extended DT prop.
However, I have no use for this and had to hack some test case for this.
Perhaps the driver should support 1 interrupt or all GPIOa as interrupts?
Phil Edworthy (2):
gpio: dwapb: Add support for 1 interrupt per port A GPIO
mfd: intel_quark_i2c_gpio: Update Syn
Hi Andy,
On 05 April 2018 10:43, Phil Edworthy wrote:
> On 30 March 2018 22:26 Andy Shevchenko wrote:
> > On Wed, Mar 28, 2018 at 5:22 PM, Phil Edworthy wrote:
> > > The DesignWare GPIO IP can be configured for either 1 or 32
> > > interrupts,
> >
> > 1 to 3
Hi Geert,
On 10 April 2018 15:29 Geert Uytterhoeven wrote:
> On Tue, Apr 10, 2018 at 4:23 PM, Phil Edworthy wrote:
> > On 10 April 2018 07:24 Phil Edworthy wrote:
> >> On 09 April 2018 20:20 Rob Herring wrote:
> >> > On Wed, Mar 28, 2018 at 03:22:3
Hi Rob,
On 10 April 2018 07:24 Phil Edworthy wrote:
> On 09 April 2018 20:20 Rob Herring wrote:
> > On Wed, Mar 28, 2018 at 03:22:30PM +0100, Phil Edworthy wrote:
[...]
> > > +- interrupt-mask : a 32-bit bit mask that specifies which interrupts
> > > +in the list
>
Hi Rob,
On 09 April 2018 20:20 Rob Herring wrote:
> On Wed, Mar 28, 2018 at 03:22:30PM +0100, Phil Edworthy wrote:
> > The DesignWare GPIO IP can be configured for either 1 or 32
> > interrupts, but the driver currently only supports 1 interrupt. See
> > the DesignWare
Hi Geert,
On 06 April 2018 10:57 Geert Uytterhoeven wrote:
> On Thu, Apr 5, 2018 at 11:42 AM, Phil Edworthy wrote:
> > On 30 March 2018 22:26 Andy Shevchenko wrote:
> >> On Wed, Mar 28, 2018 at 5:22 PM, Phil Edworthy wrote:
> >> > The DesignWare GPIO IP can be
Hi Andy,
On 30 March 2018 22:26 Andy Shevchenko wrote:
> On Wed, Mar 28, 2018 at 5:22 PM, Phil Edworthy wrote:
> > The DesignWare GPIO IP can be configured for either 1 or 32
> > interrupts,
>
> 1 to 32, or just a choice between two?
Just a choice of 1 or 32.
Note that
Hi,
On 28 March 2018 15:23, Phil Edworthy wrote:
> The DesignWare GPIO IP can be configured for either 1 or 32 interrupts,
> but the driver currently only supports 1 interrupt. See the DesignWare
> DW_apb_gpio Databook description of the 'GPIO_INTR_IO' parameter.
>
&g
et as many interrupts as specified in the DT 'interrupts' property.
It doesn't do anything clever with the different interrupts, it just calls
the same handler used for single interrupt hardware.
Signed-off-by: Phil Edworthy
---
Note: There are a few lines over 80 chars, but thi
Hi Andy,
On 13 March 2018 16:36, Andy Shevchenko wrote:
> On Mon, Mar 12, 2018 at 8:30 PM, Phil Edworthy
> wrote:
> > Enable an optional bus clock provided by DT.
>
> FWIW,
> Reviewed-by: Andy Shevchenko
Thanks!
> (Assuming it has been tested on clock-less cases)
en tested on the Renesas RZ/ND-DB board with the RZ/N1 SoC. The
Arasan IP in this device is version 1.39a and uses a max SD clock of 50MHz and
does not support DDR modes.
Signed-off-by: Phil Edworthy
---
v2:
- Changed commit msg to detail the cards that fail.
- Provided the IP version and further
Enable an optional bus clock provided by DT.
Signed-off-by: Phil Edworthy
---
v2:
- Fix include order.
- Use a clock name.
- Check errors from clk_prepare_enable()
- Add calls to enable/disable the clock in PM
---
drivers/gpio/gpio-dwapb.c | 20 +++-
1 file changed, 19
From: Michel Pollet
Enable specified clocks from DTS, if any.
Signed-off-by: Michel Pollet
---
drivers/gpio/gpio-dwapb.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index b0704a8..56c58b5 100644
--- a/drivers/gpio/gpio-dwapb.c
Hi Shawn,
On 28 February 2018 01:53, Shawn Lin wrote:
> On 2018/2/27 23:05, Phil Edworthy wrote:
> > On 27 February 2018 14:42, Shawn Lin wrote:
> >> On 2018/2/27 22:31, Phil Edworthy wrote:
> >>> On 27 February 2018 14:28, Shawn Lin wrote:
> >>
Hi Shawn,
On 27 February 2018 14:42, Shawn Lin wrote:
> On 2018/2/27 22:31, Phil Edworthy wrote:
> > Hi Shawn,
> >
> > On 27 February 2018 14:28, Shawn Lin wrote:
> >> 在 2018/2/27 21:55, Phil Edworthy 写道:
> >>> Since the controller does not
Hi Shawn,
On 27 February 2018 14:28, Shawn Lin wrote:
> 在 2018/2/27 21:55, Phil Edworthy 写道:
> > Since the controller does not support the end-of-busy IRQ, don't use it.
> > Otherwise, on older SD cards you will get lots of these messages:
> > "mmc0: Got data inte
Hi Adrian,
On 27 February 2018 14:08, Adrian Hunter wrote:
> On 27/02/18 15:55, Phil Edworthy wrote:
> > Since the controller does not support the end-of-busy IRQ, don't use it.
> > Otherwise, on older SD cards you will get lots of these messages:
> > "mmc0: Got
Arasan IP.
See https://patchwork.kernel.org/patch/8062871/
This has been tested on the Renesas RZ/ND-DB board with the RZ/N1 SoC.
Signed-off-by: Phil Edworthy
---
drivers/mmc/host/sdhci-of-arasan.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci
Hi Simon,
On 26 February 2018, Michel Pollet wrote:
>
> This series adds the plain basic support for booting a bare
> kernel on the RZ/N1D-DB Board. It's been trimmed to the strict
> minimum as a 'base', further patches that will add the
> rest of the support, pinctrl, clock architecture and quit
/boot/dts/r8a7791-koelsch.dts
> >>> @@ -660,6 +660,7 @@
> >>>};
> >>>
> >>>&pcie_bus_clk {
> >>> + clock-frequency = <1>;
>
> >> Hmmm, looking at the Koelsch schematics, I don'
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