Hi,
Ji-Ze Hong (Peter Hong) 於 2016/5/31 上午 09:33 寫道:
This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
Sorry, I forgot to change the mail title for "PATCH V9". I'll resend a
patch with title "PATCH V9".
Thanks
--
With Best Regards,
Peter Hung
Hi Andy,
Andy Shevchenko 於 2016/2/23 下午 07:05 寫道:
On Tue, 2016-02-23 at 14:30 +0800, Peter Hung wrote:
+config MFD_FINTEK_F81504_CORE
+tristate "Fintek F81504/508/512 PCIE-to-UART/GPIO MFD
support"
+depends on PCI
+select MFD_CORE
+default S
-f81504.c
3. drivers/tty/serial/8250/8250_f81504.c
V1:
1. Split F81504/508/512 from 8250_pci.c to 8250_fintek_pci.c.
Alan & Andy recommend me to rewrite as MFD architecture.
Peter Hung (4):
mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core
support
gpio: g
: RTS driven high when TX, otherwise low
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_f81504.c | 250 ++
drivers/tty/serial/8250/Kconfig | 10 ++
drivers/tty/serial/8250/Mak
tx: 1 - Push Pull
In this driver, we only implements open drain mode.
IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/gpio/Kconfig | 10 ++
drivers/gpio/Mak
-by: Paul Gortmaker
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 206 +
1 file changed, 5 insertions(+), 201 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.c
out for UART9 / GPIO3
bit4: UART10 pin out for UART10 / GPIO4
bit5: UART11 pin out for UART11 / GPIO5
bit6~7: Reserve
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/mfd/Kconfig| 12 ++
drivers/mfd/Makefil
Hi Linus,
Linus Walleij 於 2016/2/16 下午 11:22 寫道:
On Tue, Feb 16, 2016 at 7:55 AM, Peter Hung wrote:
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
Acked-by: Linus Walleij
It's fine with me if this is queued in MFD, serial or whatever tre
Hi Andy,
Andy Shevchenko 於 2016/2/16 下午 05:11 寫道:
On Tue, 2016-02-16 at 14:55 +0800, Peter Hung wrote:
+static u32 baudrate_table[] = { 150, 1152000, 921600 };
+static u8 clock_table[] = { F81504_CLKSEL_24_MHZ,
F81504_CLKSEL_18DOT46_MHZ
Hi Linus,
Linus Walleij 於 2016/2/10 下午 05:08 寫道:
On Thu, Jan 28, 2016 at 10:20 AM, Peter Hung wrote:
+#include
+#include
Drivers should just
#include
ok.
+static struct f81504_gpio_chip *gpio_to_f81504_chip(struct gpio_chip *chip)
+{
+ return container_of(chip, struct
tx: 1 - Push Pull
In this driver, we only implements open drain mode.
IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/gpio/Kconfig | 10 ++
drivers/gpio/Mak
out for UART9 / GPIO3
bit4: UART10 pin out for UART10 / GPIO4
bit5: UART11 pin out for UART11 / GPIO5
bit6~7: Reserve
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/mfd/Kconfig| 12 ++
drivers/mfd/Makefil
: RTS driven high when TX, otherwise low
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_f81504.c | 254 ++
drivers/tty/serial/8250/Kconfig | 11 ++
drivers/tty/serial/8250/Mak
-by: Paul Gortmaker
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 206 +
1 file changed, 5 insertions(+), 201 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.c
ers/tty/serial/8250/8250_f81504.c
V1:
1. Split F81504/508/512 from 8250_pci.c to 8250_fintek_pci.c.
Alan & Andy recommend me to rewrite as MFD architecture.
Peter Hung (4):
mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core
support
gpio: gpio-f81504: Add Fin
Hi Andy,
Andy Shevchenko 於 2016/1/29 下午 08:40 寫道:
On Fri, 2016-01-29 at 16:20 +0800, Peter Hung wrote:
Hi Andy,
Andy Shevchenko 於 2016/1/28 下午 08:04 寫道:
On Thu, 2016-01-28 at 17:20 +0800, Peter Hung wrote:
- /* Fintek PCI serial cards */
- { PCI_DEVICE(0x1c29, 0x1104
Hi Andy,
Andy Shevchenko 於 2016/1/29 下午 09:41 寫道:
On Fri, 2016-01-29 at 13:50 +0800, Peter Hung wrote:
Andy Shevchenko 於 2016/1/28 下午 07:55 寫道:
I would suggest to rearrange definition block here (and in the rest
of
the functions in entire series) to somehow follow the following
pattern
1
Hi Andy,
Andy Shevchenko 於 2016/1/28 下午 08:04 寫道:
On Thu, 2016-01-28 at 17:20 +0800, Peter Hung wrote:
- /* Fintek PCI serial cards */
- { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 },
- { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8
Hi Andy,
Andy Shevchenko 於 2016/1/28 下午 08:03 寫道:
On Thu, 2016-01-28 at 17:20 +0800, Peter Hung wrote:
+ /* set output data */
+ tmp = inb(priv->gpio_ioaddr + gc->idx);
ioread8 is a bit better since it automatically works with IO space and
MMIO. But if you are certain yo
iver = {
+ .pm = &f81504_pm_ops,
+ .owner = THIS_MODULE,
kbuild already complained about.
ok
diff --git a/include/linux/mfd/f81504.h b/include/linux/mfd/f81504.h
new file mode 100644
index 000..13bd0ae
--- /dev/null
+++ b/include/linux/mfd/f81504.h
@@ -0,0 +1,52 @@
+#ifndef __F81504_H__
__MFD_F…
ok
Thanks for your advices
--
With Best Regards,
Peter Hung
e here with pci_resource_start().
--
With Best Regards,
Peter Hung
/GPIO UART support
mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core support
We must remove F81504/508/512 support in 8250_pci.c and migrate to
f81504-core/8250_f81504 to enable MFD support.
Suggested-by: Paul Gortmaker
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250
: RTS driven high when TX, otherwise low
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_f81504.c | 254 ++
drivers/tty/serial/8250/Kconfig | 11 ++
drivers/tty/serial/8250/Mak
out for UART9 / GPIO3
bit4: UART10 pin out for UART10 / GPIO4
bit5: UART11 pin out for UART11 / GPIO5
bit6~7: Reserve
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/mfd/Kconfig| 11 ++
drivers/mfd/Makefil
tx: 1 - Push Pull
In this driver, we only implements open drain mode.
IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)
Suggested-by: One Thousand Gnomes
Suggested-by: Andy Shevchenko
Signed-off-by: Peter Hung
---
drivers/gpio/Kconfig | 10 ++
drivers/gpio/Mak
n applied patches 1~3. After apply patch 4,
the device will control by F81504 MFD core driver.
Peter Hung (4):
mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core
support
gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB
support
8250: 8250_f81504: Add Fint
or driver loaded.
Please reference https://bitbucket.org/hpeter/fintek-general/src/
with f81534/tools to get user-space tool to change F81532/534
setting. Please use it carefully.
Signed-off-by: Peter Hung
---
Changelog:
v8
1. Remove driver mode GPIOLIB & RS485 control support, th
Hi Simon,
Simon Guinot 於 2016/1/22 下午 04:58 寫道:
On Fri, Jan 22, 2016 at 03:23:33PM +0800, Peter Hung wrote:
Acked-by: Simon Guinot
Thanks,
Should I resend patch V3 to add Acked-by?
--
With Best Regards,
Peter Hung
the address
of GPIO8x.
GPIO address is below:
GPIO0x based: 0xf0
GPIO1x based: 0xe0
GPIO2x based: 0xd0
GPIO3x based: 0xc0
GPIO4x based: 0xb0
GPIO5x based: 0xa0
GPIO6x based: 0x90
GPIO7x based: 0x80
GPIO8x based: 0x88 <-- not 0x70.
Signed-off-by: Peter H
add F81866 and second is a filter
to find enabled GPIO. But Simon say some mainboard maybe configure
the SuperIO with wrong setting. So the V2 patch only implements
F81866 GPIO control method the same with F7188x.
Peter Hung (1):
gpio-f7188x: Add F81866 GPIO supports
driv
e and implements GPIOLIB?
Thanks
--
With Best Regards,
Peter Hung
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Please read the FAQ at htt
Hello,
Andy Shevchenko 於 2015/12/13 上午 09:08 寫道:
On Tue, Dec 1, 2015 at 8:54 AM, Peter Hung wrote:
First of all, maybe you can consider to split this part of the driver
to separate one? (Like we did for 8250_mid.c). It seems 8250_pci is
too bloated. But it's just an idea, maybe for f
changed.
Please reference https://bitbucket.org/hpeter/fintek-general/src/
with f81534/tools to get set_gpio.c & set_mode.c to change F81532/534
setting. Please use it carefully.
Signed-off-by: Peter Hung
---
Changelog:
v7
1. Make all gpiolib function with #ifdef CONFIG_GPIOLIB marco bloc
.
F81508: Max for 8 serial ports.
UART2/3 is multi-function.
8/9/10/11 is GPIO only
F81512: Max for 12 serial ports.
UART2/3/8/9/10/11 is multi-function.
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 114 +++--
1
.
F81508: Max for 8 serial ports.
UART2/3 is multi-function.
8/9/10/11 is GPIO only
F81512: Max for 12 serial ports.
UART2/3/8/9/10/11 is multi-function.
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 114 +++--
1
Hi
Peter Hung 於 2015/11/3 上午 11:51 寫道:
> This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
> Changelog:
> v6
> 1. Re-implement the write()/resume() function. Due to this device cant be
> suitable with generic write(), we'll do the submit write URB
Hi,
Oliver Neukum 於 2015/11/4 下午 04:38 寫道:
On Wed, 2015-11-04 at 16:19 +0800, Peter Hung wrote:
Hi
Oliver Neukum 於 2015/11/3 下午 06:03 寫道:
On Tue, 2015-11-03 at 11:51 +0800, Peter Hung wrote:
+ for (i = 0; i < F81534_NUM_PORT; ++i)
+ atomic_set(&serial_priv->por
Hi
Andy Shevchenko 於 2015/11/3 下午 05:45 寫道:
On Tue, Nov 3, 2015 at 5:51 AM, Peter Hung wrote:
+ *Please reference https://bitbucket.org/hpeter/fintek-general/src/
+ *with f81534/tools to get set_gpio.c & set_mode.c. Please use it
+ *carefully.
Would it be good to have this u
Hi
Oliver Neukum 於 2015/11/3 下午 06:03 寫道:
On Tue, 2015-11-03 at 11:51 +0800, Peter Hung wrote:
+static int f81534_attach(struct usb_serial *serial)
+{
+ struct f81534_serial_private *serial_priv = NULL;
+ int status;
+ int i;
+ int offset;
+ uintptr_t setting_idx
changed.
Please reference https://bitbucket.org/hpeter/fintek-general/src/
with f81534/tools to get set_gpio.c & set_mode.c to change F81532/534
setting. Please use it carefully.
Signed-off-by: Peter Hung
---
Changelog:
v6
1. Re-implement the write()/resume() function. Due to this d
Hi Johan,
Johan Hovold 於 2015/9/14 下午 09:33 寫道:
On Tue, Jul 21, 2015 at 09:58:19AM +0800, Peter Hung wrote:
4. RS422 Mode
1. The RTS mode is dont care.
2. Set M2/M1/M0 as 0/0/0
I don't think all gpios should be exported for these ports if they have
sp
Johan Hovold 於 2015/9/14 下午 09:33 寫道:
> On Tue, Jul 21, 2015 at 09:58:19AM +0800, Peter Hung wrote:
>> This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
>>
> So as I mentioned above, always accept data if there's room in the fifo.
> Then kick of a write u
figuration when the parameter rs485 is NULL.
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.c
index e12e911..6804
ode with RTS logic high, tx mode with RTS logic low.
If user set to SER_RS485_ENABLED(default), we should set
reg with 0x31. if SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND
will set reg to 0x11.
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 61 ++
| SER_RS485_RTS_AFTER_SEND set and nothing else
(or be completely zeroed if SER_RS485_ENABLED was not set).
Thanks for your advice, I'll fix it and re-send patch
--
With Best Regards,
Peter Hung
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the body
RS485 mode.
RTS is controlled by H/W, RTS high with idle & RX, low with TX.
When it set with 0x31, it's configured with RS485 mode.
RTS is controlled by H/W, RTS low with idle & RX, high with TX.
We will force 0x01 on pci_fintek_setup().
Signed-off-by: Peter Hung
---
drivers/tty/seri
e code.
v2
1. v1 version submit to staging tree, but Greg KH advised me to
cleanup source code & re-submit it to correct subsystem
2. Remove all custom ioctl commands
Signed-off-by: Peter Hung
---
drivers/usb/serial/Kconfig | 10 +
drivers/usb/serial/Makefile |1 +
drivers/usb/serial
erge
some minor fix with newer patch.
--
With Best Regards,
Peter Hung
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Please read the FAQ at http://www.tux.org/lkml/
usbserial
subsystem callback function.
2. Use more defines to replece magic numbers to make it meaningful
3. Make more comments as document in source code.
v2
1. v1 version submit to staging tree, but Greg KH advised me to
cleanup source code & re-submit it to correc
Hi Johan,
Peter Hung 於 2015/7/9 上午 11:15 寫道:
> This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
>
Please pending for the driver, I found a problem with
prepare_write_buffer(). The driver submit write block size
!= real tx send size. It's will ok on transmitting small
comments as document in source code.
v2
1. v1 version submit to staging tree, but Greg KH advised me to
cleanup source code & re-submit it to correct subsystem
2. Remove all custom ioctl commands
Signed-off-by: Peter Hung
---
drivers/usb/serial/Kconfig | 10 +
Add New Fintek SuperIO F81866(0x1010) & F71868(0x1106)
with H/W Monitor functions.
We increased F71882FG_MAX_INS from 9 to 10 to read
F71868 10 voltage sets.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 53 ++--
1 file changed
not the same with
f71882fg too. They are using the same address 63H, but F81866 is
using bit 0/1/2 & 4/5/6, others are using bit 1/2/3 & 5/6/7,
So we copy from f_temp_beep_attr[] to f81866_temp_beep_attr
and change bit setting.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882f
The f81866a voltage-1 protector(VIN1) address
is differ from f71882.
f71882 status:12H, beep:13H, v-high:32H
f81866a status:16H, beep:17H, v-high:3aH
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 50 +++-
1 file changed, 41 insertions
enter Roeck)
2. Fix array size and content not match error.
(Thanks to Dan Carpenter)
V2
1. Fix comments by Guenter Roeck
all newer add IC should keep chip IDs in numeric order.
Peter Hung (3):
hwmon:f71882fg add f81866/f71868 SuperIO support
hwmon:f71882f
should re-testing patch after fix checkpatch.sh warnings.
I'll re-confirm all patches again before send it to maintainer.
--
With Best Regards,
Peter Hung
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Mor
Add New Fintek SuperIO F81866(0x1010) & F71868(0x1106)
with H/W Monitor functions.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 52 ++--
1 file changed, 37 insertions(+), 15 deletions(-)
diff --git a/drivers/hwmon/f71882fg.c b/dri
not the same with
f71882fg too. They are using the same address 63H, but F81866 is
using bit 0/1/2 & 4/5/6, others are using bit 1/2/3 & 5/6/7,
So we copy from f_temp_beep_attr[] to f81866_temp_beep_attr
and change bit setting.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882f
The f81866a voltage-1 protector(VIN1) address
is differ from f71882.
f71882 status:12H, beep:13H, v-high:32H
f81866a status:16H, beep:17H, v-high:3aH
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 50 +++-
1 file changed, 41 insertions
IDs in numeric order.
Peter Hung (3):
hwmon:f71882fg add f81866/f71868 SuperIO support
hwmon:f71882fg fix f81866a temp/beep setting
hwmon:f71882fg fix f81866a voltage protection
drivers/hwmon/f71882fg.c | 162 +--
1 file changed, 130 insertions
l recommends to implement with gpiolib, Could I implement
it and preserve the sysfs interface for legacy?
--
With Best Regards,
Peter Hung
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Add New Fintek SuperIO F81866(0x1010) & F71868(0x1106)
with H/W Monitor functions.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 50 ++--
1 file changed, 36 insertions(+), 14 deletions(-)
diff --git a/drivers/hwmon/f71882fg.c b/dri
The f81866a voltage-1 protector(VIN1) address
is differ from f71882.
f71882 status:12H, beep:13H, v-high:32H
f81866a status:16H, beep:17H, v-high:3aH
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882fg.c | 50 +++-
1 file changed, 41 insertions
not the same with
f71882fg too. They are using the same address 63H, but F81866 is
using bit 0/1/2 & 4/5/6, others are using bit 1/2/3 & 5/6/7,
So we copy from f_temp_beep_attr[] to f81866_temp_beep_attr
and change bit setting.
Signed-off-by: Peter Hung
---
drivers/hwmon/f71882f
The first patch will add Fintek F81866/F71868 SuperIO
with H/W monitor function to f71882fg.c
But some F81866 functional address is differ from F71882fg.
The following 2 patches will fix this problem.
Peter Hung (3):
hwmon:f71882fg add f81866/f71868 SuperIO support
hwmon:f71882fg fix
Hello Johan,
Peter Hung 於 2015/6/15 上午 09:54 寫道:
> This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
>
> Features:
> 1. F81534 is 1-to-4 & F81532 is 1-to-2 serial ports IC
> 2. Support Baudrate from B50 to B150 (excluding B100).
> 3. The RTS signal ca
it to correct subsystem
2. Remove all custom ioctl commands
If had any question, Please send email to
hpeter+linux_ker...@gmail.com
peter_h...@fintek.com.tw
Signed-off-by: Peter Hung
---
drivers/usb/serial/Kconfig | 10 +
drivers/usb/serial/Makefile |1 +
drivers/usb/serial/f8
Greg KH 於 2015/6/12 下午 12:33 寫道:
Why not just do the work now to clean up the file and get it merged
"properly"? Why put this in staging at all?
I'll clear up the file and resend it to usb-serial subsystem mail list.
Thanks for your advices.
--
With Best Regards,
P
D
Signed-off-by: Peter Hung
---
drivers/staging/Kconfig |2 +
drivers/staging/Makefile|1 +
drivers/staging/f81534/Kconfig | 10 +
drivers/staging/f81534/Makefile |1 +
drivers/staging/f81534/Readme |9 +
drivers/staging/f81534/TODO | 12 +
drivers/stagi
tial version, including 2 patches, one is cleanup code, another is fix
S3 bug.
Peter Hung (1):
serial: 8250_pci: port failed after wakeup from S3
drivers/tty/serial/8250/8250_pci.c | 114 -
1 file changed, 50 insertions(+), 64 deletions(-)
--
1.9.1
--
intek_init() and
set it to pci_serial_quirks .init section. It's will re-init this device when
system wakeup from pciserial_resume_ports().
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 114 -
1 file changed, 50 insertions(+), 64 deletions
Hello,
Thanks for your kindly support and code review.
It's my honor to work with you :D
Johan Hovold 於 2015/3/28 上午 12:17 寫道:
I'll apply the whole series now. Thanks again for fixing up this driver!
Johan
--
With Best Regards,
Peter Hung
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intek_init() and
set it to pci_serial_quirks .init section. It's will re-init this device when
system wakeup from pciserial_resume_ports().
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 114 -
1 file changed, 50 insertions(+), 64 del
t section. It's will re-init this
device when system wakeup from pciserial_resume_ports().
Peter Hung (2):
serial: 8250_pci: remove non-used var for F81504
serial: 8250_pci: port failed after wakeup from S3
drivers/tty/serial/8250/8250_pci.c | 121 +++--
Remove pci_fintek_setup() non-used var with calculation ciobase
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.c
index 892eb32
Change private struct member name from line_status to modem_status.
It will store MSR for some functions used
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial
The interrupt endpoint will report current IIR. If we got IIR with MSR changed
, We will do read MSR with interrupt_work worker to do f81232_read_msr()
function.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 126 +---
1 file changed, 118
This patch implement relative MCR/MSR function, such like
tiocmget()/tiocmset()/dtr_rts()/carrier_raised()
original f81232_carrier_raised() compared with wrong value UART_DCD.
It's should compared with UART_MSR_DCD.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c
We put FCR/IER initial step to f81232_port_enable()/f81232_port_disable().
When port is open, it set MSR interrupt on. Otherwise set it off.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 49 +
1 file changed, 49 insertions(+)
diff --git
We remove non-used define in this patch to avoid wrong usage.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 0da16ce..a0e0b9d 100644
--- a/drivers/usb
We extract TIOCGSERIAL section in f81232_ioctl() to f81232_get_serial_info()
to make it clarify.
Also we fix device type from 16654 to 16550A, and set it's baud_base
to 115200 (1.8432MHz/16).
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 30 +++---
1
Add me to co-author and fix no '>' in greg kh's email
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index a0e0b9d..54cc707 100644
--- a/
baudrate in set_termios() too, If baudrate larger then 115200,
it will be changed to 115200 and use tty_encode_baud_rate() to encode into tty
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 112 ++--
1 file changed, 108 insertions(+), 4 deletions
The F81232 bulk-in is RX data + LSR channel, data format is
[LSR+Data][LSR+Data]. , We had implemented in f81232_process_read_urb().
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 73 +
1 file changed, 40 insertions(+), 33 deletions
dd MSR change statistic when MSR has been read. (patch: 09/10)
8. clarify a lot of code about Johan suggested.
Peter Hung (10):
USB: f81232: rename private struct member name
USB: f81232: implement RX bulk-in EP
USB: f81232: change lock mechanism
USB: f81232: implement read IIR/MSR with e
x_lock.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 6b83870b..61a6a1a 100644
--- a/drivers/usb/serial/f81232.c
+++ b/drivers/usb/serial/f8
Hello,
Johan Hovold 於 2015/3/16 下午 04:55 寫道:
On Mon, Mar 16, 2015 at 11:08:29AM +0800, Peter Hung wrote:
Could you rewrite this as
if (status < 0)
status = usb_translate_errors(status);
else
status = 0;
In my definition the return value of
Hello,
Johan Hovold 於 2015/3/16 下午 04:52 寫道:
On Mon, Mar 16, 2015 at 10:53:38AM +0800, Peter Hung wrote:
To avoid confusing to user, I'll keep it without warning message.
Yes, skip the warning, but could you a short comment about this (e.g.
the 1-byte packet on open) before you do the
Hello,
Johan Hovold 於 2015/3/14 下午 08:02 寫道:
On Thu, Feb 26, 2015 at 06:02:10PM +0800, Peter Hung wrote:
+ if (status != sizeof(*val)) {
+ dev_err(&port->dev, "%s failed status: %d\n", __func__, status);
+
+ if (status == 0)
+
Hello,
Johan Hovold 於 2015/3/14 下午 07:48 寫道:
On Thu, Feb 26, 2015 at 06:02:08PM +0800, Peter Hung wrote:
- if (!urb->actual_length)
+ if ((urb->actual_length < 2) || (urb->actual_length % 2))
return;
Not parsing short data (e.g. not divisible by 2) i
Hello,
Greg KH 於 2015/3/15 下午 05:25 寫道:
Why did you cc: the linux-usb@vger mailing list on these? Don't you
mean linux-serial@vger?
Sorry for my fault. Should I resend it with correct mail-list with V2 ??
or just send this series patches ?
Thanks
--
With Best Regards,
Peter Hung
Remove pci_fintek_setup() non-used var with calculation ciobase
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.c
index 892eb32
t section. It's will re-init this
device when system wakeup from pciserial_resume_ports().
Peter Hung (2):
serial: 8250_pci: remove non-used var for F81504
serial: 8250_pci: port failed after wakeup from S3
drivers/tty/serial/8250/8250_pci.c | 121 +++--
intek_init() and
set it to pci_serial_quirks .init section. It's will re-init this device when
system wakeup from pciserial_resume_ports().
Signed-off-by: Peter Hung
---
drivers/tty/serial/8250/8250_pci.c | 114 -
1 file changed, 50 insertions(+), 64 deletions
Hello,
Peter Hung 於 2015/2/26 下午 06:02 寫道:
This series patch V8 is changed from V7 as following:
1. The V7 MSR strange delta value is checked with locking problem. We changed
f81232_set_mctrl() & f81232_read_msr() lock mechanism, the old version is
only locked with variable protec
elay received. (patch: 05/10)
6. fix MSR status bits changed but delta bits is 0 will cause read serial port
malfunctional with update port status. (patch: 08/10)
7. Add MSR change statistic when MSR has been read. (patch: 09/10)
8. clarify a lot of code about Johan suggested.
Peter Hung (10):
x_lock.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 25b1a47..cf5b902 100644
--- a/drivers/usb/serial/f81232.c
+++ b/drivers/usb/serial/f8
This patch implement relative MCR/MSR function, such like
tiocmget()/tiocmset()/dtr_rts()/carrier_raised()
original f81232_carrier_raised() compared with wrong value UART_DCD.
It's should compared with UART_MSR_DCD.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c
The interrupt endpoint will report current IIR. If we got IIR with MSR changed
, We will do read MSR with interrupt_work worker to do f81232_read_msr()
function.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 126 +---
1 file changed, 118
with u8, it's will make failed with baudrate lower than 600 (115200/300=384).
We had changed divisor to int type.
Signed-off-by: Peter Hung
---
drivers/usb/serial/f81232.c | 112 ++--
1 file changed, 108 insertions(+), 4 deletions(-)
diff --git a/dr
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