Hi Cong,
On 01/07/2020 21:58, Cong Wang wrote:
On Wed, Jul 1, 2020 at 9:05 AM Cong Wang wrote:
On Tue, Jun 30, 2020 at 2:08 PM Josh Hunt wrote:
Do either of you know if there's been any development on a fix for this
issue? If not we can propose something.
If you have a reproducer, I can l
On 30/06/2020 21:14, Josh Hunt wrote:
On 6/23/20 6:42 AM, Michael Zhivich wrote:
From: Jonas Bonn
To: Paolo Abeni ,
"net...@vger.kernel.org" ,
LKML ,
"David S . Miller" ,
John Fastabend
Subject: Re: Packet gets stuck in NOLOCK pfifo_fast qdisc
Date: Fr
Hi Paolo,
On 09/10/2019 21:14, Paolo Abeni wrote:
Something alike the following code - completely untested - can possibly
address the issue, but it's a bit rough and I would prefer not adding
additonal complexity to the lockless qdiscs, can you please have a spin
a it?
We've tested a couple of
Hi Paolo,
On 09/10/2019 21:14, Paolo Abeni wrote:
On Wed, 2019-10-09 at 08:46 +0200, Jonas Bonn wrote:
Hi,
The lockless pfifo_fast qdisc has an issue with packets getting stuck in
the queue. What appears to happen is:
i) Thread 1 holds the 'seqlock' on the qdisc and dequeues p
Hi,
The lockless pfifo_fast qdisc has an issue with packets getting stuck in
the queue. What appears to happen is:
i) Thread 1 holds the 'seqlock' on the qdisc and dequeues packets.
ii) Thread 1 dequeues the last packet in the queue.
iii) Thread 1 iterates through the qdisc->dequeue functi
On 13/06/2019 16:13, Maxim Mikityanskiy wrote:
On 2019-06-13 09:45, Jonas Bonn wrote:
Hi Max,
On 12/06/2019 12:42, Maxim Mikityanskiy wrote:
On 2019-06-11 13:03, Jonas Bonn wrote:
Patch 7dc2bccab0ee37ac28096b8fcdc390a679a15841 introduces a regression
with systemd 241. In that revision
Hi Max,
On 12/06/2019 12:42, Maxim Mikityanskiy wrote:
On 2019-06-11 13:03, Jonas Bonn wrote:
Patch 7dc2bccab0ee37ac28096b8fcdc390a679a15841 introduces a regression
with systemd 241. In that revision, systemd-networkd fails to pass the
required flags early enough. This appears to be
intended and
thereby with a warning in the kernel log.
CC: Maxim Mikityanskiy
CC: David S. Miller
CC: Alexey Kuznetsov
CC: Hideaki YOSHIFUJI
Signed-off-by: Jonas Bonn
---
net/ipv6/addrconf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/ipv6/addrconf.c b/net/ipv6
This patch is compile-tested only. I don't have the flash, I need your
help for testing this.
Tested this on my hardware. It works fine in the non-quad case.
Tested-by: Jonas Bonn
/Jonas
Thanks,
ta
drivers/mtd/spi-nor/spi-nor.c | 116 ++
include
This patch series hooks up proper support for USB suspend and resume to the
Atmel UDC.
Jonas Bonn (3):
usb: gadget: atmel_usba_udc: simplify setting of interrupt-enabled
mask
usb: gadget: atmel: support USB suspend
usb: gadget: atmel: tie wake lock to running clock
drivers/usb/gadget
This patch adds set and clear functions for enabling/disabling
interrupts. This simplifies the implementation a bit as the masking of
previously set bits doesn't need to be so explicit.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg Kroah-Hartman
CC: Nicolas
pended: in
both these states, the clock is stopped. As such, this patch associates
a "wake lock" with the running clock of the UDC to keep the system awake
as long as the host maintains the USB connection active.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg K
aiting for a wake-up.
This has been tested on a SAMA5D2 board.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg Kroah-Hartman
CC: Nicolas Ferre
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux-arm-ker...@lists.infradead.org
CC: linux-...@vger.kernel.org
---
driv
the controller.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/dr
even at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for dev
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
Acked-by: Nicolas Ferre
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
Hi Geert,
On 30/01/2019 08:35, Geert Uytterhoeven wrote:
Hi Jonas,
On Tue, Jan 29, 2019 at 9:55 PM Jonas Bonn wrote:
Some devices are slow and cannot keep up with the SPI bus and therefore
require a short delay between words of the SPI transfer.
The example of this that I'm looking at
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
I bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
drivers/spi/spi-atmel.c | 11 ++-
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6
the controller.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/dr
Hi,
On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
On 29/01/2019 at 09:38, Jonas Bonn wrote:
+ /* DLYBCT adds delays between words. This is useful for slow devices
+* that need a bit of time to setup the next transfer.
+*/
+ if (spi->word_delay
On 29/01/2019 10:35, Baolin Wang wrote:
On Tue, 29 Jan 2019 at 17:14, Jonas Bonn wrote:
On 29/01/2019 10:04, Baolin Wang wrote:
Hi Jonas,
On Tue, 29 Jan 2019 at 05:28, Jonas Bonn wrote:
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn
On 29/01/2019 10:04, Baolin Wang wrote:
Hi Jonas,
On Tue, 29 Jan 2019 at 05:28, Jonas Bonn wrote:
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn wrote:
@@ -164,6 +166,7 @@ struct spi_device {
charmodalias
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
SPI slaves are so slow that they are unable to keep up even at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
the controller.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/dr
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn wrote:
@@ -164,6 +166,7 @@ struct spi_device {
charmodalias[SPI_NAME_SIZE];
const char *driver_override;
int cs_gpio
On 28/01/2019 12:47, Mark Brown wrote:
On Mon, Jan 28, 2019 at 08:41:05AM +0100, Geert Uytterhoeven wrote:
On Sat, Jan 26, 2019 at 4:40 PM Jonas Bonn wrote:
spi-3wire: again, only set by MAXIM DS-1302 which always needs this
setting; driver could set this
For DS1302, this is probable
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
fast enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off
speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
drivers/spi/spi-atmel.c | 18 +-
include/linux/spi/spi.h | 3 +++
2 files changed, 16 insertions(+), 5 deletions(-)
--
2.19.1
Hi Geert,
On 26/01/2019 11:25, Geert Uytterhoeven wrote:
Hi Jonas,
On Sat, Jan 26, 2019 at 8:53 AM Jonas Bonn wrote:
On 25/01/2019 18:50, Mark Brown wrote:
On Fri, Jan 25, 2019 at 05:47:13PM +, Mark Brown wrote:
On Fri, Jan 25, 2019 at 01:06:45PM +0100, Jonas Bonn wrote:
Having this
On 25/01/2019 18:50, Mark Brown wrote:
On Fri, Jan 25, 2019 at 05:47:13PM +, Mark Brown wrote:
On Fri, Jan 25, 2019 at 01:06:45PM +0100, Jonas Bonn wrote:
Having this as device property rather than a transfer property allows this
to be configured one time in setup() rather than having
rrevocable! Whether or not this actually belongs in the
mainline kernel is therefore up for debate...
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Brezillon
CC: Richard Weinberger
CC: linux-...@lists.infradead.org
---
drivers/mtd/mtdchar.c
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
SPI slaves are so slow that they are unable to keep up even at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
fast enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off
Hi,
On 25/01/2019 12:53, Baolin Wang wrote:
Hi,
On Fri, 25 Jan 2019 at 19:44, Jonas Bonn wrote:
Some devices are slow and cannot keep up with the SPI bus and therefore
require a short delay between words of the SPI transfer.
The example of this that I'm looking at is a SAMA5D2 w
On 25/01/2019 12:44, Jonas Bonn wrote:
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC
fast enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
Documentation/devicetree/bindings/spi/spi-bus.txt | 1 +
drivers/spi/spi-at
Both the BP0-2 bits and the TBPROT bit are supported on this chip.
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Brezillon
CC: Richard Weinberger
CC: linux-...@lists.infradead.org
---
drivers/mtd/spi-nor/spi-nor.c | 2 +-
1 file changed, 1
t care about WP# normally won't even have
it connected.
Tested on a Cypress s25fl512s. With this patch, the WP# is always
respected, irregardless of whether any flash protection bits are set.
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Br
Hi,
On 05/11/2018 14:21, Greg KH wrote:
On Mon, Nov 05, 2018 at 11:35:57AM +0100, Jonas Bonn wrote:
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically present itself as:
add usb_device
add usb_interface-1
add subsystem-device-1.0
add subsystem-device-1.1
a
On 01/17/2018 11:34 PM, Daniel Wagner wrote:
On 01/17/2018 11:20 PM, Hauke Mehrtens wrote:
Do we want to do any changes to the kernel header files? I do not know
of any clean workaround to make this work, we can probably hack
something for connman, but I think it is not worth the trouble.
On 01/17/2018 08:59 AM, Daniel Wagner wrote:
Hi Neil,
On 01/16/2018 07:51 PM, Neil MacLeod wrote:
Since this commit in 4.15-rc8:
https://github.com/torvalds/linux/commit/6926e041a8920c8ec27e4e155efa760aa01551fd
building connman 1.35 with glibc 2.26 now fails as follows:
http://ix.io/EbP
On 02/24/2017 11:54 AM, Stefan Kristiansson wrote:
eOn Fri, Feb 24, 2017 at 10:57:19AM +0100, Jonas Bonn wrote:
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This brings it inline with the other setup oprations done like the cache
enables _ic_enable and _dc_enable
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Originally openrisc spec 0 specified that r0 would be wired to ground.
This is no longer the case. r0 is not guaranteed to be 0 at init, so we
need to initialize it to 0 before using it.
Also, if we are clearing r0 we cant use r0 to clear itself. Ch
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This brings it inline with the other setup oprations done like the cache
enables _ic_enable and _dc_enable. Also, this is going to make it
easier to initialize additional cpu's when smp is introduced.
This patch confuses
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Use execption SR stored in pt_regs for detection, the current SR is not
correct as the handler is running after return from exception.
Also, The code that checks for a delay slot uses a flag bitmask and then
wants to check if the result is not zero.
On 02/24/2017 05:32 AM, Stafford Horne wrote:
The strings used during the head/init phase of openrisc bootup were
stored in the executable section of the binary.
This causes compilation to fail when using CONFIG_DEBUG_INFO with
error:
Error: unaligned opcodes detected in executable segment
Al
Hi Stafford,
Squash this patch into the memcpy patch in order to prevent surprises
for anyone doing a git bisection through here.
/Jonas
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Valentin Rothberg
The Kconfig option for OR12000 is OR1K_1200.
Signed-off-by: Valentin Rothberg
Sig
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This adds an emulation layer for implementations
that lack the l.lwa and l.swa instructions.
It handles these instructions both in kernel space and
user space.
Signed-off-by: Stefan Kristiansson
[sho...@gmail.com: Added d
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Cleanups to whitespace and add some comments. Reading through the delay
slot logic I noticed some things:
- Delay slot instructions were not indented
- Some comments are not lined up
- Use tabs and spaces consistent with other code
No functiona
On 12/31/2016 11:50 PM, Stafford Horne wrote:
Hi Jonas,
On Sat, Dec 31, 2016 at 03:10:37PM +0100, Jonas Bonn wrote:
Hi Stafford,
Post-merge window patches should be bug fixes, only. Patch 1/3 probably
qualifies, but the others are far too trivial to be pushing now. Just put
them on your
Hi Stafford,
On 12/31/2016 12:52 PM, Stafford Horne wrote:
Hello,
These are a few small changes for openrisc I would like to include in 4.10.
The main change is a fix for building with alldefconfig to properly setup
then _text symbol. Others are trivial.
If no complaints I will push to 4.10 f
e kernel as in other architecture fixes this.
Signed-off-by: Stafford Horne
Acked-by: Jonas Bonn
---
arch/openrisc/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/openrisc/kernel/vmlinux.lds.S
b/arch/openrisc/kernel/vmlinux.lds.S
index ef31fc2..5525446 100644
NAK... this breaks other architectures.
The OpenRISC toolchain is broken with regard to this issue. Five years
ago (last I looked) nobody seemed interesting in fixing it. Has anything
changed here?
/Jonas
On 09/16/2016 04:42 PM, Stafford Horne wrote:
..From: Jonas Bonn
The syscall
define unveiled a bug in map_ram(),
where PTRS_PER_PGD was used when the intent was to iterate
over a set of page table entries.
This patch corrects that issue as well.
Signed-off-by: Stefan Kristiansson
Signed-off-by: Stafford Horne
Acked-by: Jonas Bonn
---
arch/openrisc/include/asm/pgtable
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Christian Svensson
Historically OpenRISC GCC has reserved r10 which we now use to hold
the thread pointer for thread-local storage (TLS).
I know this was proposed by way of this patch, but we deferred accepting
this until the OpenRISC spec co
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Jonas Bonn
Return to userspace via _resume_userspace instead of via syscall return
path for the rt_sigreturn syscall.
I'll rework this comment more later, but this patch needs testing.
This whole patch was reworked later... what hap
On 09/18/2016 05:22 PM, Guenter Roeck wrote:
On Wed, Apr 06, 2016 at 07:08:41PM +0900, Stafford Horne wrote:
Clearing out one todo item. This simplifies the boot process by using
the memblock api throughout the init process.
The old logic bootstrapped from memblock -> bootmem -> buddy allocator
ich, for
all > practical purpose,
> would be the correct state right now.
+CC The openrisc list
Understood, I don't think we would want that to happen.
Look at the entry today:
OPENRISC ARCHITECTURE
M: Jonas Bonn
W: http://openrisc.net
S: Maintained
T: git
. The default version will also descend nodes in the
match table such as "simple-bus" which should be fine as openrisc
doesn't have any of these (though it is preferred that memory-mapped
peripherals be grouped under a bus node(s)).
Signed-off-by: Rob Herring
Cc: Jonas Bonn
Signed-o
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Stefan Kristiansson
OpenRISC was not an SMP architecture last I looked... did the relevant
spec updates get made? If not, NAK.
The issue is, the OpenRISC architecture shouldn't be a moving target
defined by what the kernel supports... th
devices, for example: ONESHOT_STOPPED.
We weren't doing anything in the ->set_mode() callback. So, this patch
doesn't provide any set-state callbacks.
Cc: Jonas Bonn
Cc: li...@lists.openrisc.net
Signed-off-by: Viresh Kumar
Acked-by: Jonas Bonn
/Jonas
--
To unsubscribe from this list: send t
patch is the one to apply. You can put my Acked-by: Jonas
Bonn on it. Unfortunately, I'm not currently in a
position to do anything meaningful with it, so please send it upstream
directly via Andrew Morton's collection of assorted patches.
/Jonas
Thanks,
Paul Bolle
--
To u
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
On September 26, 2014 8:08:13 PM CEST, Guenter Roeck wrote:
>On Fri, Sep 26, 2014 at 01:53:01PM -0400, Eric Paris wrote:
>> Would you like me to carry this in the audit tree, since I'm the one
>who
>> broke it?
>>
>Hi Eric,
On 09/26/2014 06:05 PM, Guenter Roeck wrote:
> openrisc:defconfig fails to build in next-20140926 with the following error.
>
> In file included from arch/openrisc/kernel/signal.c:31:0:
> ./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
> ./arch/openrisc/include/asm/syscall.h:
On 09/26/2014 03:54 PM, Guenter Roeck wrote:
> openrisc:defconfig fails to build in next-20140926 with the following error.
>
> In file included from arch/openrisc/kernel/signal.c:31:0:
> ./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
> ./arch/openrisc/include/asm/syscall.h:
Hi Guenter,
On 09/22/2014 05:54 AM, Guenter Roeck wrote:
> On 09/21/2014 07:53 PM, Stefan Kristiansson wrote:
>> On Thu, Sep 18, 2014 at 09:56:38PM -0700, Guenter Roeck wrote:
>>> ping ... comments / feedback anyone ?
>>>
>>> Guenter
>>>
>>
>> FWIW, I've tested this and it works fine.
>>
Thanks,
On 05/29/2014 10:28 PM, Stefan Kristiansson wrote:
> On Tue, May 27, 2014 at 08:47:36AM +0200, Jonas Bonn wrote:
>> On 05/26/2014 10:52 PM, Geert Uytterhoeven wrote:
>>> CC devicetree for the bindings
>>>
>>> On Mon, May 26, 2014 at 10:31 PM, Stefan Krist
On 05/26/2014 10:52 PM, Geert Uytterhoeven wrote:
> CC devicetree for the bindings
>
> On Mon, May 26, 2014 at 10:31 PM, Stefan Kristiansson
> wrote:
>> +++
>> b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt
>> @@ -0,0 +1,23 @@
>> +OpenRISC 1000 Programmable Inter
On 05/21/2014 09:50 PM, Stefan Kristiansson wrote:
>
> I see two paths to go to get there though, and here's where I'd like some
> input.
> 1) Define the three different implementations as seperate irqchips,
>with accompanying IRQCHIP_DECLARE.
> 2) Add custom device-tree bindings and determin
On 05/19/2014 09:54 PM, Stefan Kristiansson wrote:
> On Mon, May 19, 2014 at 04:44:57PM +0200, Jonas Bonn wrote:
>
>> ii) Put a Depends on CONFIG_ARCH_OPENRISC in the Kconfig
>
> Hmm, do we really need that?
> The irqchip driver will picked by 'select'ing it from
Hi Stefan,
This looks good. Let's complete the the cleanup of this driver while
we're at it:
i) Move this file to drivers/irqchip/
ii) Put a Depends on CONFIG_ARCH_OPENRISC in the Kconfig
iii) Provide documentation for the binding at
Documentation/devicetree/bindings/interrupt-controller/
Copy
t of the
files contents.
But that's really just a nit! Nice work, otherwise.
Acked-by: Jonas Bonn
> +typedef long __kernel_time_t;
> +#define __kernel_time_t __kernel_time_t
> +
> +typedef long __kernel_clock_t;
> +#define __kernel_clock_t __kernel_clock_t
> +
> +#inclu
ady... I didn't check.
/Jonas
>
>
> --Andy
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arch" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Jonas Bonn
makes it easier for others to comment on and understand. This
rework fixes some real bugs, like the fact that syscall restart
did not work reliably.
Jonas Bonn (1):
openrisc: Rework signal handling
Richard Weinberger (1
On 12/19/2013 03:02 PM, Borislav Petkov wrote:
On Thu, Dec 19, 2013 at 02:36:40PM +0100, Jonas Bonn wrote:
In such situations I'd always search the net first, to see whether this
has been fixed already. Hint: try searching for "lockdep __udp4_lib_rcv"
Ah... my bad. Thanks!
Hi,
Here's a lockdep warning that I'm seeing on an MX28 with 3.13-rc4. This
seems to happen as soon as the network link comes up... including the
'netdev' list here as the backtrace shows the FEC driver in the stacktrace.
Any advice on how to proceed to track this down appreciated...
/Jonas
gt; 12 files changed, 118 insertions(+), 374 deletions(-)
> create mode 100644 include/asm-generic/fixmap.h
>
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&g
Hi Stefan,
Sorry... this one got lost in the discussion around the HW assisted TLB
loader.
The patch is fine, per se... compiles and runs without any obvious
degradation. The only concern I might have is the removal of "dead
code" which, at first glance, seems that it maybe should be
resur
Hi Joe,
On 12/02/2013 06:48 AM, Joe Perches wrote:
(Adding Jonas Bonn to list as he added the macro in the first place...)
Thanks... ;)
Actually, I think I submitted an even uglier macro called
DECLARE_PCI_DEVICE_TABLE... might have been the first kernel patch I
ever sent? In any case, it
c of doing sane
versioning of open source hardware.
On 11/16/13 12:01, Olof Kindgren wrote:
2013/11/16 Stefan Kristiansson
On Fri, Nov 15, 2013 at 10:50:18AM +0100, Jonas Bonn wrote:
+
+i2c0: ocores@a000 {
+#address-cells = <1>;
+#size-cells = <0&g
On 11/15/2013 12:39 PM, Olof Kindgren wrote:
2013/11/15 Jonas Bonn
On 11/15/2013 11:22 AM, Geert Uytterhoeven wrote:
This should probably be "altera,de0_nano". We also need to put a version
"terasic,de0_nano"? The board says "Designed and manufactured by Tera
On 11/15/2013 11:22 AM, Geert Uytterhoeven wrote:
This should probably be "altera,de0_nano". We also need to put a version
"terasic,de0_nano"? The board says "Designed and manufactured by Terasic".
Hmm, the sticker on the box says "Altera DE0-Nano".
Good question...
Version number needed.
The following changes since commit 5e01dc7b26d9f24f39abace5da98ccbd6a5ceb52:
Linux 3.12 (2013-11-03 15:41:51 -0800)
are available in the git repository at:
git://git.openrisc.net/~jonas/linux tags/for-3.13
for you to fetch changes up to 621c2cd853fca98258b720d9fe7e8c031ec7f96f:
openrisc
On 11/12/2013 08:42 PM, Geert Uytterhoeven wrote:
- Change fdt pointer (passed from head.S) from unsigned int to void *,
which allows to kill a cast, and makes it compatible with __dtb_start.
- Use pr_info(),
- Extract common part.
Signed-off-by: Geert Uytterhoeven
Cc: Jonas Bonn
On 11/10/2013 06:51 AM, Stefan Kristiansson wrote:
On Sat, Nov 09, 2013 at 09:37:31PM +0100, Geert Uytterhoeven wrote:
Notable changes:
- Change flash0 to spansion,s25sl064p, due to kernel message
m25p80 spi32766.0: found s25sl064p, expected m25p10
This is due to Altera changing the EP
Hi Geert,
I'll pull this into my OpenRISC tree now as-is, but there's a couple of
things that need sorting out before this can be upstreamed... see below.
Thanks,
Jonas
On 11/09/2013 09:37 PM, Geert Uytterhoeven wrote:
Add a DTS and defconfig for the Terasic DE0-Nano Development and Educatio
On 11/06/2013 11:50 AM, Richard Weinberger wrote:
Am 06.11.2013 11:17, schrieb Jonas Bonn:
Patch looks good. :)
(But I didn't test it!)
OK, good. I'll take it via the OpenRISC tree then and you can drop it
from your V2 series.
Thanks,
Jonas
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From: Richard Weinberger
Use the more generic functions get_signal() signal_setup_done()
for signal delivery.
Signed-off-by: Richard Weinberger
Signed-off-by: Jonas Bonn
---
Hi Richard,
What's the status of this patch series? Are these lined up for 3.13 already?
The changes look goo
On 10/25/2013 04:37 PM, Geert Uytterhoeven wrote:
arch/openrisc/kernel/module.c: In function 'apply_relocate_add':
arch/openrisc/kernel/module.c:50:13: warning: assignment from incompatible
pointer type
arch/openrisc/kernel/module.c:54:13: warning: assignment from incompatible
pointer type
Mov
from PPC to DT common code.
Again it could be there as it was originally copied from powerpc.
Signed-off-by: Sudeep KarkadaNagesha
Cc: Jonas Bonn
Hi Jonas,
Since both microblaze and openrisc have moderated lists which I am not
member of, these patches were blocked. Michal Simek agreed to
On 07/31/2013 05:34 AM, Chen Gang wrote:
Need append "_D__linux__" to KBUILD_CFLAGS, just like some of another
architectures have done, or 'allmodconfig' can not pass compiling.
The related error:
CC [M] fs/coda/psdev.o
In file included from include/linux/coda.h:65:0,
On 04/27/2013 08:02 PM, Stefan Kristiansson wrote:
Motivation for this is to be able to print the way information
properly in print_cpuinfo(), instead of hardcoding it to one.
Signed-off-by: Stefan Kristiansson
Applied. Thanks.
/Jonas
---
arch/openrisc/include/asm/cpuinfo.h | 2 ++
arc
CC: Mikael Starvik
CC: Jesper Nilsson
CC: linux-cris-ker...@axis.com
Signed-off-by: Jonas Bonn
---
Hi Geert,
As your 'exotic' branch seems to show you're doing some work on CRIS, how
about taking this rather trivial patch into your branch as well. I sent
this to the CRIS main
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