Hi Srinath, Ray,
On Fri, Jul 07, 2017 at 06:37:04PM +0530, Srinath Mannam wrote:
> Add DT binding document for stingray usb phy driver.
>
> Signed-off-by: Srinath Mannam
> Reviewed-by: Ray Jui
> Acked-by: Rob Herring
The Broadcom Vulcan chip (now Cavium ThunderX2) uses the same USB PHY
from w
Hi George,
Few comments on your patch:
On Fri, Jun 15, 2018 at 03:03:15AM -0700, George Cherian wrote:
> Per Section 8.4.7.1.3 of ACPI 6.2, The platform provides performance
> feedback via set of performance counters. To determine the actual
> performance level delivered over time, OSPM may read
readq to read the watchdog compare register
which does a 64-bit access. This fails on ThunderX2 which does not
implement 64-bit access to this register.
Fix this by using lo_hi_readq() that does two 32-bit reads.
Signed-off-by: Jayachandran C
---
drivers/watchdog/sbsa_gwdt.c | 3 ++-
1 file
On Sun, Jan 21, 2018 at 11:35:34AM +, Marc Zyngier wrote:
> On Sun, 21 Jan 2018 07:00:48 +,
> Jayachandran C wrote:
> >
> > On Thu, Jan 18, 2018 at 10:58:20AM +0530, Ganapatrao Kulkarni wrote:
> > > This erratum is observed on the ThunderX2 GICv3 ITS. When a
&g
can be fixed up a bit.
> +
> +static void quirk_no_rootport_d3(struct pci_dev *pdev)
> +{
> + pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
> +}
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, 0x9084,
> quirk_no_rootport_d3);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_
On Thu, Jan 18, 2018 at 10:58:20AM +0530, Ganapatrao Kulkarni wrote:
> This erratum is observed on the ThunderX2 GICv3 ITS. When a
> MOVI command is used to change affinity of a LPI to a collection/cpu
> on another node, the LPI is not delivered to the cpu.
> An additional INV command is required a
Whitelist Broadcom Vulcan/Cavium ThunderX2 processors in
unmap_kernel_at_el0(). These CPUs are not vulnerable to
CVE-2017-5754 and do not need KPTI when KASLR is off.
Signed-off-by: Jayachandran C
---
arch/arm64/kernel/cpufeature.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch
Use PSCI based mitigation for speculative execution attacks targeting
the branch predictor. We use the same mechanism as the one used for
Cortex-A CPUs, we expect the PSCI version call to have a side effect
of clearing the BTBs.
Signed-off-by: Jayachandran C
---
arch/arm64/kernel/cpu_errata.c
Hi Jon,
On Thu, Jan 18, 2018 at 01:27:15PM -0500, Jon Masters wrote:
> On 01/18/2018 12:56 PM, Jayachandran C wrote:
> > On Thu, Jan 18, 2018 at 01:53:55PM +, Will Deacon wrote:
> >> Hi JC,
> >>
> >> On Tue, Jan 16, 2018 at 03:45:54PM -0800, Jayachandran C
On Thu, Jan 18, 2018 at 01:53:55PM +, Will Deacon wrote:
> Hi JC,
>
> On Tue, Jan 16, 2018 at 03:45:54PM -0800, Jayachandran C wrote:
> > On Tue, Jan 16, 2018 at 04:52:53PM -0500, Jon Masters wrote:
> > > On 01/09/2018 07:47 AM, Jayachandran C wrote:
> > >
On Tue, Jan 16, 2018 at 04:52:53PM -0500, Jon Masters wrote:
> On 01/09/2018 07:47 AM, Jayachandran C wrote:
>
> > Use PSCI based mitigation for speculative execution attacks targeting
> > the branch predictor. The approach is similar to the one used for
> > Corte
mitigation code to
invalidate the branch target buffer, we use the PSCI version call to
invoke it.
Signed-off-by: Jayachandran C
---
v2:
- rebased on top of the latest kpti branch
- use pr_info_once/pr_warn_once to avoid excessive prints
- using .desc generated too many prints, dropped plan
On Mon, Jan 08, 2018 at 05:51:00PM +, Will Deacon wrote:
> On Mon, Jan 08, 2018 at 09:40:17AM -0800, Jayachandran C wrote:
> > On Mon, Jan 08, 2018 at 09:20:09AM +, Marc Zyngier wrote:
> > > On 08/01/18 07:24, Jayachandran C wrote:
> > > > diff --git a/
On Mon, Jan 08, 2018 at 05:23:41PM +, Will Deacon wrote:
> On Mon, Jan 08, 2018 at 09:19:43AM -0800, Jayachandran C wrote:
> > On Mon, Jan 08, 2018 at 04:46:52PM +, Will Deacon wrote:
> > > On Sun, Jan 07, 2018 at 10:53:36PM -0800, Jayachandran C wrote:
> > >
On Mon, Jan 08, 2018 at 05:06:24PM +, Will Deacon wrote:
> On Sun, Jan 07, 2018 at 11:24:02PM -0800, Jayachandran C wrote:
> > On Fri, Jan 05, 2018 at 01:12:33PM +, Will Deacon wrote:
> > > For non-KASLR kernels where the KPTI behaviour has not been overridden
> >
On Mon, Jan 08, 2018 at 09:20:09AM +, Marc Zyngier wrote:
> On 08/01/18 07:24, Jayachandran C wrote:
> > On Fri, Jan 05, 2018 at 01:12:33PM +, Will Deacon wrote:
> >> For non-KASLR kernels where the KPTI behaviour has not been overridden
> >> on the command line
On Mon, Jan 08, 2018 at 04:46:52PM +, Will Deacon wrote:
> On Sun, Jan 07, 2018 at 10:53:36PM -0800, Jayachandran C wrote:
> > Use PSCI based mitigation for speculative execution attacks targeting
> > the branch predictor. The approach is similar to the one used for
> >
On Fri, Jan 05, 2018 at 01:12:33PM +, Will Deacon wrote:
> For non-KASLR kernels where the KPTI behaviour has not been overridden
> on the command line we can use ID_AA64PFR0_EL1.CSV3 to determine whether
> or not we should unmap the kernel whilst running at EL0.
>
> Reviewed-by: Suzuki K Poul
mitigation code to
invalidate the branch target buffer, we use the PSCI version call to
invoke it.
Signed-off-by: Jayachandran C
---
arch/arm64/kernel/cpu_errata.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch
Add the older Broadcom ID as well as the new Cavium ID for ThunderX2
CPUs.
Signed-off-by: Jayachandran C
---
arch/arm64/include/asm/cputype.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 84385b9..cce5735 100644
On Fri, Jan 05, 2018 at 01:12:41PM +, Will Deacon wrote:
> Cortex-A57, A72, A73 and A75 are susceptible to branch predictor aliasing
> and can theoretically be attacked by malicious code.
>
> This patch implements a PSCI-based mitigation for these CPUs when available.
> The call into firmware
dged PCI devices may end up with duplicated IDs */
> + for (j = 0; j < i; j++)
> + if (fwspec->ids[j] == sid)
> + break;
> + if (j < i)
> + continue;
> +
> arm_smmu_write_strtab
Add Robert Richter as the primary maintainer for this platform.
Signed-off-by: Jayachandran C
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 44cb004..f2d8963 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3155,6 +3155,7 @@ S:Supported
Hi Marc,
On Mon, Jul 10, 2017 at 04:15:28PM +0100, Marc Zyngier wrote:
> On 10/07/17 15:57, Shanker Donthineni wrote:
> > Hi Marc,
> >
> > On 07/10/2017 08:50 AM, Marc Zyngier wrote:
> >> On 10/07/17 11:21, Ganapatrao Kulkarni wrote:
> >>> Hi Marc,
> >>>
> >>> On Mon, Jul 10, 2017 at 2:53 PM, Mar
On Wed, Jun 21, 2017 at 09:44:58AM +0100, Marc Zyngier wrote:
> On 21/06/17 08:09, Jayachandran C wrote:
> > On Wed, Jun 21, 2017 at 11:45:43AM +0530, Ganapatrao Kulkarni wrote:
> >> Add code to parse SRAT ITS Affinity sub table as defined in ACPI 6.2
> >> Later in pe
On Wed, Jun 21, 2017 at 11:45:43AM +0530, Ganapatrao Kulkarni wrote:
> Add code to parse SRAT ITS Affinity sub table as defined in ACPI 6.2
> Later in per device probe, ITS devices are mapped to
> numa node using ITS id to proximity domain mapping.
>
> Signed-off-by: Ganapatrao Kulkarni
> ---
>
On Fri, Jun 09, 2017 at 04:43:07PM +0100, Robin Murphy wrote:
> On 09/06/17 12:38, Jayachandran C wrote:
> > On Fri, Jun 09, 2017 Robin Murphy wrote:
> >>
> >> On 30/05/17 13:03, Geetha sowjanya wrote:
> >>> From: Linu Cherian
> >>>
> >>
On Fri, Jun 09, 2017 Robin Murphy wrote:
>
> On 30/05/17 13:03, Geetha sowjanya wrote:
> > From: Linu Cherian
> >
> > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space
> > and PAGE0_REGS_ONLY option is enabled as an errata workaround.
> > This option when turned on, repla
On Fri, Apr 28, 2017 at 05:38:23PM +0100, Will Deacon wrote:
> Hi guys,
>
> On Fri, Apr 28, 2017 at 01:46:24PM +, Jayachandran C wrote:
> > On Thu, Apr 27, 2017 at 06:37:59PM +0100, Will Deacon wrote:
> > > > If my understanding is correct, the sysfs suggestion ab
On Thu, Apr 27, 2017 at 06:37:59PM +0100, Will Deacon wrote:
> On Wed, Apr 26, 2017 at 01:41:42PM +0000, Jayachandran C wrote:
> > On Wed, Apr 26, 2017 at 11:10:21AM +0100, Will Deacon wrote:
> > > On Wed, Apr 26, 2017 at 07:22:46AM +, Pinski, Andrew wrote:
> > &
On Fri, Apr 28, 2017 at 10:23:44AM +0530, Ganapatrao Kulkarni wrote:
> cpuid string will not be same on all CPUs on heterogeneous
> platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
> to find cpuid string from associated CPUs of PMU CORE device.
>
> Signed-off-by: Ganapatrao Kulka
On Thu, Apr 27, 2017 at 5:16 PM, Geetha sowjanya
wrote:
> From: Geetha
>
> Add MIDR values for Cavium cn99xx SoCs
>
> Signed-off-by: Geetha
> ---
> arch/arm64/include/asm/cputype.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h
> b/arch/arm64/inclu
On Wed, Apr 26, 2017 at 11:10:21AM +0100, Will Deacon wrote:
> On Wed, Apr 26, 2017 at 07:22:46AM +, Pinski, Andrew wrote:
> > On 4/25/2017 11:53 PM, Jayachandran C. wrote:
> > > On Tue, Apr 25, 2017 at 10:23 PM, Will Deacon wrote:
> > >> On Tue, Apr 25, 2017 a
Hi Will,
On Tue, Apr 25, 2017 at 10:23 PM, Will Deacon wrote:
> On Tue, Apr 25, 2017 at 09:13:40AM +0530, Ganapatrao Kulkarni wrote:
>> On Mon, Apr 24, 2017 at 9:15 PM, Will Deacon wrote:
>> > On Thu, Apr 20, 2017 at 02:56:50PM +0530, Ganapatrao Kulkarni wrote:
>> >> On Thu, Apr 20, 2017 at 2:19
cc98360b.
>>
>
> Sorry for that, I will test your patches and respond to that. For this
> patch:
>
> Acked-by: Sudeep Holla
>
This fixes a regression I see in v4.11-rc2
Tested-by: Jayachandran C
I don't see it in the tty/serial tree yet
JC.
This will allow the default kernel build to boot on Cavium ThunderX2
CN99XX processors.
Signed-off-by: Jayachandran C
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 33b744d..7a9c262 100644
Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
The processor core will use cavium,thunder2 as ID and the SoC will use
cavium,thunder-99xx
Signed-off-by: Jayachandran C
---
Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 5 +
Documentation/devicetree
: Jayachandran C
---
arch/arm64/Kconfig.platforms | 7 ++
arch/arm64/boot/dts/cavium/Makefile | 1 +
arch/arm64/boot/dts/cavium/thunder-99xx.dts | 34 +++
arch/arm64/boot/dts/cavium/thunder-99xx.dtsi | 147 +++
4 files changed, 189 insertions
This patchset adds support for the new ThunderX2 CN99XX processor
family.
Changes are to add the config option, the required device tree files,
the device tree bindings documentation and the defconfig entry.
JC.
Jayachandran C (3):
arm64: add THUNDER2 processor family
dt-bindings: arm64
On Wed, Jul 6, 2016 at 1:49 AM, David Daney wrote:
>
> On 07/04/2016 10:37 AM, Will Deacon wrote:
>>
>> On Sat, Jul 02, 2016 at 07:13:24PM -0400, Paul Gortmaker wrote:
>>>
>>> The Kconfig currently controlling compilation of this code is:
>>>
>>> drivers/pci/host/Kconfig:config PCI_HOST_GENERIC
>>
On Mon, May 30, 2016 at 9:08 PM, Arnd Bergmann wrote:
> On Monday, May 30, 2016 5:14:22 PM CEST Tomasz Nowicki wrote:
>> + bsz = 1 << pci_generic_ecam_ops.bus_shift;
>> + cfgres.start = root->mcfg_addr + bus_res->start * bsz;
>> + cfgres.end = cfgres.start + resource_size(bus_res
On Tue, May 10, 2016 at 8:49 PM, Tomasz Nowicki wrote:
> It is very useful to release I/O resources so that the same I/O resources
> can be allocated again (pci_remap_iospace), like in PCI hotplug removal
> scenario. Therefore this patch implements new pci_unmap_iospace call which
> unmaps I/O spa
s ECAM mappings.
>
> As mentioned in Kconfig help section, ACPI_PCI_HOST_GENERIC choice
> should be made on a per-architecture basis.
Looking thru the new code, I see a few issues, please see below
> Signed-off-by: Tomasz Nowicki
> Signed-off-by: Jayachandran C
> ---
> driv
s ECAM mappings.
>
> As mentioned in Kconfig help section, ACPI_PCI_HOST_GENERIC choice
> should be made on a per-architecture basis.
>
> Signed-off-by: Tomasz Nowicki
> Signed-off-by: Jayachandran C
> ---
[]
> diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h
>
gt;> On Tue, May 10, 2016 at 5:19 PM, Tomasz Nowicki wrote:
>> >> > This patch provides a way to set the ACPI companion in PCI code.
>> >> > We define acpi_pci_set_companion() to set the ACPI companion pointer and
>> >> > call it from PCI core
On Fri, Apr 29, 2016 at 1:31 PM, Jayachandran C wrote:
> On Fri, Apr 29, 2016 at 3:17 AM, Bjorn Helgaas wrote:
>> On Fri, Apr 15, 2016 at 07:06:42PM +0200, Tomasz Nowicki wrote:
>>> From: Jayachandran C
>>>
>>> Add config option PCI_GENERIC_ECAM and fi
On Tue, May 3, 2016 at 4:32 PM, Lorenzo Pieralisi
wrote:
> On Mon, May 02, 2016 at 06:56:13PM +0530, Jayachandran C wrote:
>> On Mon, May 2, 2016 at 6:13 PM, Tomasz Nowicki wrote:
>> > On 04/27/2016 01:17 PM, Lorenzo Pieralisi wrote:
>> >>
>> >> On Tu
On Mon, May 2, 2016 at 6:13 PM, Tomasz Nowicki wrote:
> On 04/27/2016 01:17 PM, Lorenzo Pieralisi wrote:
>>
>> On Tue, Apr 26, 2016 at 09:26:49PM -0500, Bjorn Helgaas wrote:
>>>
>>> On Fri, Apr 15, 2016 at 07:06:37PM +0200, Tomasz Nowicki wrote:
>
> [...]
>
>>> +int acpi_pci_bus_domain_nr(struct
On Fri, Apr 29, 2016 at 2:07 PM, Lorenzo Pieralisi
wrote:
> On Thu, Apr 28, 2016 at 04:48:00PM -0500, Bjorn Helgaas wrote:
>
> [...]
>
>> > +static int pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root,
>> > + struct acpi_pci_generic_root_info *ri)
>> > +{
>>
On Fri, Apr 29, 2016 at 3:17 AM, Bjorn Helgaas wrote:
> On Fri, Apr 15, 2016 at 07:06:42PM +0200, Tomasz Nowicki wrote:
>> From: Jayachandran C
>>
>> Add config option PCI_GENERIC_ECAM and file drivers/pci/ecam.c to
>> provide generic functions for accessing mem
On Thu, Apr 21, 2016 at 2:36 PM, Tomasz Nowicki wrote:
> On 20.04.2016 21:12, Jayachandran C wrote:
>>
>> On Fri, Apr 15, 2016 at 10:36 PM, Tomasz Nowicki wrote:
>>>
>>> This patch is going to implement generic PCI host controller for
>>> ACPI world,
ecture basis.
>
> This patch is heavily based on the updated version from Jayachandran C:
> https://lkml.org/lkml/2016/4/11/908
> git: https://github.com/jchandra-brcm/linux/ (arm64-acpi-pci-v3)
This is a little bit unusual because I had not posted the v3 patch
to the mailing list yet
On Wed, Apr 20, 2016 at 3:10 AM, Arnd Bergmann wrote:
> On Friday 15 April 2016 19:06:43 Tomasz Nowicki wrote:
>> From: Jayachandran C
>>
>> Add config option PCI_GENERIC_ECAM and file drivers/pci/ecam.c to
>> provide generic functions for accessing memory mapped PCI
On Fri, Apr 15, 2016 at 11:49 PM, Jon Masters wrote:
> On 04/15/2016 01:06 PM, Tomasz Nowicki wrote:
>> From the functionality point of view this series might be split into the
>> following logic parts:
>> 1. Necessary fixes as the preparation for using driver on ARM64.
>> 2. New ECAM API and upda
On Sat, Apr 16, 2016 at 1:01 PM, Arnd Bergmann wrote:
> On Saturday 16 April 2016 12:50:13 Jayachandran C wrote:
>> >
>> > I still think it would be better to keep the loadable PCI host drivers
>> > separate from the ACPI PCI infrastructure. There are a number of
>
On Sat, Apr 16, 2016 at 12:09 AM, Arnd Bergmann wrote:
> On Friday 15 April 2016 19:06:43 Tomasz Nowicki wrote:
>> -MODULE_DEVICE_TABLE(of, thunder_pem_of_match);
>> -
>> -static int thunder_pem_probe(struct platform_device *pdev)
>> +static int thunder_pem_init(struct device *dev, struct pci_conf
On Tue, Apr 12, 2016 at 5:54 AM, David Daney wrote:
> On 04/11/2016 03:45 PM, Jayachandran C wrote:
>>
>> Add config option PCI_GENERIC_ECAM and file drivers/pci/ecam.c to
>> provide generic functions for accessing memory mapped PCI config space.
>>
>> The API is
Hi David,
On Tue, Apr 12, 2016 at 6:04 AM, David Daney wrote:
> On 04/11/2016 03:45 PM, Jayachandran C wrote:
>>
>> Use functions provided by drivers/pci/ecam.h for mapping the config
>> space in drivers/pci/host/pci-host-common.c, and update its users to
>> use &#x
pci_mmcfg_late_init() function to parse
and map entries in the MCFG table.
The implementation of pci_acpi_scan_root() looks up the saved mappings
and sets up a new mapping if needed. Generic PCI functions are used for
accessing config space.
Signed-off-by: Jayachandran C
---
drivers/acpi/Kconfig| 9
Define PCI_MMCONFIG config option for arm64.
Weaken implementations of raw_pci_read/write and pci_acpi_scan_root,
the generic ACPI PCI driver will implement these.
Signed-off-by: Jayachandran C
---
arch/arm64/Kconfig | 3 +++
arch/arm64/kernel/pci.c | 7 +++
2 files changed, 6
probe function and the gen_pci structure, these have
been updated to use the new API as well.
The patch does not introduce any functional changes other than a very
minor one: with the new code, on 64-bit platforms, we do just a single
ioremap for the whole config space.
Signed-off-by:
his has been tested on qemu with OVMF for the ACPI part and with
device tree for pci-host-generic code. Further testing and reviews
are welcome.
Thanks,
JC.
[1] https://lkml.org/lkml/2016/3/3/921
Jayachandran C (4):
arm64: Prepare to use generic ACPI PCI implementation
PCI: Provide common functi
;struct pci_ops'
Signed-off-by: Jayachandran C
---
drivers/pci/Kconfig | 3 ++
drivers/pci/Makefile | 2 +
drivers/pci/ecam.c | 130 +++
drivers/pci/ecam.h | 58 +++
4 files changed, 193 insertions(+)
create mode 10064
Hi Bjorn,
On Tue, Apr 5, 2016 at 10:11 PM, Bjorn Helgaas wrote:
>
> Hi Tomasz,
>
> On Tue, Apr 05, 2016 at 04:11:55PM +0200, Tomasz Nowicki wrote:
> > On 09.03.2016 10:13, Tomasz Nowicki wrote:
> > >Hi Bjorn,
> > >
> > >Thanks for your pointers! See my comments inline. Aslo, can you please
> > >h
On Mon, Mar 28, 2016 at 7:12 PM, Sinan Kaya wrote:
> Hi,
>
> On 3/23/2016 6:22 AM, Gabriele Paoloni wrote:
>> I had a look at your patchset and also in your git repo at the other
>> patches that you ported over from Tomasz; it seems that now we miss
>> a quirk mechanism to enable controller that a
On Fri, Mar 18, 2016 at 1:48 AM, Jayachandran C wrote:
> Hi Bjorn,
>
> Here is a new patchset for the ACPI PCI controller driver based on the
> earlier discussion[1].
>
> The first two patches in the patchset implements pci/ecam.c for generic
> config space access an
post the full patchset.
This has been tested on qemu with OVMF for the ACPI part and with
device tree for pci-host-generic code.
Thanks,
JC.
[1] https://lkml.org/lkml/2016/3/3/921
Jayachandran C (4):
PCI: Provide generic ECAM mapping functions
PCI: generic,thunder: Use generic config functions
dd dependency of PCI_GENERIC_ECAM for PCI_HOST_GENERIC
in Kconfig
Signed-off-by: Jayachandran C
---
drivers/pci/host/Kconfig| 1 +
drivers/pci/host/pci-host-common.c | 68 +++--
drivers/pci/host/pci-host-common.h | 25 +-
drivers
existing mapping, create a temporary mapping with
information available in the saved MCFG table and use it to do raw
config space access.
Signed-off-by: Jayachandran C
---
drivers/acpi/pci_gen_host.c | 87 +
1 file changed, 87 insertions(+)
diff --git
: Jayachandran C
---
drivers/acpi/Kconfig| 9 ++
drivers/acpi/Makefile | 1 +
drivers/acpi/pci_gen_host.c | 247
3 files changed, 257 insertions(+)
create mode 100644 drivers/acpi/pci_gen_host.c
diff --git a/drivers/acpi/Kconfig b
the memory region, and do the ioremap() calls
needed to setup the mapping. pci_generic_unmap_config() is provided
to delete a mapping.
A helper function pci_generic_map_bus() is also provided to be used
to implement pci_ops map_bus method.
Signed-off-by: Jayachandran C
---
drivers/pci/Kconfig | 3 +
index 41707a2..3462c83 100644
> --- a/arch/mips/sibyte/swarm/setup.c
> +++ b/arch/mips/sibyte/swarm/setup.c
> @@ -134,8 +134,6 @@ void __init plat_mem_setup(void)
> #error invalid SiByte board configuration
> #endif
>
> - panic_timeout = 5; /* For debug. */
> -
>
On Mon, Oct 08, 2012 at 03:11:19PM +0200, Florian Fainelli wrote:
> The EHCI platform driver is suitable for use by the Netlogic XLR platform
> since there is nothing specific that the EHCI XLR platform driver does.
>
> Signed-off-by: Florian Fainelli
> ---
> Changes in v4:
> - rebased against gr
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