+++---
> include/linux/dax.h |9 ++---
> include/linux/fs.h |6 --
> 3 files changed, 25 insertions(+), 8 deletions(-)
Tested on QEMU with fs-dax and device-dax as vNVDIMM backends
respectively with vfio passthrough. The fs-dax case fails QEMU as
expected, and the device-dax case works normally now.
Tested-by: Haozhong Zhang
On 02/13/18 20:04 -0600, Josh Poimboeuf wrote:
> On Sun, Feb 11, 2018 at 02:39:41PM +0100, Marc Haber wrote:
> > Hi,
> >
> > after in total nine weeks of bisecting, broken filesystems, service
> > outages (thankfully on unportant systems), 4.15 seems to have fixed the
> > issue. After going to 4.1
>
> ...at mount time, and resolving the dax-dma-vs-truncate problem is one
> of the last hurdles to remove that designation.
>
> Cc: Alex Williamson
> Cc: Michal Hocko
> Cc: Christoph Hellwig
> Cc: k...@vger.kernel.org
> Cc:
> Reported-by: Haozhong Zhang
>
gt; ...at mount time, and resolving the dax-dma-vs-truncate problem is one
> of the last hurdles to remove that designation.
>
> Cc: Alex Williamson
> Cc: Michal Hocko
> Cc: Christoph Hellwig
> Cc: k...@vger.kernel.org
> Cc:
> Reported-by: Haozhong Zhang
> Fix
On 01/09/18 00:57 -0800, Liran Alon wrote:
>
> - haozhong.zh...@intel.com wrote:
>
> > On 01/07/18 00:26 -0700, Ross Zwisler wrote:
> > > On Wed, Aug 23, 2017 at 10:21 PM, Wanpeng Li
> > wrote:
> > > > From: Wanpeng Li
> > > >
> > > > vmx_complete_interrupts() assumes that the exception is
On 01/07/18 00:26 -0700, Ross Zwisler wrote:
> On Wed, Aug 23, 2017 at 10:21 PM, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > vmx_complete_interrupts() assumes that the exception is always injected,
> > so it would be dropped by kvm_clear_exception_queue(). This patch separates
> > exception.pe
.
Changes in v3:
* Move cache mode check to pat.c as pat_pfn_is_uc()
* Reintroduce converters between kvm_pfn_t and pfn_t.
Changes in v2:
* Switch to lookup_memtype() to get host memory type.
* Rewrite the comment in KVM MMU patch.
* Remove v1 patch 2, which is not necessary in v2.
Haozhong Zhang (2
pages would be harmed.
Therefore, we check the host memory type in addition and only treat
UC/UC-/WC pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
Reviewed-by: Xiao Guangrong
---
arch/x86/kvm/mmu.c | 13 -
1 file changed
Check whether the PAT memory type of a pfn cannot be overridden by
MTRR UC memory type, i.e. the PAT memory type is UC, UC- or WC. This
function will be used by KVM to determine whether it needs to map a
host pfn to guest with UC memory type.
Signed-off-by: Haozhong Zhang
Reviewed-by: Xiao
On 12/18/17 13:55 +0100, Paolo Bonzini wrote:
> On 08/11/2017 08:56, Haozhong Zhang wrote:
> > +bool pat_pfn_is_uc_or_uc_minus(unsigned long pfn)
> > +{
> > + enum page_cache_mode cm = lookup_memtype(PFN_PHYS(pfn));
> > +
> > + retur
On 11/15/17 11:44 +0100, David Hildenbrand wrote:
> On 08.11.2017 08:56, Haozhong Zhang wrote:
> > It will be used by KVM to check whether a pfn should be
> > mapped to guest as UC.
> >
> > Signed-off-by: Haozhong Zhang
> > ---
> > arch/x86/include/a
On 11/15/17 07:17 -0800, Dan Williams wrote:
> On Tue, Nov 7, 2017 at 11:56 PM, Haozhong Zhang
> wrote:
> > It will be used by KVM to check whether a pfn should be
> > mapped to guest as UC.
> >
> > Signed-off-by: Haozhong Zhang
> > ---
> > arch/x86/
pages would be harmed.
Therefore, we check the host memory type in addition and only treat
UC/UC- pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
---
arch/x86/kvm/mmu.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion
It will be used by KVM to check whether a pfn should be
mapped to guest as UC.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/pat.h | 2 ++
arch/x86/mm/pat.c | 16
2 files changed, 18 insertions(+)
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include
.
Changes in v2:
* Switch to lookup_memtype() to get host memory type.
* Rewrite the comment in KVM MMU patch.
* Remove v1 patch 2, which is not necessary in v2.
Haozhong Zhang (2):
x86/mm: add functions to check if a pfn is UC/UC-
KVM: MMU: consider host cache mode in MMIO page check
arch
On 11/03/17 16:51 +0800, Haozhong Zhang wrote:
> On 11/03/17 14:54 +0800, Xiao Guangrong wrote:
> >
> >
> > On 11/03/2017 01:53 PM, Haozhong Zhang wrote:
> > > Some reserved pages, such as those from NVDIMM DAX devices, are
> > > not for MMIO, and can be ma
On 11/03/17 06:21 -0700, Dan Williams wrote:
> On Thu, Nov 2, 2017 at 10:53 PM, Haozhong Zhang
> wrote:
> > Signed-off-by: Haozhong Zhang
>
> Can you also add some text to the changelog saying why we need these
> converters?
I'm going to drop these converters in the
On 11/03/17 10:15 -0400, Mikulas Patocka wrote:
>
>
> On Tue, 31 Oct 2017, Haozhong Zhang wrote:
>
> > [I just copy the commit message from patch 2]
> >
> > Some reserved pages, such as those from NVDIMM DAX devices, are
> > not for MMIO, and can be mappe
On 11/03/17 17:24 +0800, Xiao Guangrong wrote:
>
>
> On 11/03/2017 05:02 PM, Haozhong Zhang wrote:
> > On 11/03/17 16:51 +0800, Haozhong Zhang wrote:
> > > On 11/03/17 14:54 +0800, Xiao Guangrong wrote:
> > > >
> > > >
> > > >
On 11/03/17 17:10 +0800, Xiao Guangrong wrote:
>
>
> On 11/03/2017 04:51 PM, Haozhong Zhang wrote:
> > On 11/03/17 14:54 +0800, Xiao Guangrong wrote:
> > >
> > >
> > > On 11/03/2017 01:53 PM, Haozhong Zhang wrote:
> > > > Some rese
On 11/03/17 16:51 +0800, Haozhong Zhang wrote:
> On 11/03/17 14:54 +0800, Xiao Guangrong wrote:
> >
> >
> > On 11/03/2017 01:53 PM, Haozhong Zhang wrote:
> > > Some reserved pages, such as those from NVDIMM DAX devices, are
> > > not for MMIO, and can be ma
On 11/03/17 14:54 +0800, Xiao Guangrong wrote:
>
>
> On 11/03/2017 01:53 PM, Haozhong Zhang wrote:
> > Some reserved pages, such as those from NVDIMM DAX devices, are
> > not for MMIO, and can be mapped with cached memory type for better
> > performance. However, t
Signed-off-by: Haozhong Zhang
---
include/linux/kvm_host.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 6882538eda32..caf6f7a6bdb2 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -27,6 +27,7 @@
#include
pages would be harmed.
Therefore, we check the host memory type by lookup_memtype() in
addition and only treat UC/UC- pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
---
arch/x86/kvm/mmu.c | 19 ++-
1 file changed, 18
pat_pfn_is_uc(pfn) is added and will be used by KVM to check whether
the memory type of a host pfn is UC/UC-.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/pat.h | 2 ++
arch/x86/mm/pat.c | 14 ++
2 files changed, 16 insertions(+)
diff --git a/arch/x86/include
between kvm_pfn_t and pfn_t.
Changes in v2:
* Switch to lookup_memtype() to get host memory type.
* Rewrite the comment in KVM MMU patch.
* Remove v1 patch 2, which is not necessary in v2.
Haozhong Zhang (3):
x86/mm: add function to check if a pfn is UC/UC-
KVM: add converters between
On 11/02/17 19:25 -0700, Dan Williams wrote:
> On Thu, Nov 2, 2017 at 6:16 PM, Haozhong Zhang
> wrote:
> > Signed-off-by: Haozhong Zhang
> > ---
> > include/linux/kvm_host.h | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/include/l
() to get host memory type.
* Rewrite the comment in KVM MMU patch.
* Remove v1 patch 2, which is not necessary in v2.
Haozhong Zhang (3):
x86/mm: add function to check if a pfn is UC/UC-
KVM: add converters between pfn_t and kvm_pfn_t
KVM: MMU: consider host cache mode in MMIO page check
Signed-off-by: Haozhong Zhang
---
include/linux/kvm_host.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 6882538eda32..759fe498c89e 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -67,6 +67,9 @@
#define
pat_pfn_is_uc(pfn) is added and will be used by KVM to check whether
the memory type of a host pfn is UC/UC-.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/pat.h | 2 ++
arch/x86/mm/pat.c | 14 ++
2 files changed, 16 insertions(+)
diff --git a/arch/x86/include
pages would be harmed.
Therefore, we check the host memory type by lookup_memtype() in
addition and only treat UC/UC- pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
---
arch/x86/kvm/mmu.c | 18 +-
1 file changed, 17
On 11/02/17 13:37 -0400, Konrad Rzeszutek Wilk wrote:
> On Tue, Oct 31, 2017 at 07:48:38PM +0800, Haozhong Zhang wrote:
> > [I just copy the commit message from patch 2]
> >
> > Some reserved pages, such as those from NVDIMM DAX devices, are
> > not for MMIO, and can b
On 11/02/17 15:56 +0800, Xiao Guangrong wrote:
>
>
> On 10/31/2017 07:48 PM, Haozhong Zhang wrote:
> > Some reserved pages, such as those from NVDIMM DAX devices, are
> > not for MMIO, and can be mapped with cached memory type for better
> > performance. However, t
On 10/31/17 19:48 +0800, Haozhong Zhang wrote:
> [I just copy the commit message from patch 2]
>
> Some reserved pages, such as those from NVDIMM DAX devices, are
> not for MMIO, and can be mapped with cached memory type for better
> performance. However, the above check misconcei
Hi Wanpeng,
On 10/31/17 19:10 +0800, Wanpeng Li wrote:
> 2017-10-31 17:59 GMT+08:00 Dmitry Vyukov :
> > Hello,
> >
> > I am seeing the following crash on upstream
> > 15f859ae5c43c7f0a064ed92d33f7a5bc5de6de0 (Oct 26).
> > Reproducer:
> > https://gist.githubusercontent.com/dvyukov/a9690f90c39c1e3b1
KVM MMU will use it to get the cache mode of the host page.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/pat.h | 2 ++
arch/x86/mm/pat.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index
pages would be harmed.
Therefore, we check the host memory type by lookup_memtype() in
addition and only treat UC/UC- pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
---
arch/x86/kvm/mmu.c | 30 +++---
1 file
v1 patch 2, which is not necessary in v2.
Haozhong Zhang (2):
x86/mm: expose lookup_memtype()
KVM: MMU: consider host cache mode in MMIO page check
arch/x86/include/asm/pat.h | 2 ++
arch/x86/kvm/mmu.c | 30 +++---
arch/x86/mm/pat.c | 3 ++-
3 files
On 10/27/17 10:40 +0200, Ingo Molnar wrote:
>
> * Haozhong Zhang wrote:
>
> > By default, KVM treats a reserved page as for MMIO purpose, and maps
> > it to guest with UC memory type. However, some reserved pages are not
> > for MMIO, such as pages of DAX device (
Signed-off-by: Haozhong Zhang
---
include/linux/kvm_host.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 6882538eda32..759fe498c89e 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -67,6 +67,9 @@
#define
KVM MMU will use it to get the cache mode of the host pfn.
Signed-off-by: Haozhong Zhang
---
arch/x86/mm/pat.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index fe7d57a8fb60..cab593ea8956 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
performance. In order to
exclude those cases, we check the host cache mode in addition and only
treat UC/UC- pages as MMIO.
Haozhong Zhang (3):
x86/mm: expose track_pfn_insert()
KVM: add converters between pfn_t and kvm_pfn_t
KVM: MMU: consider host cache type in MMIO pfn check
arch/x86/kvm
check the host cache mode in addition and only
treat UC/UC- pages as MMIO.
Signed-off-by: Haozhong Zhang
Reported-by: Cuevas Escareno, Ivan D
Reported-by: Kumar, Karthik
---
arch/x86/kvm/mmu.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a
On 10/14/16 13:18 +0100, Andrew Cooper wrote:
On 14/10/16 08:08, Haozhong Zhang wrote:
On 10/13/16 20:33 +0100, Andrew Cooper wrote:
On 13/10/16 19:59, Dan Williams wrote:
On Thu, Oct 13, 2016 at 9:01 AM, Andrew Cooper
wrote:
On 13/10/16 16:40, Dan Williams wrote:
On Thu, Oct 13, 2016 at 2
On 10/14/16 04:16 -0600, Jan Beulich wrote:
On 13.10.16 at 17:46, wrote:
On 10/13/16 03:08 -0600, Jan Beulich wrote:
On 13.10.16 at 10:53, wrote:
On 10/13/16 02:34 -0600, Jan Beulich wrote:
On 12.10.16 at 18:19, wrote:
On Wed, Oct 12, 2016 at 9:01 AM, Jan Beulich wrote:
On 12.10.16 at 1
On 10/13/16 20:33 +0100, Andrew Cooper wrote:
On 13/10/16 19:59, Dan Williams wrote:
On Thu, Oct 13, 2016 at 9:01 AM, Andrew Cooper
wrote:
On 13/10/16 16:40, Dan Williams wrote:
On Thu, Oct 13, 2016 at 2:08 AM, Jan Beulich wrote:
[..]
I think we can do the similar for Xen, like to lay anoth
On 10/13/16 03:08 -0600, Jan Beulich wrote:
On 13.10.16 at 10:53, wrote:
On 10/13/16 02:34 -0600, Jan Beulich wrote:
On 12.10.16 at 18:19, wrote:
On Wed, Oct 12, 2016 at 9:01 AM, Jan Beulich wrote:
On 12.10.16 at 17:42, wrote:
On Wed, Oct 12, 2016 at 8:39 AM, Jan Beulich wrote:
On 12.1
+Dan Williams
I accidentally dropped him in my last reply. Add him back.
On 10/13/16 16:53 +0800, Haozhong Zhang wrote:
On 10/13/16 02:34 -0600, Jan Beulich wrote:
On 12.10.16 at 18:19, wrote:
On Wed, Oct 12, 2016 at 9:01 AM, Jan Beulich wrote:
On 12.10.16 at 17:42, wrote:
On Wed, Oct
On 10/13/16 02:34 -0600, Jan Beulich wrote:
On 12.10.16 at 18:19, wrote:
On Wed, Oct 12, 2016 at 9:01 AM, Jan Beulich wrote:
On 12.10.16 at 17:42, wrote:
On Wed, Oct 12, 2016 at 8:39 AM, Jan Beulich wrote:
On 12.10.16 at 16:58, wrote:
On 10/12/16 05:32 -0600, Jan Beulich wrote:
On 12.1
On 10/12/16 05:32 -0600, Jan Beulich wrote:
On 12.10.16 at 12:33, wrote:
The layout is shown as the following diagram.
+---+---+---+--+--+
| whatever used | Partition | Super | Reserved | /dev/pmem0p1 |
| by kernel| Table | Block | for Xen
On 10/11/16 13:17 -0700, Dan Williams wrote:
On Tue, Oct 11, 2016 at 12:48 PM, Konrad Rzeszutek Wilk
wrote:
On Tue, Oct 11, 2016 at 12:28:56PM -0700, Dan Williams wrote:
On Tue, Oct 11, 2016 at 11:33 AM, Konrad Rzeszutek Wilk
wrote:
> On Tue, Oct 11, 2016 at 10:51:19AM -0700, Dan Williams wro
On 10/10/16 09:24, Dan Williams wrote:
> On Sun, Oct 9, 2016 at 11:32 PM, Haozhong Zhang
> wrote:
> > On 10/09/16 20:45, Dan Williams wrote:
> >> On Sun, Oct 9, 2016 at 5:35 PM, Haozhong Zhang
> >> wrote:
> >> > Overview
> >> > =
On 10/10/16 17:43, Andrew Cooper wrote:
> On 10/10/16 01:35, Haozhong Zhang wrote:
> > Overview
> >
> > This RFC kernel patch series along with corresponding patch series of
> > Xen, QEMU and ndctl implements Xen vNVDIMM, which can map the host
> >
On 10/09/16 20:45, Dan Williams wrote:
> On Sun, Oct 9, 2016 at 5:35 PM, Haozhong Zhang
> wrote:
> > Overview
> >
> > This RFC kernel patch series along with corresponding patch series of
> > Xen, QEMU and ndctl implements Xen vNVDIMM, which can map the
pfn device in PFN_MODE_XEN reserves an area for Xen hypervisor to place
its own pmem management data structures (i.e. frame table and M2P
table). The reserved area is not used and not mapped by Linux kernel,
and only the data area is mapped.
Signed-off-by: Haozhong Zhang
---
Cc: Dan Williams
Cc
00/16] Add vNVDIMM support to HVM domains".
Haozhong Zhang (2):
nvdimm: add PFN_MODE_XEN to pfn device for Xen usage
xen, nvdimm: report pfn devices in PFN_MODE_XEN to Xen hypervisor
drivers/nvdimm/namespace_devs.c | 2 ++
drivers/nvdimm/nd.h | 7 +
drivers/nvdimm/
Xen hypervisor does not include NVDIMM driver and relies on the driver
in Dom0 Linux to probe pfn devices in PFN_MODE_XEN. Whenever such a pfn
device is probed, Dom0 Linux reports pages of the entire device, its
reserved area and data area to Xen hypervisor.
Signed-off-by: Haozhong Zhang
---
Cc
On 07/08/16 14:01, Paolo Bonzini wrote:
> Reported-by: Laszlo Ersek
> Signed-off-by: Paolo Bonzini
> ---
> arch/x86/kvm/x86.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 388d9ffd7551..c01b0b3a06aa 100644
> --- a/arch/x86/kvm/x86.c
> +
On 07/08/16 14:01, Paolo Bonzini wrote:
> Because the MSR is listed in msrs_to_save, it is exported to userspace
> for both AMD and Intel processors. However, on AMD currently getting
> it will fail.
>
Is MSR_IA32_FEATURE_CONTROL already be excluded from msrs_to_save[] by
kvm_init_msr_list() on A
On 07/07/16 15:07, Wanpeng Li wrote:
> 2016-07-07 15:02 GMT+08:00 Haozhong Zhang :
> > On 07/07/16 14:56, Wanpeng Li wrote:
> >> 2016-07-07 14:48 GMT+08:00 Haozhong Zhang :
> >> > On 07/07/16 11:46, Wanpeng Li wrote:
> >> >> From: Wanpeng Li
>
On 07/07/16 14:56, Wanpeng Li wrote:
> 2016-07-07 14:48 GMT+08:00 Haozhong Zhang :
> > On 07/07/16 11:46, Wanpeng Li wrote:
> >> From: Wanpeng Li
> >>
> >> BUG: unable to handle kernel NULL pointer dereference at (null)
> >> IP: [<
eference NULL pointer.
>
> This patch fix it by depending on check_nested_events to capture L2 preemption
> timer(emulated hrtimer) expire and nested vmexit.
>
> Tested-by: Haozhong Zhang
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Yunhong Jiang
> Cc: Jan Kiszka
> C
On 07/06/16 15:32, Paolo Bonzini wrote:
>
>
> On 06/07/2016 15:26, Haozhong Zhang wrote:
> > On 07/06/16 19:42, Wanpeng Li wrote:
> >> From: Wanpeng Li
> >>
> >> BUG: unable to handle kernel NULL pointer dereference at (null)
> >> I
t dereference NULL pointer.
>
> This patch fix it by depending on check_nested_events to capture L2
> preemption
> timer(emulated hrtimer) expire and nested vmexit.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Yunhong Jiang
> Cc: Jan Kiszka
> Cc: Haozhong Zhang
>
On 07/06/16 04:14, Paolo Bonzini wrote:
> > On 07/06/16 16:01, Haozhong Zhang wrote:
> > > On 07/06/16 09:46, Paolo Bonzini wrote:
> > > > On 06/07/2016 08:05, Haozhong Zhang wrote:
> > > > >> > Nested preemption timer is emulated by hrtimer, so it
On 07/06/16 16:01, Haozhong Zhang wrote:
> On 07/06/16 09:46, Paolo Bonzini wrote:
> >
> >
> > On 06/07/2016 08:05, Haozhong Zhang wrote:
> > >> >
> > >> > Nested preemption timer is emulated by hrtimer, so it doesn't
> > >>
On 07/06/16 09:46, Paolo Bonzini wrote:
>
>
> On 06/07/2016 08:05, Haozhong Zhang wrote:
> >> >
> >> > Nested preemption timer is emulated by hrtimer, so it doesn't
> >> > influence vmcs02, why this is needed?
> > Nested (L2) preemption
On 07/06/16 13:37, Wanpeng Li wrote:
> Cc Jan,
> 2016-07-06 13:10 GMT+08:00 Haozhong Zhang :
> > A different VMCS is loaded when L2 guest is running, so it's incorrect
> > to use the VMX preemption timer for L1 TSC deadline timer. This patch
> > switches to hrtimer f
d-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 85e2f0a..cc29c2a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -10203,6 +10203,9 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu,
KVM currently does not check the value written to guest
MSR_IA32_FEATURE_CONTROL, though bits corresponding to disabled features
may be set. This patch makes KVM to validate individual bits written to
guest MSR_IA32_FEATURE_CONTROL according to enabled features.
Signed-off-by: Haozhong Zhang
orm
Check MSR_IA32_FEATURE_CONTROL when handling guest
access to MSR_IA32_MCG_EXT_CTL]
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 5 +
arch/x86/kvm/vmx.c | 29 +
arch/x86/kvm/x86.c | 15 +--
dd QEMU support for
Intel local MCE") enables Intel local MCE feature for guest. This KVM
patch handles guest access to LMCE-related MSR (MSR_IA32_MCG_EXT_CTL
and MSR_IA32_FEATURE_CONTROL).
Ashok Raj (1):
KVM: VMX: enable guest access to LMCE related MSRs
Haozhong Zhang (
msr_ia32_feature_control will be used for LMCE and not depend only on
nested anymore, so move it from struct nested_vmx to struct vcpu_vmx.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b
On 06/17/16 14:15, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 09:11:16AM +0800, Haozhong Zhang wrote:
> > On 06/16/16 11:55, Eduardo Habkost wrote:
> > > On Thu, Jun 16, 2016 at 12:04:50PM +0200, Paolo Bonzini wrote:
> > > > On 16/06/2016 08:05, Haozhong Zhan
On 06/16/16 11:55, Eduardo Habkost wrote:
> On Thu, Jun 16, 2016 at 12:04:50PM +0200, Paolo Bonzini wrote:
> > On 16/06/2016 08:05, Haozhong Zhang wrote:
> > > From: Ashok Raj
> > >
> > > On Intel platforms, this patch adds LMCE to KVM MCE supported
> >
On 06/16/16 13:49, Borislav Petkov wrote:
> On Thu, Jun 16, 2016 at 02:05:29PM +0800, Haozhong Zhang wrote:
> > msr_ia32_feature_control will be used for LMCE and not depend only on
> > nested anymore, so move it from struct nested_vmx to struct vcpu_vmx.
> >
> > Si
On 06/16/16 13:19, Paolo Bonzini wrote:
>
>
> On 16/06/2016 13:16, Haozhong Zhang wrote:
> >> However, I think FEATURE_CONTROL_LOCKED should always be writable. If
> >> you change that, it's simpler to just do |= and &= in the caller.
> >
> &
On 06/16/16 11:55, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:05, Haozhong Zhang wrote:
> > + /*
> > +* Only bits masked by msr_ia32_feature_control_valid_bits can be set in
> > +* msr_ia32_feature_control.
> > +*
> > +* msr_ia32_featur
On 06/16/16 12:01, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:05, Haozhong Zhang wrote:
> > +/*
> > + * FEATURE_CONTROL_LOCKED is added/removed automatically by
> > + * feature_control_valid_bits_add/del(), so it's not included here.
> > + */
>
On 06/16/16 12:04, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:05, Haozhong Zhang wrote:
> > From: Ashok Raj
> >
> > On Intel platforms, this patch adds LMCE to KVM MCE supported
> > capabilities and handles guest access to LMCE related MSRs.
> >
>
orm
Check MSR_IA32_FEATURE_CONTROL when handling guest
access to MSR_IA32_MCG_EXT_CTL]
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 5 +
arch/x86/kvm/vmx.c | 36 +++-
arch/x86/kvm/x86.c |
msr_ia32_feature_control will be used for LMCE and not depend only on
nested anymore, so move it from struct nested_vmx to struct vcpu_vmx.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b
KVM currently does not check the value written to guest
MSR_IA32_FEATURE_CONTROL, though bits corresponding to disabled features
may be set. This patch makes KVM to validate individual bits written to
guest MSR_IA32_FEATURE_CONTROL according to enabled features.
Signed-off-by: Haozhong Zhang
hok Raj (1):
KVM: VMX: enable guest access to LMCE related MSRs
Haozhong Zhang (2):
KVM: VMX: move msr_ia32_feature_control to vcpu_vmx
KVM: VMX: validate individual bits of guest MSR_IA32_FEATURE_CONTROL
arch/x86/include/asm/kvm_host.h | 5 +++
arch/x86/kvm/vmx.c
On 06/05/16 21:43, Borislav Petkov wrote:
> On Sun, Jun 05, 2016 at 11:14:56PM +0800, Haozhong Zhang wrote:
> > Ashok was also involved in the development of v1 patch and it's based
> > on his v0 patch, so I think I should take his SOB?
>
> You have at least three optio
On 06/04/16 13:01, Boris Petkov wrote:
> Haozhong Zhang wrote:
>
> >On Intel platforms, this patch adds LMCE to KVM MCE supported
> >capabilities and handles guest access to LMCE related MSRs.
> >
> >Signed-off-by: Ashok Raj
> >Signed-off-by: Haozhong Zhang
On 06/03/16 17:34, Radim Krčmář wrote:
> 2016-06-03 14:08+0800, Haozhong Zhang:
> > On Intel platforms, this patch adds LMCE to KVM MCE supported
> > capabilities and handles guest access to LMCE related MSRs.
> >
> > Signed-off-by: Ashok Raj
> > Signed-off-by:
On Intel platforms, this patch adds LMCE to KVM MCE supported
capabilities and handles guest access to LMCE related MSRs.
Signed-off-by: Ashok Raj
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/vmx.c | 27 +--
arch
eature for guest. This KVM patch
handles guest access to LMCE-related MSR (MSR_IA32_MCG_EXT_CTL and
MSR_IA32_FEATURE_CONTROL).
Haozhong Zhang (1):
KVM: VMX: enable guest access to LMCE related MSRs
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/vmx.c
handling instead.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 1a8bfaa..50f2b78 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2802,7 +2802,7 @@ static int
On 11/25/15 10:45, Bandan Das wrote:
> Haozhong Zhang writes:
>
> > This patch removes the vpid check when emulating nested invvpid
> > instruction of type all-contexts invalidation. The existing code is
> > incorrect because:
> > (1) According to Intel SDM Vol 3,
erence. In practice, it can crash both KVM itself and L1
hypervisors that use invvpid (e.g. Xen).
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 87acc52..af823a3 100644
--- a/arch/x86/kvm/v
On 11/06/15 21:40, Paolo Bonzini wrote:
>
>
> On 06/11/2015 13:42, Haozhong Zhang wrote:
> > On 11/06/15 11:49, Paolo Bonzini wrote:
> >>
> >>
> >> On 20/10/2015 09:39, Haozhong Zhang wrote:
> >>> This patchset adds support for VMX TSC sca
On 11/06/15 11:49, Paolo Bonzini wrote:
>
>
> On 20/10/2015 09:39, Haozhong Zhang wrote:
> > This patchset adds support for VMX TSC scaling feature which is
> > available on Intel Skylake CPU. The specification of VMX TSC scaling
> > can be found at
> > http:
On Fri, Oct 23, 2015 at 02:51:06PM +0200, Paolo Bonzini wrote:
>
>
> On 23/10/2015 14:46, Joerg Roedel wrote:
> >> > No, since I don't have AMD machines at hand. The modifications to SVM
> >> > code are mostly lifting common code with VMX TSC scaling code, so it
> >> > should still work on AMD ma
Following is how I test this patchset. It should also apply to AMD
machines by replacing Intel with AMD and VMX TSC scaling with SVM TSC
ratio.
* Hardware Requirements
1) Two machines with Intel CPUs, called M_A and M_B below.
2) TSC frequency of CPUs on M_A is different from CPUs on M_B.
On Fri, Oct 23, 2015 at 02:46:19PM +0200, Joerg Roedel wrote:
> On Fri, Oct 23, 2015 at 08:32:28PM +0800, Haozhong Zhang wrote:
> > No, since I don't have AMD machines at hand. The modifications to SVM
> > code are mostly lifting common code with VMX TSC scaling code, so it
&
On Fri, Oct 23, 2015 at 12:06:50PM +0200, Joerg Roedel wrote:
> On Tue, Oct 20, 2015 at 03:39:00PM +0800, Haozhong Zhang wrote:
> > VMX TSC scaling shares some common logics with SVM TSC ratio which
> > is already supported by KVM. Patch 1 ~ 8 move those common logics from
>
The number of bits of the fractional part of the 64-bit TSC scaling
ratio in VMX and SVM is different. This patch makes the architecture
code to collect the number of fractional bits and other related
information into variables that can be accessed in the common code.
Signed-off-by: Haozhong
This patch makes kvm-intel to return a scaled host TSC plus the TSC
offset when handling guest readings to MSR_IA32_TSC.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
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