Hello,
On Wed, Feb 24, 2016 at 06:45:33PM +0530, Laxman Dewangan wrote:
> Use devm_pinctrl_register() for pin control registration.
>
> Signed-off-by: Laxman Dewangan
Acked-by: Antoine Tenart
Thanks!
Antoine
> Cc: Antoine Ténart
> ---
> drivers/pinctrl/berlin/berlin.c
Hi,
On Tue, Aug 26, 2014 at 06:42:42PM +0800, Peter Chen wrote:
> On Fri, Aug 22, 2014 at 05:50:20PM +0200, Antoine Ténart wrote:
> >
> > /**
> > + * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
> > + * interfaces
> > + * @ci: th
OTG state.
Signed-off-by: Antoine Ténart
Acked-by: Peter Chen
---
drivers/phy/phy-omap-usb2.c | 8 +---
drivers/usb/chipidea/debug.c| 3 +-
drivers/usb/chipidea/otg_fsm.c | 12 ++---
drivers/usb/common/usb-otg-fsm.c| 8 ++--
drivers/usb/host/ohci-omap.c| 2 +-
d
The patch adding support to the generic PHY framework introduced a
'gen_phy' member in the HCD structure. Rename it to 'phy' to have a
consistent USB framework.
Signed-off-by: Antoine Ténart
Acked-by: Alan Stern
---
drivers/usb/core/hcd.c | 22 +++---
inc
.
Signed-off-by: Antoine Ténart
Acked-by: Alan Stern
---
drivers/usb/core/hcd.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 6619239baf6d..dc0e46e5e618 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Ténart
Acked-by: Alan Stern
---
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/core/hcd.c| 20 ++--
drivers/usb/
' and modifications
are done in all drivers accessing it. Renaming this pointer will allow
to keep the compatibility for USB PHY drivers.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/ci.h | 4 ++--
drivers/usb/chipidea/ci_hdrc_imx.c | 2 +-
drivers/usb/chipidea/ci_hdrc_m
Move the usb_otg member from struct usb_phy to struct ci_hdrc. Rework
its initialization taking in account this modification.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/ci.h | 1 +
drivers/usb/chipidea/host.c| 8 +++-
drivers/usb/chipidea/otg_fsm.c | 15
This patch adds support of the PHY framework in OTG and keeps the USB
PHY compatibility. Here the only modification is to add PHY member in
the OTG structure, along with the USB PHY one.
Signed-off-by: Antoine Ténart
---
include/linux/usb/otg.h | 3 +++
1 file changed, 3 insertions(+)
diff
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine T
HY drivers.
Signed-off-by: Antoine Ténart
---
drivers/phy/phy-omap-usb2.c | 6 ++--
drivers/usb/chipidea/otg_fsm.c | 2 +-
drivers/usb/phy/phy-ab8500-usb.c| 6 ++--
drivers/usb/phy/phy-fsl-usb.c | 13
drivers/usb/phy/phy-generic.c | 2 +-
drivers/usb/phy/phy
renaming and generic PHY support in separate
patches
[1] https://www.mail-archive.com/linux-usb@vger.kernel.org/msg43471.html
Antoine Ténart (9):
usb: move the OTG state from the USB PHY to the OTG structure
usb: rename phy to usb_phy in OTG
usb: add support to the generic PHY fr
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b
The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/ata/ahci-platform.txt | 41 ++
1 file changed, 41 insertions(+)
diff --git a
The ahci_platform driver is a generic driver using the libahci_platform
functions. Add a generic compatible to avoid having an endless list of
compatibles with no differences for the same driver.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci_platform.c | 2 ++
1 file changed, 2 insertions
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree
registers in the SATA range, the PHY seems to be integrated
and no information tells us the contrary. For these reasons, make the
driver a SATA PHY driver.
Signed-off-by: Antoine Ténart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-sata.c
onfigure registers in the
AHCI driver
- removed BG2 / BG2CD nodes
Antoine Ténart (8):
phy: add a driver for the Berlin SATA PHY
Documentation: bindings: add the Berlin SATA PHY
ata: libahci_platform: move port_map parameters into the AHCI
structure
ata: libahci: allow t
flags have been
removed from the ahci_platform_init_host() function, and inputs in the
ahci_host_priv structure are now directly filed.
Signed-off-by: Antoine Ténart
---
drivers/ata/acard-ahci.c | 2 +-
drivers/ata/ahci.c | 3 +--
drivers/ata/ahci.h | 10
-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
device tree, the port_map mask is computed automatically when using
this.
Signed-off-by: Antoine Ténart
Acked-by: Hans de Goede
Acked-by: Kishon Vijay Abraham I
---
drivers
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm
ilulre. Can you please look into it?
Sorry for that... I just fixed it. I'll test and send a new version.
Antoine
--
Antoine Ténart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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To unsubscribe from this list: send the line "unsubscribe linux
nd removed the 'force-port-map' property
- made the drivers a bit less magic :)
- wrote a function to select and configure registers in the
AHCI driver
- removed BG2 / BG2CD nodes
Antoine Ténart (8):
phy: add a driver for the Berlin SATA PHY
Documentation:
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree
The ahci_platform driver is a generic driver using the libahci_platform
functions. Add a generic compatible to avoid having an endless list of
compatibles with no differences for the same driver.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci_platform.c | 2 ++
1 file changed, 2 insertions
-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
device tree, the port_map mask is computed automatically when using
this.
Signed-off-by: Antoine Ténart
Acked-by: Hans de Goede
Acked-by: Kishon Vijay Abraham I
---
drivers
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm
The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/ata/ahci-platform.txt | 41 ++
1 file changed, 41 insertions(+)
diff --git a
flags have been
removed from the ahci_platform_init_host() function, and inputs in the
ahci_host_priv structure are now directly filled.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci.h | 10 ++
drivers/ata/ahci_da850.c | 3 +--
drivers/ata/ahci_imx.c | 3
registers in the SATA range, the PHY seems to be integrated
and no information tells us the contrary. For these reasons, make the
driver a SATA PHY driver.
Signed-off-by: Antoine Ténart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-sata.c
On Wed, Jul 30, 2014 at 11:35:26AM -0400, Tejun Heo wrote:
> On Wed, Jul 30, 2014 at 10:20:38AM +0200, Antoine Ténart wrote:
> > How do you want me to send the series? There is two conflicts when
> > applying to libata/for-3.17:
> > - patch 4/8: it takes into account a patch n
On Tue, Jul 29, 2014 at 10:40:42AM -0400, Tejun Heo wrote:
> On Thu, Jul 24, 2014 at 11:17:25AM +0200, Antoine Ténart wrote:
> > @@ -321,6 +321,8 @@ struct ahci_host_priv {
> > u32 cap;/* cap to use */
> > u32 cap2;
On Tue, Jul 29, 2014 at 10:34:38AM -0400, Tejun Heo wrote:
> On Tue, Jul 29, 2014 at 09:20:47AM +0200, Antoine Ténart wrote:
> > The current implementation of the libahci does not allow to use multiple
> > PHYs. This patch adds the support of multiple PHYs by the libahci while
>
-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
device tree, the port_map mask is computed automatically when using
this.
Signed-off-by: Antoine Ténart
Acked-by: Hans de Goede
---
Updated with the latest comment from Hans
; > Acked-by: Hans de Goede
>
> Antoine, can you please post an updated version of this patch? No
> need to repost the whole series. Also, how should the series be
> routed?
Sure, I'm doing this right away. Regarding the series, Kishon already
took patches 1-2.
Antoine
--
A
> > > ci->fsm.power_up = 1;
> > > ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
> > > ci->fsm.otg->state = OTG_STATE_UNDEFINED; diff --git
> > > a/include/linux/usb/otg.h b/include/linux/usb/otg.h index
> > > 33d3480..b2f7587 100
"Failed to allocate usb_otg structure for ci hdrc otg!\n");
> - return -ENOMEM;
> - }
> -
> - otg->phy = ci->transceiver;
> - otg->gadget = &ci->gadget;
> - ci->fsm.otg = otg;
> - ci->transceiver->otg = ci-&g
Hi Peter,
On Fri, Jul 25, 2014 at 10:18:54AM +0800, Peter Chen wrote:
> On Wed, Jul 16, 2014 at 10:26:01AM +0200, Antoine Ténart wrote:
> > Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> > and DMA mask, to support USB2 ChipIdea controllers that don'
Hi Peter,
On Thu, Jul 24, 2014 at 07:39:42PM +0800, Peter Chen wrote:
> On Tue, Jul 15, 2014 at 04:39:16PM +0200, Antoine Ténart wrote:
> >
> > /**
> > + * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
> > + * interfaces
registers in the SATA range, the PHY seems to be integrated
and no information tells us the contrary. For these reasons, make the
driver a SATA PHY driver.
Signed-off-by: Antoine Ténart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-sata.c
This patch moves force_port_map and mask_port_map into the
ahci_host_priv structure. This allows to modify them into the AHCI
framework. This is needed by the new dt bindings representing ports as
the port_map mask is computed automatically.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci.h
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree
The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/ata/ahci-platform.txt | 41 ++
1 file changed, 41 insertions(+)
diff --git a
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b
The ahci_platform driver is a generic driver using the libahci_platform
functions. Add a generic compatible to avoid having an endless list of
compatibles with no differences for the same driver.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci_platform.c | 2 ++
1 file changed, 2 insertions
-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
device tree, the port_map mask is computed automatically when using
this.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci.h | 7 +-
drivers/ata
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm
the 'force-port-map' property
- made the drivers a bit less magic :)
- wrote a function to select and configure registers in the
AHCI driver
- removed BG2 / BG2CD nodes
Antoine Ténart (8):
phy: add a driver for the Berlin SATA PHY
Documentation:
Hi,
On Tue, Jul 22, 2014 at 04:33:54PM -0500, Bin Liu wrote:
> On Wed, Jul 9, 2014 at 5:17 AM, Antoine Ténart
> wrote:
> > diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
> > index 7cccab6ff308..9a9702773e43 100644
> > --- a/drivers/usb/chipidea/d
y we still have a 1:1 way to map ports <-> phys if
> we want to do something with phys on a per port basis in the future.
>
> Note please also add a check that reg < nports so that we don't use
> the array out of bounds if there is an error in the dts.
Ok. I'll
Hi,
On Fri, Jul 18, 2014 at 09:27:28PM +0400, Sergei Shtylyov wrote:
> On 07/18/2014 04:30 PM, Antoine Ténart wrote:
>
> >diff --git a/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
> >b/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
> >new f
Hi,
On Fri, Jul 18, 2014 at 09:47:30AM -0400, Tejun Heo wrote:
> On Fri, Jul 18, 2014 at 02:30:02PM +0200, Antoine Ténart wrote:
> > @@ -321,6 +321,8 @@ struct ahci_host_priv {
> > u32 cap;/* cap to use */
> > u32 ca
Hi,
On Fri, Jul 18, 2014 at 03:17:45PM +0200, Lothar Waßmann wrote:
> Antoine Ténart wrote:
> > diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
> > index db9b90d876dd..2c2439b4101d 100644
> > --- a/drivers/ata/libahci_platform.c
The ahci_platform driver is a generic driver using the libahci_platform
functions. Add a generic compatible to avoid having an endless list of
compatibles with no differences for the same driver.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci_platform.c | 2 ++
1 file changed, 2 insertions
AHCI driver
- removed BG2 / BG2CD nodes
Antoine Ténart (8):
phy: add a driver for the Berlin SATA PHY
Documentation: bindings: add the Berlin SATA PHY
ata: libahci_platform: move port_map parameters into the AHCI
structure
ata: libahci: allow to use multiple PHYs
ata: ahci
-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
device tree, the port_map mask is computed automatically when using
this.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci.h | 3 +-
drivers/ata
This patch moves force_port_map and mask_port_map into the
ahci_host_priv structure. This allows to modify them into the AHCI
framework. This is needed by the new dt bindings representing ports as
the port_map mask is computed automatically.
Signed-off-by: Antoine Ténart
---
drivers/ata/ahci.h
The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/ata/ahci-platform.txt | 37 ++
1 file changed, 37 insertions(+)
diff --git a
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b
registers in the SATA range, the PHY seems to be integrated
and no information tells us the contrary. For these reasons, make the
driver a SATA PHY driver.
Signed-off-by: Antoine Ténart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-sata.c
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree
Hi Felipe,
On Wed, Jul 16, 2014 at 12:45:13PM -0500, Felipe Balbi wrote:
> On Tue, Jul 15, 2014 at 04:39:08PM +0200, Antoine Ténart wrote:
> >
> > [1] https://www.mail-archive.com/linux-usb@vger.kernel.org/msg43471.html
>
> Since this has a dependency on the other series w
On Wed, Jul 16, 2014 at 03:03:14PM +0530, Varka Bhadram wrote:
> On 07/16/2014 02:55 PM, Antoine Ténart wrote:
> >Hi Varka,
> >
> >On Wed, Jul 16, 2014 at 02:49:05PM +0530, Varka Bhadram wrote:
> >>On 07/16/2014 01:55 PM, Antoine Ténart wrote:
> >
Hi Varka,
On Wed, Jul 16, 2014 at 02:49:05PM +0530, Varka Bhadram wrote:
> On 07/16/2014 01:55 PM, Antoine Ténart wrote:
> >+static const struct of_device_id phy_berlin_sata_of_match[] = {
> >+{
> >+.compatible = "marvell,berlin2-usb-p
Hi Arnd,
On Wed, Jul 16, 2014 at 10:41:10AM +0200, Arnd Bergmann wrote:
> On Wednesday 16 July 2014 10:26:01 Antoine Ténart wrote:
> > +
> > + if (priv->dma_mask) {
> > + ret = dma_coerce_mask_and_coherent(&pdev->dev,
> > priv-&g
Hi Arnd,
On Wed, Jul 16, 2014 at 10:39:36AM +0200, Arnd Bergmann wrote:
> On Wednesday 16 July 2014 10:26:02 Antoine Ténart wrote:
> > +
> > +Required properties:
> > +- compatible: should be "chipidea,usb2"
> > +- reg: base address and length of the registers
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration.
Signed-off-by: Antoine Ténart
---
arch/arm/mach-berlin/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index 2631cfc5ab0d..3a4fd1e41801
The chip controller node now also describes the Marvell Berlin reset
controller. Add the required 'reset-cells' property.
Signed-off-by: Antoine Ténart
Acked-by: Philipp Zabel
---
arch/arm/boot/dts/berlin2.dtsi | 1 +
arch/arm/boot/dts/berlin2cd.dtsi | 1 +
arch/arm/boot/dts/ber
Add the driver driving the Marvell Berlin USB PHY. This allows to
initialize the PHY and to use it from the USB driver later.
Signed-off-by: Antoine Ténart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-usb.c | 223
Document the bindings of the Marvell Berlin USB PHY driver.
Signed-off-by: Antoine Ténart
---
Documentation/devicetree/bindings/phy/berlin-usb-phy.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
diff --git
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q.dtsi | 52 +
1 file changed, 52 insertions(+)
diff --git a/arch
dified the PHY driver to support the one one the BG2CD as
well
- documented the reset properties
- added bindings for the BG2CD
- cosmetic fixes
[1] https://lkml.org/lkml/2014/7/15/330
Antoine Ténart (10):
reset: add the Berlin reset controller driver
Doc
Document the USB2 ChipIdea driver (ci13xxx) bindings.
Signed-off-by: Antoine Ténart
---
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
diff --git a
Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
and DMA mask, to support USB2 ChipIdea controllers that don't need
specific functions.
Needed for the Marvell Berlin SoCs USB controllers.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/Makefile | 1 +
driver
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++
1 file changed, 53 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
b/arch/arm
From: Sebastian Hesselbarth
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Sebastian Hesselbarth
---
arch/arm/boot/dts/berlin2cd-google-chromecast.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boo
From: Sebastian Hesselbarth
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Antoine Ténart
---
arch/arm/boot/dts/berlin2cd.dtsi
Add a reset controller for Marvell Berlin SoCs which is used by the
USB PHYs drivers (for now).
Signed-off-by: Antoine Ténart
Signed-off-by: Sebastian Hesselbarth
Acked-by: Philipp Zabel
---
drivers/reset/Makefile | 1 +
drivers/reset/reset-berlin.c | 131
Add the reset binding documentation to the SoC binding documentation as
the reset driver in Marvell Berlin SoC is part of the chip/system
control registers. This patch adds the required properties to configure
the reset controller.
Signed-off-by: Antoine Ténart
Acked-by: Philipp Zabel
ing it in his case?
Antoine
--
Antoine Ténart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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s in the compatible
> > > string.
> >
> > I'm sure wildcards shouldn't be allowed there. :-)
>
> Then, what's your guys recommend, how about "chipidea,usb2-generic"?
So what do you think? "chipidea,ci13", "chipidea,usb2-generic&quo
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/core/hcd.c| 20 ++--
drivers/usb/core/hub.c
ate
patches
[1] https://www.mail-archive.com/linux-usb@vger.kernel.org/msg43471.html
Antoine Ténart (8):
usb: move the OTG state from the USB PHY to the OTG structure
usb: rename phy to usb_phy in OTG
usb: add support to the generic PHY framework in OTG
usb: rename phy to usb_phy in
The patch adding support to the generic PHY framework introduced a
'gen_phy' member in the HCD structure. Rename it to 'phy' to have a
consistent USB framework.
Signed-off-by: Antoine Ténart
---
drivers/usb/core/hcd.c | 22 +++---
include/linux/usb/hcd.
driver.
Signed-off-by: Antoine Ténart
---
drivers/usb/core/hcd.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 228bad89f09b..ce9ea309ab0f 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -2650,7
HY drivers.
Signed-off-by: Antoine Ténart
---
drivers/phy/phy-omap-usb2.c | 6 ++--
drivers/usb/chipidea/otg_fsm.c | 2 +-
drivers/usb/phy/phy-ab8500-usb.c| 6 ++--
drivers/usb/phy/phy-fsl-usb.c | 13
drivers/usb/phy/phy-generic.c | 2 +-
drivers/usb/phy/phy
' and modifications
are done in all drivers accessing it. Renaming this pointer will allow
to keep the compatibility for USB PHY drivers.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/ci.h | 4 ++--
drivers/usb/chipidea/ci_hdrc_imx.c | 2 +-
drivers/usb/chipidea/ci_hdrc_m
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine T
This patch adds support of the PHY framework in OTG and keeps the USB
PHY compatibility. Here the only modification is to add PHY member in
the OTG structure, along with the USB PHY one.
Signed-off-by: Antoine Ténart
---
include/linux/usb/otg.h | 3 +++
1 file changed, 3 insertions(+)
diff
gt; + handle_domain_irq(sun4i_irq_domain, hwirq, regs);
> hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
> } while (hwirq != 0);
> }
> --
> 2.0.0
>
>
> ___
> linux-arm-kernel mailing li
Hi Vivek,
On Mon, Jul 14, 2014 at 02:38:03PM +0530, Vivek Gautam wrote:
> On Wed, Jul 9, 2014 at 3:47 PM, Antoine Ténart
> wrote:
> > diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
> > index bec31e2efb88..b985af5b167c 100644
> > --- a/drivers/usb/core/hcd
On Thu, Jul 10, 2014 at 08:56:00AM -0500, Felipe Balbi wrote:
> On Thu, Jul 10, 2014 at 03:51:24PM +0200, Antoine Ténart wrote:
> > On Thu, Jul 10, 2014 at 08:42:27AM -0500, Felipe Balbi wrote:
> > > On Wed, Jul 09, 2014 at 12:17:16PM +0200, Antoine Ténart wrote:
> >
On Thu, Jul 10, 2014 at 08:42:27AM -0500, Felipe Balbi wrote:
> On Wed, Jul 09, 2014 at 12:17:16PM +0200, Antoine Ténart wrote:
> > This patch adds the support to the PHY framework for ChipIdea drivers
> > while keeping the USB PHY compatibility. Changes are done in both the
>
Hi Felipe,
On Thu, Jul 10, 2014 at 08:40:23AM -0500, Felipe Balbi wrote:
> On Wed, Jul 09, 2014 at 12:17:13PM +0200, Antoine Ténart wrote:
> > Before using the PHY framework instead of the USB PHY one, we need to
> > move the OTG state into another place, since it won't be av
Hi Alan,
On Wed, Jul 09, 2014 at 10:41:50AM -0400, Alan Stern wrote:
> On Wed, 9 Jul 2014, Antoine Ténart wrote:
>
> > This patch adds the support to PHY framework in HCD code while keeping
> > the USB PHY compatibility. Changes are done in both the HCD common code
>
ng the OTG PHY.
Signed-off-by: Antoine Ténart
---
drivers/phy/phy-omap-usb2.c | 6 ++--
drivers/usb/chipidea/otg_fsm.c | 2 +-
drivers/usb/phy/phy-ab8500-usb.c| 6 ++--
drivers/usb/phy/phy-fsl-usb.c | 12
drivers/usb/phy/phy-generic.c | 2 +-
drivers/us
' member into the
ci_hdrc structre.
Signed-off-by: Antoine Ténart
---
drivers/usb/chipidea/ci.h | 4 ++-
drivers/usb/chipidea/ci_hdrc_imx.c | 2 +-
drivers/usb/chipidea/ci_hdrc_msm.c | 6 ++--
drivers/usb/chipidea/core.c| 67 +++---
drivers/u
ttp://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/267981.html
Antoine Ténart (4):
usb: move the OTG state from the USB PHY to the OTG structure
usb: add support to the PHY framework for OTG
usb: add support to the PHY framework for HCD
usb: chipidea: add support to the PHY framework f
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