On Mon, Sep 28, 2020 at 10:21:43AM +0800, Anson Huang wrote:
> PMIC driver is ready on i.MX8MN EVK board, assign cpu-supply for
> each A53 and restore the operating points table to enable cpufreq.
>
> Signed-off-by: Anson Huang
> ---
> arch/arm64/boot/dts/freescale/imx8mn-evk.dts | 32
> +++
On Fri, Sep 25, 2020 at 10:52:55PM +0900, Jiada Wang wrote:
> Document the mXT1386 compatible string.
>
> Signed-off-by: Jiada Wang
> ---
> Documentation/devicetree/bindings/input/atmel,maxtouch.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/input
Below is the list of build error/warning regressions/improvements in
v5.9-rc7[1] compared to v5.8[2].
Summarized:
- build errors: +4/-3
- build warnings: +61/-23
JFYI, when comparing v5.9-rc7[1] to v5.9-rc6[3], the summaries are:
- build errors: +5/-3
- build warnings: +15/-2
Happy fixin
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> Hi,
>
> This is exactly the same as v4 but with more details in some commit log
> and also device-tree soundcard and DAI node have been merged.
>
> Regards,
> Clement
>
> Change since v4;
> - add more comment on get_wss() and set_channel_cfg
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Marcus Cooper
>
> On the newer SoCs such as the H3 and A64 this is set by default
> to transfer a 0 after each sample in each slot. However the A10
> and A20 SoCs that this driver was developed on had a default
> setting where it padd
On Sun, 2020-09-27 at 21:42 +0800, Tang Bin wrote:
> In this function, we don't need dev_err() message because
> when something goes wrong, devm_platform_ioremap_resource()
> can print an error message itself, so remove the redundant
> one.
>
> Signed-off-by: Zhang Shengju
> Signed-off-by: Tang B
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Marcus Cooper
>
> Extend the functionality of the driver to include support of 20 and
> 24 bits per sample.
>
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Samuel Holland
>
> Because SUN4I_I2S_FIFO_CTRL_REG is volatile, writes done while the
> regmap is cache-only are ignored. To work around this, move the
> configuration to a callback that runs while the ASoC core has a
> runtime PM ref
On Thu, Sep 24, 2020 at 09:38:07PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> On Mon, Sep 21, 2020 at 06:55:52PM +0200, Guido Günther wrote:
> > We need to reset both for the panel to show an image.
> >
> > Signed-off-by: Guido Günther
> > ---
> > .../bindings/display/panel/mantix,mlaf057we51-x
On Sun, Sep 27, 2020 at 09:49:07PM +0200, Thomas Gleixner wrote:
> From: Sebastian Andrzej Siewior
>
> kaweth_async_set_rx_mode() invokes kaweth_contol() and has two callers:
>
> - kaweth_open() which is invoked from preemptible context
> .
> - kaweth_start_xmit() which holds a spinlock and has
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> The FIFO TX reg is volatile and sun8i i2s register
> mapping is different from sun4i.
>
> Even if in this case it's doesn't create an issue,
> Avoid setting some regs that are undefined in sun8i.
>
> Signed-off-by: Clément Péron
> Acked-by:
On Thu, Sep 24, 2020 at 04:16:59PM +0200, Uwe Kleine-König wrote:
> On Thu, Sep 24, 2020 at 04:23:34PM +0300, Andy Shevchenko wrote:
> > On Thu, Sep 24, 2020 at 08:55:34AM +0200, Uwe Kleine-König wrote:
> > > On Tue, Sep 15, 2020 at 04:23:37PM +0800, Rahul Tanwar wrote:
> >
> > ...
> >
> > > > +
On Wed, 23 Sep 2020 at 16:48, Tomer Maimon wrote:
>
> Add the following new device nodes to
> NPCM750 evolution board device tree:
>
> - NPCM7xx Pin controller and GPIO
> - NPCM7xx PWM and FAN.
> - NPCM7xx EHCI USB.
> - NPCM7xx KCS.
> - NPCM Reset.
>
During an investigation to fix up the execute bits of scripts in the kernel
repository, Andrew Morton and Kees Cook pointed out that the execute bit
should not matter, and that build scripts cannot rely on that. Kees could
not point to any documentation, though.
Provide some basic documentation ho
Add some optional properties which are needed for hard wired devices
Signed-off-by: Chunfeng Yun
---
Documentation/devicetree/bindings/usb/usb-hcd.yaml | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml
b/Documentation/devicetree/
The DMA (BCDMA/PKTDMA and their rings/flows) events are under the INTA's
supervision as unmapped events in AM64.
In order to keep the current SW stack working, the INTA driver must replace
the dev_id with it's own when a request comes for BCDMA or PKTDMA
resources.
Implement parsing of the option
The new DMA architecture introduced with AM64 introduced new event types:
unampped events.
These events are mapped within INTA in contrast to other K3 devices where
the events with similar function was originating from the UDMAP or ringacc.
The ti,unmapped-event-sources should contain phandle arr
Hi,
The version of INTA within DMSS (in AM64) changed how the events from the DMAs
are handled and how sysfw is presenting these events to be used for interrupts.
The DMA related events are directly mapped within INTA as unmapped events in
contrast to previous devices with NAVSS where the events
Note:
- This patch depends on this patch series
ASoC: qcom: dt-bindings: Add sc7180 machine bindings
https://patchwork.kernel.org/patch/11773221/
ASoC: qcom: sc7180: Add machine driver for sound card registration
https://patchwork.kernel.org/patch/11773223/
- The patch is made by the collabora
In addition, having mixer control to switch between DMICs for
"qcom,sc7180-sndcard-rt5682-m98357-2mic" 2mic case.
Refer to this one as an example,
commit b7a742cff3f6 ("ASoC: AMD: Use mixer control to switch between DMICs")
Signed-off-by: Ajye Huang
---
This patch depends on this patch series
ht
Add compatible "qcom,sc7180-sndcard-rt5682-m98357-2mic"
for 2mic case.
Signed-off-by: Ajye Huang
---
This patch depends on this patch series
https://patchwork.kernel.org/patch/11773221/ .
.../bindings/sound/qcom,sc7180.yaml | 64 ++-
1 file changed, 63 insertions(+), 1
On Wed, 23 Sep 2020 at 16:48, Tomer Maimon wrote:
>
> Add the following new device nodes to NPCM7XX:
>
> - NPCM7xx PWM and FAN.
> - NPCM7xx EHCI USB.
> - NPCM7xx KCS.
> - NPCM Reset.
> - NPCM Peripheral SPI.
> - NPCM FIU SPI.
> - NPCM HWRNG.
On Wed, 23 Sep 2020 at 16:48, Tomer Maimon wrote:
>
> Add pin controller and GPIO node to NPCM7XX device tree.
>
> Signed-off-by: Tomer Maimon
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 565 ++
> 1 file changed, 565 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nu
On 22.09.2020 08:59, Muchun Song wrote:
> On Mon, Sep 14, 2020 at 9:56 PM Alexander Popov wrote:
>>
>> On 07.09.2020 16:53, Muchun Song wrote:
>>> On Mon, Sep 7, 2020 at 7:24 PM Alexander Popov wrote:
On 07.09.2020 05:54, Muchun Song wrote:
> Hi all,
>
> Any comments or sugg
On Mon 28.Sep'20 at 7:23:05 +0200, Greg Kroah-Hartman wrote:
On Mon, Sep 28, 2020 at 12:10:07PM +0800, Shuo A Liu wrote:
> You just raced with userspace and lost. If you want to add attribute
> files to a device, use the default attribute group list, and it will be
> managed properly for you b
On Mon 28.Sep'20 at 7:25:16 +0200, Greg Kroah-Hartman wrote:
On Mon, Sep 28, 2020 at 11:50:30AM +0800, Shuo A Liu wrote:
> > + write_lock_bh(&acrn_vm_list_lock);
> > + list_add(&vm->list, &acrn_vm_list);
> > + write_unlock_bh(&acrn_vm_list_lock);
>
> Why are the _bh() variants being
Adds dsi host controller support for the Unisoc's display subsystem.
Adds dsi phy support for the Unisoc's display subsystem.
Only MIPI DSI Displays supported, DP/TV/HMDI will be support
in the feature.
Cc: Orson Zhai
Cc: Chunyan Zhang
Signed-off-by: Kevin Tang
---
drivers/gpu/drm/sprd/Makefil
From: Kevin Tang
Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
support for Unisoc's display subsystem.
RFC v7:
- Fix DTC unit name warnings
- Fix the problem of maintainers
Cc: Orson Zhai
Cc: Chunyan Zhang
Signed-off-by: Kevin Tang
---
.../display/sprd/sprd,sharkl3-dsi-host.yaml
From: Kevin Tang
DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
which transfers the image data from a video memory buffer to an internal
LCD interface.
RFC v7:
- Fix DTC unit name warnings
- Fix the problem of maintainers
Cc: Orson Zhai
Cc: Chunyan Zhang
Signed
Adds DPU(Display Processor Unit) support for the Unisoc's display subsystem.
It's support multi planes, scaler, rotation, PQ(Picture Quality) and more.
RFC v7:
- Remove plane_update stuff, dpu handles all the HW update in
crtc->atomic_flush
RFC v6:
- Access registers via readl/writel
- Che
ChangeList:
v1:
1. only upstream modeset and atomic at first commit.
2. remove some unused code;
3. use alpha and blend_mode properties;
3. add yaml support;
4. remove auto-adaptive panel driver;
5. bugfix
v2:
1. add sprd crtc and plane module for KMS, preparing for multi crtc&encoder
2. remove g
From: Kevin Tang
The Unisoc DRM master device is a virtual device needed to list all
DPU devices or other display interface nodes that comprise the
graphics subsystem
RFC v7:
- Fix DTC unit name warnings
- Fix the problem of maintainers
Cc: Orson Zhai
Cc: Chunyan Zhang
Signed-off-by: Kevi
Adds drm support for the Unisoc's display subsystem.
This is drm kms driver, this driver provides support for the
application framework in Android, Yocto and more.
Application framework can access Unisoc's display internel
peripherals through libdrm or libkms, it's test ok by modetest
(DRM/KMS te
> @@ -3378,7 +3054,6 @@ static const struct consw fb_con = {
> .con_font_default = fbcon_set_def_font,
> .con_font_copy = fbcon_copy_font,
> .con_set_palette= fbcon_set_palette,
> - .con_scrolldelta= fbcon_scrolldelta,
> .con_set_origin
Hi John,
On 26.09.2020 03:55, John Ogness wrote:
> If a reader provides a buffer that is smaller than the message text,
> the @text_len field of @info will have a value larger than the buffer
> size. If readers blindly read @text_len bytes of data without
> checking the size, they will read beyond
A few cleanups that don't deserve separate patches, but that
also should not clutter up other functional changes:
1. Remove an unnecessary #include
2. Restore the sorted order of TEST_GEN_FILES.
3. Add -lpthread to the common LDLIBS, as it is harmless and several
tests use it. Including, soo
For quite a while, I was doing a quick hack to gup_test.c (previously,
gup_benchmark.c) whenever I wanted to try out my changes to dump_page().
This makes that hack unnecessary, and instead allows anyone to easily
get the same coverage from a user space program. That saves a lot of
time because you
Avoid the need to copy-paste the gup_test ioctl commands and the struct
gup_test definition, between the kernel and the user space application,
by providing a new header file for these. This allows easier and safer
adding of new ioctl calls, as well as reducing the overall line count.
Details: The
Rename to *.sh, in order to match the conventions of all of the other
items in selftest/vm.
The only reason not to use a .sh suffix a shell script like this, might
be to make it look more like a normal program, but that's not an issue
here.
Signed-off-by: John Hubbard
---
tools/testing/selftest
HMM selftests are incredibly useful, but they are only effective if
people actually build and run them. All the other tests in selftests/vm
can be built with very standard, always-available libraries: libpthread,
librt. The hmm-tests.c program, on the other hand, requires something
that is (much) l
This is based on the latest mmotm.
Summary: This series provides two main things, and a number of smaller
supporting goodies. The two main points are:
1) Add a new sub-test to gup_test, which in turn is a renamed version of
gup_benchmark. This sub-test allows nicer testing of dump_pages(), at
lea
Therefore, some minor cleanup and improvements are in order:
1. Rename the other items appropriately.
2. Stop reporting timing information on the non-benchmark items. It's
still being recorded and is available, but there's no point in
cluttering up the report with data that no one reasonabl
Run benchmarks on the _fast variants of gup and pup, as originally
intended.
Run the new gup_test sub-test: dump pages. In addition to exercising the
dump_page() call, it also demonstrates the various options you can use
to specify which pages to dump, and how.
Signed-off-by: John Hubbard
---
t
Rename nearly every "gup_benchmark" reference and file name to
"gup_test". The one exception is for the actual gup benchmark test
itself.
The current code already does a *little* bit more than benchmarking,
and definitely covers more than get_user_pages_fast(). More importantly,
however, subsequen
On Mon, 28 Sep 2020 at 07:56, Christophe Leroy
wrote:
>
>
>
> Le 28/09/2020 à 01:44, Jarkko Sakkinen a écrit :
> > On Fri, Sep 25, 2020 at 09:00:18AM -0300, Jason Gunthorpe wrote:
> >> On Fri, Sep 25, 2020 at 01:29:20PM +0300, Jarkko Sakkinen wrote:
> >>> On Fri, Sep 25, 2020 at 09:00:56AM +0200,
On Sun, 2020-09-27 at 21:49 +0200, Thomas Gleixner wrote:
> From: Sebastian Andrzej Siewior
>
> The usage of in_interrupt) in driver code is phased out.
>
> The iwlwifi_dbg tracepoint records in_interrupt() seperately, but that's
> superfluous because the trace header already records all kind of
On Wed, 23 Sep 2020 at 16:48, Tomer Maimon wrote:
>
> Modify NPCM7xx device tree timer register size
> from 0x50 to 0x1C to control only the timer registers
> and not other hw modules.
>
> Signed-off-by: Tomer Maimon
Reviewed-by: Joel Stanley
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.d
On Wed, 23 Sep 2020 at 16:48, Tomer Maimon wrote:
>
> Modify NPCM7xx device tree clock parameter to clock constants that
> define at include/dt-bindings/clock/nuvoton,npcm7xx-clock.h file.
>
> Signed-off-by: Tomer Maimon
Reviewed-by: Joel Stanley
Tomer, for next time: when sending new versions
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller.
This PWM controller does not have any other consumer, it is a
dedicated PWM controller for fan attached to the system. Add
driver for this PWM fan controller.
Signed-off-by: Rahul Tanwar
Reviewed-by: Andy Shevchenko
---
drivers/pw
Intel's LGM(Lightning Mountain) SoC contains a PWM fan controller
which is only used to control the fan attached to the system. This
PWM controller does not have any other consumer other than fan.
Add DT bindings documentation for this PWM fan controller.
Signed-off-by: Rahul Tanwar
Reviewed-by:
On Mon, Sep 28, 2020 at 04:08:36PM +1000, Dave Airlie wrote:
> Is this possible in drm-next now (it's 5.9.0-rc5 based)?
>
> or will I need to get a stable shared git tree that goes into drm-next
> and you send to Linus early in the MR?
I think we'll need a stable branch. Let me help Paul with t
On Sun, Sep 27, 2020 at 08:05:07AM +, Sherry Sun wrote:
> Hi Christoph,
>
> > On Fri, Sep 25, 2020 at 03:26:29PM +0800, Sherry Sun wrote:
> > > Set VIRTIO_F_ACCESS_PLATFORM feature for nocoherent platform, since it
> > > needs the DMA API for virtio.
> >
> > Given that VOP is a plug-in PCIe c
On Sun, Sep 27, 2020 at 07:58:29AM +, Sherry Sun wrote:
> Thanks for your reply.
> Can you explain why we cannot use the API and header above in drivers?
> And do you know if there are any APIs that could replace this to check the
> device hardware dma coherent support?
If your treat the memo
On Mon, 28 Sep 2020 at 16:05, Christoph Hellwig wrote:
>
> On Mon, Sep 28, 2020 at 01:54:05PM +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
> > failed like this:
>
> The driver needs to switch do dma_alloc_noncoherent
Hi Marcel,
On Sun, 27 Sep 2020 at 20:09, Marcel Holtmann wrote:
>
> Hi Archie,
>
> >>> When receiving connection, we only check whether the link has been
> >>> encrypted, but not the encryption key size of the link.
> >>>
> >>> This patch adds check for encryption key size, and reject L2CAP
> >>>
Add support Winbond w25q{64,128,256}jwm which are identical to existing
w25q32jwm except for their sizes.
This was tested with w25q64jwm, basic erase/write/readback and
lock/unlock both lower/upper blocks were okay.
Signed-off-by: i...@chromium.org
Signed-off-by: Xingyu Wu
Signed-off-by: ST Lin
On Mon, Sep 28, 2020 at 7:18 AM Dmitry Vyukov wrote:
> > On Sat, Sep 19, 2020 at 01:32:14AM -0700, syzbot wrote:
> > > Hello,
> > >
> > > syzbot found the following issue on:
> > >
> > > HEAD commit:92ab97ad Merge tag 'sh-for-5.9-part2' of
> > > git://git.libc.or..
> > > git tree: upstr
That is the crude fix, and it should work. I'd much rather make
compat_iovec always available, though. Let me give that a spin.
On Mon, Sep 28, 2020 at 01:54:05PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
> failed like this:
The driver needs to switch do dma_alloc_noncoherent + dma_sync_single*
like the other drivers converted in the dma tree.
On 16-09-20, 16:11, Stephen Boyd wrote:
> This patch series is based on v12 of the msm DP driver submission[1]
> plus a compliance patch[2]. In the v5 patch series review I suggested
> that the DP PHY and PLL be split out of the drm driver and moved to the
> qmp phy driver. This patch series does t
Le 28/09/2020 à 01:44, Jarkko Sakkinen a écrit :
On Fri, Sep 25, 2020 at 09:00:18AM -0300, Jason Gunthorpe wrote:
On Fri, Sep 25, 2020 at 01:29:20PM +0300, Jarkko Sakkinen wrote:
On Fri, Sep 25, 2020 at 09:00:56AM +0200, Ard Biesheuvel wrote:
On Fri, 25 Sep 2020 at 07:56, Jarkko Sakkinen
w
Hi Greg,
We have a leak fix for TI driver, please consider for v5.9
The following changes since commit ad7a7acaedcf45071c822b6c983f9c1e084041c9:
phy: omap-usb2-phy: disable PHY charger detect (2020-08-31 14:30:59 +0530)
are available in the Git repository at:
git://git.kernel.org/pub/scm/l
Hi,
Are there any issues or concerns about this patch?
Thank you,
Suravee
On 9/22/20 3:44 PM, Suravee Suthikulpanit wrote:
The struct vcpu_svm.ir_list and ir_list_lock are being accessed even when
AVIC is not enabled, while current code only initialize the list and
the lock only when AVIC is e
There are two chip pins named TXDLY and RXDLY which actually adds the 2ns
delays to TXC and RXC for TXD/RXD latching. These two pins can config via
4.7k-ohm resistor to 3.3V hw setting, but also config via software setting
(extension page 0xa4 register 0x1c bit13 12 and 11).
The configuration regi
Hi Marcel,
> On September 27, 2020 20:05, Marcel Holtmann wrote:
>
> Hi Alex,
>
> > When someone attacks the service provider, it creates connection,
> > authenticates. Then it requests key size of one byte and it identifies
> > the key with brute force methods.
> >
> > After
Hi Prasad,
On 2020-09-28 06:04, Prasad Sodagudi wrote:
Qualcomm team have tried to upstreaming the register trace buffer(RTB)
use case earlier - [1]
with pstore approach. In that discussion, there was suggestion to use
the ftrace events for
tracking the register reads and writes. In this patch,
On Sun Sep 27 2020, Yangbo Lu wrote:
> Added the missing stub function for ptp_get_msgtype().
>
> Reported-by: Randy Dunlap
> Fixes: 036c508ba95e ("ptp: Add generic ptp message type function")
> Signed-off-by: Yangbo Lu
Oh, my bad. Thanks for fixing it.
Thanks,
Kurt
signature.asc
Description:
On Mon, Sep 28, 2020 at 1:32 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > From: Jernej Skrabec
> >
> > Add the I2S node used by the HDMI and a simple-soundcard to
> > link audio between HDMI and I2S.
> >
> > Note that the HDMI codec requires an inverted
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> Now that HDMI sound node is available in the SoC dtsi.
> Enable it for this board.
>
> Signed-off-by: Clément Péron
Acked-by: Chen-Yu Tsai
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> Add the I2S node used by the HDMI and a simple-soundcard to
> link audio between HDMI and I2S.
>
> Note that the HDMI codec requires an inverted frame clock and
> a fixed I2S width. As there is no such option for I2
Dear friend,
This transmission is to inform you that we have chosen you from our
Website as a new Branch manager in your country, for more about the
Position email US via this Email: info_custom...@consultant.com, once
we receive your respond we shall proceed. The position cannot stop you
doing any
Add initial device tree support for the Qualcomm IPQ5018 SoC and
MP03.1-C2 board.
Signed-off-by: Varadarajan Narayanan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts | 30
This patch adds support for the global clock controller found on
the IPQ5018 based devices.
Signed-off-by: Varadarajan Narayanan
---
.../devicetree/bindings/clock/qcom,gcc.yaml| 3 +
include/dt-bindings/clock/qcom,gcc-ipq5018.h | 183 +
include/dt-bindings/res
On Mon, Sep 28, 2020 at 11:50:30AM +0800, Shuo A Liu wrote:
> > > + write_lock_bh(&acrn_vm_list_lock);
> > > + list_add(&vm->list, &acrn_vm_list);
> > > + write_unlock_bh(&acrn_vm_list_lock);
> >
> > Why are the _bh() variants being used here?
> >
> > You are only accessing this list from userspa
On Fri, Aug 21, 2020 at 8:10 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:4b6c093e Merge tag 'block-5.9-2020-08-14' of git://git.ker..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=179f99f690
> kernel config:
On Mon, Sep 28, 2020 at 12:10:07PM +0800, Shuo A Liu wrote:
> > You just raced with userspace and lost. If you want to add attribute
> > files to a device, use the default attribute group list, and it will be
> > managed properly for you by the driver core.
> >
> > Huge hint, if a driver every ha
f30_data in rmi_device_platform_data could be also referenced by RMI
function 3A, so rename it and the structure name to avoid confusion.
Signed-off-by: Vincent Huang
Reviewed-by: Hans de Goede
Tested-by: Hans de Goede
---
drivers/hid/hid-rmi.c | 2 +-
drivers/input/mouse/synaptics.
RMI4 F3A supports the touchpad GPIO function, it's designed to
support more GPIOs and used on newer touchpads. This patch adds
support of the touchpad buttons.
Signed-off-by: Vincent Huang
Reviewed-by: Hans de Goede
Tested-by: Hans de Goede
---
drivers/input/rmi4/Kconfig | 8 ++
drivers
RMI4 F3A supports the touchpad GPIO function, it's designed to support
more GPIOs and used on newer touchpads. The patches add support of
touchpad buttons and rename f30_data to avoid confusion.
Changes in v2:
- Combined patch 1 and 2 of v1 to fix bisectability.
Vincent Huang (2):
Input: synapt
On Sun, Sep 27, 2020 at 05:34:50PM -0700, Prasad Sodagudi wrote:
> +config TRACE_RW
> + bool "Register read/write tracing"
> + select TRACING
> + default n
n is always the default, no need to list it.
And you only did this for one arch, yet you made a generic kernel config
option, is
Enables clk & pinctrl related configs
Signed-off-by: Varadarajan Narayanan
---
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6d04b95..ca25f79 100644
--- a/arch/arm64/configs/defconfig
+++ b/ar
On Sun, Sep 27, 2020 at 05:34:50PM -0700, Prasad Sodagudi wrote:
> Add register read/write operations tracing support.
> ftrace events helps trace register read and write
> location details of memory mapped IO registers. Also
> add _no_log variants the writel_relaxed/readl_relaed
> APIs to avoid ex
On Sun, Sep 27, 2020 at 4:57 PM Borislav Petkov wrote:
>
> On Sat, Sep 19, 2020 at 01:32:14AM -0700, syzbot wrote:
> > Hello,
> >
> > syzbot found the following issue on:
> >
> > HEAD commit:92ab97ad Merge tag 'sh-for-5.9-part2' of git://git.libc.or..
> > git tree: upstream
> > console o
Add programming sequence support for managing the Stromer
PLLs.
Signed-off-by: Varadarajan Narayanan
---
drivers/clk/qcom/clk-alpha-pll.c | 156 ++-
drivers/clk/qcom/clk-alpha-pll.h | 5 ++
2 files changed, 160 insertions(+), 1 deletion(-)
diff --git a/driv
Add device tree binding Documentation details for ipq5018
pinctrl driver.
Signed-off-by: Varadarajan Narayanan
---
.../bindings/pinctrl/qcom,ipq5018-pinctrl.yaml | 143 +
1 file changed, 143 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/qcom
This adds the pinctrl definitions for the TLMM of IPQ5018.
Signed-off-by: Varadarajan Narayanan
---
drivers/pinctrl/qcom/Kconfig | 10 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-ipq5018.c | 903 +
3 files changed, 914
The IPQ5018 is Qualcomm's 802.11ax SoC for Routers,
Gateways and Access Points.
This series adds minimal board boot support for ipq5018-mp03.1-c2 board.
Varadarajan Narayanan (7):
clk: qcom: clk-alpha-pll: Add support for Stromer PLLs
dt-bindings: arm64: ipq5018: Add binding descriptions for
Add support for the global clock controller found on IPQ5018
based devices.
Signed-off-by: Varadarajan Narayanan
---
drivers/clk/qcom/Kconfig |8 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc-ipq5018.c | 3833
include/linux/clk
On Mon, Sep 28, 2020 at 2:24 AM Tetsuo Handa
wrote:
>
> On 2020/09/16 21:14, Dmitry Vyukov wrote:
> > On Wed, Sep 16, 2020 at 1:51 PM wrote:
> >>
> >> On Wed, Sep 16, 2020 at 01:28:19PM +0200, Dmitry Vyukov wrote:
> >>> On Fri, Sep 4, 2020 at 6:05 PM Tetsuo Handa
> >>> wrote:
>
> Hello
On Fri, Sep 25, 2020 at 02:42:56PM +1000, Herbert Xu wrote:
> Resend with proper subject.
>
> ---8<---
> The struct flowi must never be interpreted by itself as its size
> depends on the address family. Therefore it must always be grouped
> with its original family value.
>
> In this particular
It is incorrect to use irq_enabled flag for run_measurement check, as
irq_enabled is NOT always equal to thermal mode, when temperature is
higher than passive point, an alarm irq will be pending, and irq_enabled
flag will be set to false while thermal mode is still enabled, then the
following tempe
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> H6 I2S is very similar to H3, except that it supports up to 16 channels
> and thus few registers have fields on different position.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
> Signed-off-by:
On Mon, Sep 28, 2020 at 12:37 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > We are actually using a complex formula to just return a bunch of
> > simple values. Also this formula is wrong for sun4i when calling
BTW, it is entirely possible that the compi
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> As slots and slot_width can be overwritter in case set_tdm() is
> called. Avoid to have this logic in set_chan_cfg().
It doesn't seem that set_tdm_slot() would get called concurrently
with hw_params(), at least not for the simple-card famil
Sathyanarayanan，
-Original Message-
From: Kuppuswamy, Sathyanarayanan
Sent: Monday, September 28, 2020 2:59 AM
To: Zhao, Haifeng ; bhelg...@google.com;
ooh...@gmail.com; rus...@russell.cc; lu...@wunner.de;
andriy.shevche...@linux.intel.com; stuart.w.ha...@gmail.com;
mr.nuke...@gmail.c
Hello. Just built kernel 5.9-rc7, and ran it for about 30 minutes.
Moved the mouse and saw it was jumping (pointer not moving smoothly).
Dmesg showed:
5409.255054] nouveau :02:00.0: DRM: base-0: timeout
[ 5411.380728] nouveau :02:00.0: DRM: base-0: timeout
[ 5413.430281] nouveau
These comet lake systems are not yet released, but have been validated
on pre-release hardware.
This is being submitted separately from released hardware in case of
a regression between pre-release and release hardware so this commit
can be reverted alone.
Signed-off-by: Mario Limonciello
---
d
S0ix for GBE flows are needed for allowing the system to get into deepest
power state, but these require coordination of components outside of
control of Linux kernel. For systems that have confirmed to coordinate
this properly, allow turning on the s0ix flows at load time or runtime.
Fixes: e086
commit e086ba2fccda ("e1000e: disable s0ix entry and exit flows for ME systems")
disabled s0ix flows for systems that have various incarnations of the
i219-LM ethernet controller. This was done because of some regressions
caused by an earlier
commit 632fbd5eb5b0e ("e1000e: fix S0ix flows for cable
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> H6 I2S is very similar to that in H3, except it supports up to 16
> channels.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> ---
> sound/soc/sunxi/sun4i-i2s.c |
1 - 100 of 625 matches
Mail list logo
