On Mon, Sep 28, 2020 at 3:29 AM Clément Péron <peron.c...@gmail.com> wrote:
>
> From: Marcus Cooper <codekip...@gmail.com>
>
> On the newer SoCs such as the H3 and A64 this is set by default
> to transfer a 0 after each sample in each slot. However the A10
> and A20 SoCs that this driver was developed on had a default
> setting where it padded the audio gain with zeros.
>
> This isn't a problem while we have only support for 16bit audio
> but with larger sample resolution rates in the pipeline then SEXT
> bits should be cleared so that they also pad at the LSB. Without
> this the audio gets distorted.
>
> Set sign extend sample for all the sunxi generations even if they
> are not affected. This will keep consistency and avoid relying on
> default.
>
> Signed-off-by: Marcus Cooper <codekip...@gmail.com>
> Signed-off-by: Clément Péron <peron.c...@gmail.com>

Reviewed-by: Chen-Yu Tsai <w...@csie.org>

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