Christophe Leroy writes:
> Some SCC functions like the QMC requires an extended parameter RAM.
> On modern 8xx (ie 866 and 885), SPI area can already be relocated,
> allowing the use of those functions on SCC2. But SCC3 and SCC4
> parameter RAM collide with SMC1 and SMC2 parameter RAMs.
>
> This
On Wed, 24 Apr 2019, Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
>
> Signed-off-by: Mason Yang
> Signed-off-by: Sergei Shtylyov
> ---
> drivers/spi/Kconfig | 6 +
> drivers/spi/Makefile | 1 +
> drivers/spi/spi-renesas-rpc.c | 571
> ++
On Mon, May 13, 2019 at 04:10:35PM +0200, Radim Krčmář wrote:
> 2019-05-12 13:53+0200, Marc Haber:
> > since updating my home desktop machine to kernel 5.1.1, KVM guests
> > started on that machine segfault after booting:
> [...]
> > Any idea short of bisecting?
>
> It has also been spotted by Bor
Borislav Petkov writes:
> On Fri, May 10, 2019 at 04:13:20PM +0200, Borislav Petkov wrote:
>> On Fri, May 10, 2019 at 08:50:52PM +1000, Michael Ellerman wrote:
>> > Yeah that looks better to me. I didn't think about the case where EDAC
>> > core is modular.
>> >
>> > Do you want me to send a new
Hi Henry,
On 4/30/19 11:51, Henry Chen wrote:
> Introduce Mediatek MT8183 specific provider driver using the
> interconnect framework.
>
> Signed-off-by: Henry Chen
> ---
> drivers/interconnect/Kconfig | 1 +
> drivers/interconnect/Makefile | 1 +
> drivers/interconnect/m
On 5/3/19 14:19, Krzysztof Kozlowski wrote:
> On Wed, 13 Mar 2019 at 20:35, Alexandre Bailon wrote:
>>
>> This series implements busfreq, a framework used in MXP's
>> tree to scale the interconnect and dram frequencies.
>> In the vendor tree, device's driver request for a
>> performance level, whi
Hi.
On Mon, May 13, 2019 at 03:37:56PM +0300, Kirill Tkhai wrote:
> > Yes, I get your point. But the intention is to avoid another hacky trick
> > (LD_PRELOAD), thus *something* should *preferably* be done on the
> > kernel level instead.
>
> I don't think so. Does userspace hack introduce some o
On Mon 13-05-19 21:36:59, Yang Shi wrote:
> On Mon, May 13, 2019 at 2:45 PM Michal Hocko wrote:
> >
> > On Mon 13-05-19 14:09:59, Yang Shi wrote:
> > [...]
> > > I think we can just account 512 base pages for nr_scanned for
> > > isolate_lru_pages() to make the counters sane since PGSCAN_KSWAPD/DI
On 5/13/2019 8:50 PM, Rob Herring wrote:
On Tue, May 7, 2019 at 4:20 AM Vidya Sagar wrote:
On 4/26/2019 9:13 PM, Rob Herring wrote:
On Wed, Apr 24, 2019 at 10:49:58AM +0530, Vidya Sagar wrote:
Add support for Tegra194 PCIe controllers. These controllers are based
on Synopsys DesignWare core
Yury Norov writes:
> On Fri, May 10, 2019 at 01:32:22PM +1000, Michael Ellerman wrote:
>> Yury Norov writes:
>> > On Tue, May 07, 2019 at 08:54:31AM -0400, Rafael Aquini wrote:
>> >> On Mon, May 06, 2019 at 11:53:43AM -0400, Joel Savitz wrote:
>> >> > There is currently no easy and architecture-i
This patch add function to get the format
This function can get the subdev format and host format.
Calculate the number of format which intersection of subdev and host.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 151 ++
1 file changed, 151 inser
Add mediatek mipicsi driver for Mediatek SOC MT2712
Change in v3:
- Move register setting to the bottom of this patch series
and merge the patch "[media] mtk-mipicsi: add pm function" to
"[media] mtk-mipicsi: add mediatek mipicsi driver for mt2712"
- Remove the patch
"[media] mtk-mipicsi: ad
This patch register the soc_camera host for mt2712 mipicsi.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 417 ++
1 file changed, 417 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/
This patch enable/disable ana clk when power on/off
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/mtk_mipic
This patch set the output address in HW reg when buffer queue and ISR.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mt
This patch enable/disable cmos setting for mt2712 when
vb2 start/stop streaming.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/p
This patch add function to support SerDes for link number.
Mt2712 can server at most four camera link for each mipicsi port.
Therefore, driver need to know how many camera link in SerDes and
set the mipicsi HW to serve.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch add mediatek mipicsi driver for mt2712,
including probe function to get the value from device tree,
and register to v4l2 the host device.
Signed-off-by: Stu Hsieh
---
drivers/media/platform/mtk-mipicsi/Makefile | 4 +
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 587 +++
Hello Angus,
I'll add the linux list and Mark to CC as this sounds like a regression
which may impact to other regulator drivers too. Mark, please let me
know if you don't feel adding you to discussions like this are
appropriate so I don't do it in the future.
On Mon, 2019-05-13 at 17:21 -0700, A
This patch add the check for non-supported color format
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/mtk_m
Add MIPI-CSI2 dt-binding for Mediatek MT2712 SoC
Signed-off-by: Stu Hsieh
---
.../bindings/media/mediatek-mipicsi-camsv.txt | 53 ++
.../media/mediatek-mipicsi-common.txt | 19 +++
.../bindings/media/mediatek-mipicsi.txt | 54 +++
3 files changed
This patch add debug message for mipicsi driver.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 58 ++-
1 file changed, 56 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipi
This patch add ISR for writing the data to buffer
When mipicsi HW complete to write the data in buffer,
the interrupt woulb be trigger.
So, the ISR need to clear interrupt status for next interrupt.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 110 +++
This patch add debugfs for mipicsi driver.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 65 +++
1 file changed, 65 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
inde
This patch get the w/h/bytepwerline to save in mtk_mipicsi.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 41 +++
1 file changed, 41 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/m
On Mon, 13 May 2019 at 21:35, Radim Krčmář wrote:
>
> 2019-05-13 17:46+0800, Wanpeng Li:
> > From: Wanpeng Li
> >
> > MSR IA32_MSIC_ENABLE bit 18, according to SDM:
> >
> > | When this bit is set to 0, the MONITOR feature flag is not set
> > (CPUID.01H:ECX[bit 3] = 0).
> > | This indicates tha
On Mon, May 13, 2019 at 06:01:39PM +, mario.limoncie...@dell.com wrote:
> When using HMB the SSD will be writing to some memory mapped region.
> Writing to
> that region would use DMA to access host memory, no?
Memory mapped region? It will use the devices DMA engine to write
host memory, whi
Unnecessary blank lines do NOT help readability, so remove them.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index df33672..e5f
On 5/13/19 5:09 PM, Mimi Zohar wrote:
>> Ok, but wouldn't my idea still work? Leave the default compiled-in
>> policy set to not appraise initramfs. The embedded /init sets all the
>> xattrs, changes the policy to appraise tmpfs, and then exec's the real
>> init? Then everything except the embedded
On 5/13/19 7:47 AM, Roberto Sassu wrote:
> On 5/13/2019 11:07 AM, Rob Landley wrote:
Wouldn't the below work even before enforcing signatures on external
initramfs:
1. Create an embedded initramfs with an /init that does the xattr
parsing/setting. This will be verified as part o
On Tue, May 14, 2019 at 09:00:19AM +0530, Vidya Sagar wrote:
> There is nothing broken in Tegra194 root port as such, rather, this is more
> of software configuration choice and we are going with legacy interrupts than
> MSI interrupts (as Tegra194 doesn't support raising PME interrupts through MS
On Tue, May 14, 2019 at 12:09 AM Bjorn Andersson
wrote:
>
> On Fri 10 May 04:29 PDT 2019, Amit Kucheria wrote:
>
> Subject indicates pluralism, but this fixes a specific platform
> (board?). I think you should update that.
Copy paste from the previous cleanup commit :-) Will fix.
> > The idle-st
From: Wanpeng Li
MSR IA32_MSIC_ENABLE bit 18, according to SDM:
| When this bit is set to 0, the MONITOR feature flag is not set
(CPUID.01H:ECX[bit 3] = 0).
| This indicates that MONITOR/MWAIT are not supported.
|
| Software attempts to execute MONITOR/MWAIT will cause #UD when this bit is 0.
Signed-off-by: Kovtunenko Oleksandr
---
fs/cifs/cifsfs.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index a05bf1d..2964438 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -1073,11 +1073,6 @@ ssize_t cifs_file_copychunk_range(unsigned int xi
On Wed, Apr 24, 2019 at 12:57 PM Ley Foon Tan wrote:
>
> Altera MSI IP is a soft IP and is only available after
> FPGA image is programmed.
>
> Make driver modulable to support use case FPGA image is programmed
> after kernel is booted. User proram FPGA image in kernel then only load
> MSI driver
On Wed, Apr 24, 2019 at 12:57 PM Ley Foon Tan wrote:
>
> Altera PCIe Rootport IP is a soft IP and is only available after
> FPGA image is programmed.
>
> Make driver modulable to support use case FPGA image is programmed
> after kernel is booted. User proram FPGA image in kernel then only load
> P
On 5/13/2019 8:45 PM, Rob Herring wrote:
On Tue, May 7, 2019 at 3:25 AM Vidya Sagar wrote:
On 4/26/2019 8:02 PM, Rob Herring wrote:
On Wed, Apr 24, 2019 at 10:49:55AM +0530, Vidya Sagar wrote:
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption.
On 5/13/2019 8:40 PM, Rob Herring wrote:
On Mon, May 13, 2019 at 10:36:17AM +0530, Vidya Sagar wrote:
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iA
> >
> >
> > Hi Dan,
> >
> > While testing device mapper with DAX, I faced a bug with the commit:
> >
> > commit ad428cdb525a97d15c0349fdc80f3d58befb50df
> > Author: Dan Williams
> > Date: Wed Feb 20 21:12:50 2019 -0800
> >
> > When I reverted the condition to old code[1] it worked for me. I
>
Hello, Jan.
syzbot is still reporting livelocks inside __getblk_gfp() [1] (similar to
commit 04906b2f542c2362 ("blockdev: Fix livelocks on loop device")).
[1]
https://syzkaller.appspot.com/bug?id=835a0b9e75b14b55112661cbc61ca8b8f0edf767
A debug printk() patch shown below revealed that since b
On Mon, May 13, 2019 at 6:48 AM Roberto Sassu wrote:
>
> On 5/11/2019 12:37 AM, Prakhar Srivastava wrote:
> > From: Prakhar Srivastava
> >
> > The buffer(cmdline args) added to the ima log cannot be attested
> > without having the actual buffer. Thus to make the measured buffer
> > available to s
This patch adds support for GPIO based CS control through SPI core
function spi_set_cs.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index b1f31bb16659.
[V5] : This patch series version includes
- Updated GPIO based chip select control using GPIO descriptor.
- HW based chip select implementation is same as V3 but V5
has this patch updated to be on top of above changes.
- HW CS timing implementation is same as V3 bu
This patch implements set_cs_timing SPI controller method to allow
SPI client driver to configure device specific SPI CS timings.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 48 --
1 file changed, 46 insertions(+), 2 deletions(-
Tegra SPI controller supports both HW and SW based CS control
for SPI transfers.
This patch adds support for HW based CS control where CS is driven
to active state during the transfer and is driven inactive at the
end of the transfer directly by the HW.
This patch enables the use of HW based CS o
Tegra SPI master controller has programmable trimmers to adjust the
data with respect to the clock.
These trimmers are programmed in TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY
fields of COMMAND2 register.
SPI TX trimmer is to adjust the outgoing data with respect to the
outgoing clock and SPI RX trimm
On Mon, 13 May 2019 15:38:24 -0300
Arnaldo Carvalho de Melo wrote:
> Em Fri, May 10, 2019 at 12:12:49AM +0900, Masami Hiramatsu escreveu:
> > Hi,
> >
> > Here is the v8 series of probe-event to support user-space access.
> > Previous version is here.
> >
> > https://lkml.kernel.org/r/1557322301
On Mon, 2019-05-13 at 17:40 +, Roy Pledge wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 5/13/2019 12:40 PM, Joakim Tjernlund wrote:
> > On Mon, 2019-
Add i.MX8QXP GPIO alias for kernel GPIO driver usage.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index b17c22e..9237
On Mon, May 13, 2019 at 9:56 AM Mimi Zohar wrote:
>
> On Fri, 2019-05-10 at 15:37 -0700, Prakhar Srivastava wrote:
>
> > +/*
> > + * process_buffer_measurement - Measure the buffer passed to ima log.
>
> "passed to ima log" is unnecessary.
>
> > + * (Instead of using the file hash use the buffer h
Hi Masahiro,
On Tue, 14 May 2019 13:16:37 +0900 Masahiro Yamada
wrote:
>
> If you are talking about the rebuild of
> .tmp_versions/*.mod files,
> yes, they are cleaned up every time.
>
> # Create temporary dir for module support files
> # clean it up only when building all modules
> cmd_crmodve
Hi Eduardo,
On Mon, 13 May 2019 20:44:11 -0700 Eduardo Valentin wrote:
>
> Thanks for spotting this. I am re-doing the branch based off v5.1-rc7,
> where the last conflict went in with my current queue.
Its really not worth the rebase. Just fix the build problem and send it
all to Linus.
--
C
On Mon, May 13, 2019 at 2:45 PM Michal Hocko wrote:
>
> On Mon 13-05-19 14:09:59, Yang Shi wrote:
> [...]
> > I think we can just account 512 base pages for nr_scanned for
> > isolate_lru_pages() to make the counters sane since PGSCAN_KSWAPD/DIRECT
> > just use it.
> >
> > And, sc->nr_scanned shou
[V4] : This patch series version includes
- Updated GPIO based chip select control using GPIO descriptor.
- HW based chip select implementation is same as V3 but V4
has this patch updated to be on top of above changes.
- HW CS timing implementation is same as V3 bu
Hi all,
Please do not add any v5.3 material to your linux-next included
trees/branches until after v5.2-rc1 has been released.
Changes since 20190513:
The thermal-soc tree still had its build failure for which I applied a
patch.
Non-merge commits (relative to Linus' tree): 2499
2385
Tegra SPI controller supports both HW and SW based CS control
for SPI transfers.
This patch adds support for HW based CS control where CS is driven
to active state during the transfer and is driven inactive at the
end of the transfer directly by the HW.
This patch enables the use of HW based CS o
This patch implements set_cs_timing SPI controller method to allow
SPI client driver to configure device specific SPI CS timings.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 48 --
1 file changed, 46 insertions(+), 2 deletions(-
This patch adds support for GPIO based CS control through SPI core
function spi_set_cs.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index b1f31bb16659.
Tegra SPI master controller has programmable trimmers to adjust the
data with respect to the clock.
These trimmers are programmed in TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY
fields of COMMAND2 register.
SPI TX trimmer is to adjust the outgoing data with respect to the
outgoing clock and SPI RX trimm
Hi Stephen,
On Tue, May 14, 2019 at 10:04 AM Stephen Rothwell wrote:
>
> Hi Masahiro,
>
> Also, this:
>
> On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
> wrote:
> >
> > > Mind you, I have no itdea why this file was begin rebuilt, the merge
> > > only touched these files:
> > >
> > > fs/ecr
From: Long Li
commit 214bab448476 ("cifs: Call MID callback before destroying transport")
assumes that the MID callback should not take srv_mutex, this may not always
be true. SMB Direct requires the MID callback completed before calling
transport so all pending memory registration can be freed.
From: Long Li
When sending data, use the DMA_TO_DEVICE to map buffers. Also log the number
of requests in a compounding request from upper layer.
Signed-off-by: Long Li
---
fs/cifs/smbdirect.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/fs/cifs/smbdirect.c b/fs/
Stephen,
On Mon, May 13, 2019 at 10:49:28AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the thermal-soc tree got a conflict in:
>
> MAINTAINERS
>
> between commit:
>
> f23afd75fc99 ("RDMA/efa: Add driver to Kconfig/Makefile")
>
> from Linus' tree and commit:
>
On Fri, May 03, 2019 at 10:44:09AM +0100, Quentin Perret wrote:
> The newly introduced Energy Model framework manages power cost tables in
> a generic way. Moreover, it supports a several types of models since the
> tables can come from DT or firmware (through SCMI) for example. On the
> other hand
Add i.MX8MQ GPIO alias for kernel GPIO driver usage.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6d635ba..df33672 100
On 5/13/2019 12:55 PM, Christoph Hellwig wrote:
On Mon, May 13, 2019 at 10:36:13AM +0530, Vidya Sagar wrote:
Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
using these APIs be able to build as loadable modules.
But this is a global setting. If you root port is broken
After commit 415b43bdb008 "tty: serial: uartlite: Move uart register to
probe", calling uart_unregister_driver unconditionally will trigger a
null pointer dereference due to ulite_uart_driver may not registed.
CPU: 1 PID: 3755 Comm: syz-executor.0 Not tainted 5.1.0+ #28
Hardware name: QEMU Sta
On Mon, May 13, 2019 at 1:47 PM Nathan Chancellor
wrote:
>
> On Thu, May 09, 2019 at 04:35:55PM +0900, Masahiro Yamada wrote:
> > If the compiler specified by $(CC) is not present, the Kconfig stage
> > sprinkles 'not found' messages, then succeeds.
> >
> > $ make CROSS_COMPILE=foo defconfig
> >
Hi Greg,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 63863ee8e2f6f6ae47be3dff4af2f2806f5ca2dd
commit: 91b6cb7216cd8bad027bc9ef88e2834786c8eeaf staging: kpc2000: fix up build
problems with readq()
date: 13 da
Hi Geert,
> Subject
>
> Re: [PATCH v12 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3 RPC-IF
MFD bindings
>
> Hi Mason,
>
> Note that if you send multipart/text+html emails, they will be dropped
silently
> by most Linux mailing lists.
> Hence I'm quoting your last email fully, to give o
The sas_port(phy->port) allocated in sas_ex_discover_expander() will not
be deleted when the expander failed to discover. This will cause
resource leak and a further issue of kernel BUG like below:
[159785.843156] port-2:17:29: trying to add phy phy-2:17:29 fails: it's
already part of another por
On (05/14/19 11:07), Sergey Senozhatsky wrote:
> How about this:
>
> if ptr < PAGE_SIZE -> "(null)"
No, this is totally stupid. Forget about it. Sorry.
> if IS_ERR_VALUE(ptr)-> "(fault)"
But Steven's "(fault)" is nice.
-ss
When the event queue is full of phy up and down events and reached the
threshold, we will queue a shutdown-event, and set phy->in_shutdown so
that we will not queue a shutdown-event again. But before the
shutdown-event can be executed, every phy-down event will clear
phy->in_shutdown and a new shut
Hi Miquel,
> > > > > > +
> > > > > > + if (mxic->reliability_func & MACRONIX_READ_RETRY_BIT) {
> > > > > > + chip->read_retries = MACRONIX_READ_RETRY_MODE + 1;
> > > > >
> > > > > Why +1 here, I am missing something?
> > > >
> > > >
> > > > Without + 1, read retry mode is up t
Hi Richard,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 63863ee8e2f6f6ae47be3dff4af2f2806f5ca2dd
commit: 9ca2d732644484488db31123ecd3bf122b551566 ubifs: Limit number of xattrs
per inode
date: 6 days ago
config
On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
>
>
>
> > On 13 May 2019, at 21:17, Andy Lutomirski wrote:
> >
> >> I expect that the KVM address space can eventually be expanded to include
> >> the ioctl syscall entries. By doing so, and also adding the KVM page table
> >> to the process userl
On (05/13/19 14:42), Petr Mladek wrote:
> > The "(null)" is good enough by itself and already an established
> > practice..
>
> (efault) made more sense with the probe_kernel_read() that
> checked wide range of addresses. Well, I still think that
> it makes sense to distinguish a pure NULL. And it
On Mon, May 13, 2019 at 2:26 PM Liran Alon wrote:
>
>
>
> > On 13 May 2019, at 18:15, Peter Zijlstra wrote:
> >
> > On Mon, May 13, 2019 at 04:38:32PM +0200, Alexandre Chartre wrote:
> >> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> >> index 46df4c6..317e105 100644
> >> --- a/arch/x86
Apologies, I had forgotten to
got bisect - - hard origin/master
I am still seeing the corruption leading to the invalid block error on 5.1.0+
kernels on both my machines.
Arthur.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
On Tue, 14 May 2019 at 03:54, Sean Christopherson
wrote:
>
> On Thu, May 09, 2019 at 07:29:21PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > Advance lapic timer tries to hidden the hypervisor overhead between host
> > timer fires and the guest awares the timer is fired. However, it just
On Tue, May 14, 2019 at 6:29 AM Stephen Boyd wrote:
>
> Quoting Nicolas Boichat (2019-04-28 20:55:15)
> > During suspend/resume, mtk_eint_mask may be called while
> > wake_mask is active. For example, this happens if a wake-source
> > with an active interrupt handler wakes the system:
> > irq/pm.c
>>>-Original Message-
>>>From: Pavel Shilovsky
>>>Sent: Thursday, May 9, 2019 11:01 AM
>>>To: Long Li
>>>Cc: Steve French ; linux-cifs >>c...@vger.kernel.org>; samba-technical ;
>>>Kernel Mailing List
>>>Subject: Re: [Patch (resend) 5/5] cifs: Call MID callback before destroying
>>>trans
Thanks for review.
On Mon, 13 May 2019 at 19:45, Peter Zijlstra wrote:
>
> On Mon, May 13, 2019 at 05:11:47PM +0800, Yuyang Du wrote:
> > + * Note that we have an assumption that a lock class cannot ever be both
> > + * read and recursive-read.
>
> We have such locks in the kernel... see:
>
> k
Stephen,
I wasn't aware of the other asix module when submitting the phy driver.
The phy module gets autoloaded based on the PHY ID, so there's no reason
why it couldn't be renamed.
May I suggest ax88796b for the new module name?
Cheers,
Michael
On 14/05/19 12:56 PM, Stephen Rothwell
On 5/13/19 5:40 PM, Paul Walmsley wrote:
On Mon, 13 May 2019, Atish Patra wrote:
On 5/13/19 5:09 PM, Paul Walmsley wrote:
What are the semantics of those reserved fields?
+struct riscv_image_header {
+ u32 code0;
+ u32 code1;
+ u64 text_offset;
+ u64 image_size;
+
Hi Masahiro,
Also, this:
On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
wrote:
>
> > Mind you, I have no itdea why this file was begin rebuilt, the merge
> > only touched these files:
> >
> > fs/ecryptfs/crypto.c
> > fs/ecryptfs/keystore.c
Its a bit annoying that the module was even being
On Tue, 14 May 2019 at 03:39, Sean Christopherson
wrote:
>
> On Thu, May 09, 2019 at 07:29:19PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > Extract adaptive tune timer advancement logic to a single function.
>
> Why?
Just because the function wait_lapic_expire() is too complex now.
Re
Hi all,
[excessive quoting for new CC's]
On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
wrote:
>
> On Tue, May 14, 2019 at 9:16 AM Stephen Rothwell
> wrote:
> >
> > I don't know why this suddenly appeared after mergeing the ecryptfs tree
> > since nothin has changed in that tree for some
On Tue, May 14, 2019 at 9:01 AM Joe Perches wrote:
>
> On Tue, 2019-05-14 at 08:46 +0900, Masahiro Yamada wrote:
> > So, I think these two checks can be done for
> > all file types.
> []
> > checkpatch.pl misses to report most of them.
> > (the majority of the warning source is *.json)
>
> Perhaps
Convert the Arm PL061 GPIO controller binding to json-schema format.
As I'm the author for all but the gpio-ranges line, make the schema dual
GPL/BSD license.
Cc: Linus Walleij
Cc: Bartosz Golaszewski
Cc: linux-g...@vger.kernel.org
Signed-off-by: Rob Herring
---
This warns on a few platforms m
On Mon, May 13, 2019 at 11:55:18AM -0600, Raul E Rangel wrote:
I think we should cherry-pick 41e3efd07d5a02c80f503e29d755aa1bbb4245de
https://lore.kernel.org/patchwork/patch/856512/ into 4.14. It fixes a
potential resource leak when shutting down the request queue.
Once this patch is applied, th
Hi Stephen,
On Tue, May 14, 2019 at 9:16 AM Stephen Rothwell wrote:
>
> Hi all,
>
> I don't know why this suddenly appeared after mergeing the ecryptfs tree
> since nothin has changed in that tree for some time (and nothing in that
> tree seems relevant).
>
> After merging the ecryptfs tree, toda
On Mon, 13 May 2019, Atish Patra wrote:
> On 5/13/19 5:09 PM, Paul Walmsley wrote:
>
> > What are the semantics of those reserved fields?
>
> +struct riscv_image_header {
> + u32 code0;
> + u32 code1;
> + u64 text_offset;
> + u64 image_size;
> + u64 res1;
> + u64 res2;
>
This patch fixes an issue introduced with:
583feb08e7f7 ("perf/x86/intel: Fix handling of wakeup_events for multi-entry
PEBS")
The original patch prevented using multi-entry PEBS when wakeup_events != 0.
However given that wakeup_events is part of a union with wakeup_watermark, it
means that
On 5/13/19 5:09 PM, Paul Walmsley wrote:
On Mon, 13 May 2019, Atish Patra wrote:
On 5/13/19 3:31 PM, Paul Walmsley wrote:
On Wed, 1 May 2019, Atish Patra wrote:
Currently, last stage boot loaders such as U-Boot can accept only
uImage which is an unnecessary additional step in automating boot
>> When a HARDWARE_ERROR is triggered for asc=0x3e, the actual code is
>> only considering the case where ascq=0x1.
>>
>> Following the http://www.t10.org/lists/asc-num.htm#ASC_3E
>> specification, other values may occur like a timeout (ascq=0x2).
>>
>> This patch is about printing an error messa
We have been consistently triggering the warning
WARN_ON_ONCE(cpuctx->cgrp) in perf_cgroup_switch() for a rather
long time, although we still have no clue on how to reproduce it.
Looking into the code, it seems the only possibility here is that
the process calling perf_event_open() with a cgroup t
Hi all,
I don't know why this suddenly appeared after mergeing the ecryptfs tree
since nothin has changed in that tree for some time (and nothing in that
tree seems relevant).
After merging the ecryptfs tree, today's linux-next build (x86_64
allmodconfig) failed like this:
scripts/Makefile.modpo
On Mon, 13 May 2019, Atish Patra wrote:
> On 5/13/19 3:31 PM, Paul Walmsley wrote:
> > On Wed, 1 May 2019, Atish Patra wrote:
> >
> > > Currently, last stage boot loaders such as U-Boot can accept only
> > > uImage which is an unnecessary additional step in automating boot flows.
> > >
> > > Add
On Tue, 2019-05-14 at 08:46 +0900, Masahiro Yamada wrote:
> So, I think these two checks can be done for
> all file types.
[]
> checkpatch.pl misses to report most of them.
> (the majority of the warning source is *.json)
Perhaps the json files should be ignored as more than
half of the .json file
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