On 06/18/2018 11:05 PM, Dan Williams wrote:
> Now that all producers of dev_pagemap instances in the kernel are
> properly converted to EXPORT_SYMBOL_GPL, fix up implicit consumers that
> interact with dev_pagemap owners via put_page(). To reiterate,
> dev_pagemap producers are EXPORT_SYMBOL_GPL be
Hi Boris, Chris,
On Tue, 19 Jun 2018 07:40:56 +0200, Boris Brezillon
wrote:
> On Tue, 19 Jun 2018 17:31:24 +1200
> Chris Packham wrote:
>
> > Add ONFI_FEATURE_ON_DIE_ECC to the set/get features list for Micron
> > NAND flash.
> >
>
> Fixes: 789157e41a06 ("mtd: rawnand: allow vendors to decl
* Tony Lindgren [180613 04:44]:
> * Janusz Krzysztofik [180613 01:18]:
> > On Wednesday, June 13, 2018 12:23:56 AM CEST Dmitry Torokhov wrote:
> > > Hi Janusz,
> > >
> > > On Sat, Jun 09, 2018 at 04:02:15PM +0200, Janusz Krzysztofik wrote:
> > > > GPIO lookup table for ams-delta-serio device was
On 6/18/2018 6:59 PM, Arnd Bergmann wrote:
On Mon, Jun 18, 2018 at 11:42 AM, Wu, Songjun
wrote:
On 6/14/2018 6:03 PM, Arnd Bergmann wrote:
On Tue, Jun 12, 2018 at 7:40 AM, Songjun Wu
wrote:
Previous implementation uses a hard-coded register value to check if
the current serial entity is t
Hi, Paul,
First of all, could you please check why linux-mips reject e-mails from
lemote.com? Of course I can send e-mails by gmail, but my gmail can't receive
e-mails from linux-mips since March, 2018.
I have already read Documentation/memory-barriers.txt, but I don't think we
should define a
This is a fix against the issue that crash dump kernel may hang up
during booting, which can happen on any ACPI-based system with "ACPI
Reclaim Memory."
(kernel messages after panic kicked off kdump)
(snip...)
Bye!
(snip...)
ACPI: Core revision 20170728
Hi Tony,
> Am 19.06.2018 um 08:11 schrieb Tony Lindgren :
>
> * H. Nikolaus Schaller [180619 04:54]:
I had seen the call sequence
w/o any lock inside.
>
> So the sequence above has mutex added around adding the pin
> controller specific functions and groups by the pa
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
kernel/cgroup/cgroup.c
between commit:
58e4e43911f8 ("kernfs, sysfs, cgroup, intel_rdt: Support fs_context")
from the vfs tree and commit:
dbe8cec5a8a3 ("mm, oom: add cgroup v2 mount option for cgroup-aware OOM
On Mon, Jun 18, 2018 at 11:22:14PM -0700, Joel Fernandes wrote:
> From: "Joel Fernandes (Google)"
>
> rcutorture boost tests fail even with CONFIG_RCU_BOOST set because
> rcutorture's threads are equal priority to the default RCU kthreads (RT
> class with priority of 1).
Sorry for the weird subj
Hi,
I've encountered a problem on an Intel Atom E3825. When performing lots of
reboots (10, 50, 100, ...) the eMMC controller stops working. The reset commands
won't work anymore and you get error messages such as:
|mmc1: Reset 0x1 never completed.
|sdhci: === REGISTER DUMP (mmc1)
Sometimes the eMMC controller doesn't respond anymore on Intel Baytrail
SoCs. The resulting error looks like:
|mmc1: Reset 0x1 never completed.
|sdhci: === REGISTER DUMP (mmc1)===
|sdhci: Sys addr: 0x | Version: 0x
|sdhci: Blk size: 0x | Blk cnt: 0xfff
On Mon, 18 Jun 2018, Andy Lutomirski wrote:
> On Thu, Jun 14, 2018 at 10:10 PM Siarhei Liakh
> wrote:
> >
> > fpu__drop() has an explicit fwait which under some conditions can trigger
> > a fixable FPU exception while in kernel. Thus, we should attempt to fixup
> > the exception first, and only c
From: "Joel Fernandes (Google)"
rcutorture boost tests fail even with CONFIG_RCU_BOOST set because
rcutorture's threads are equal priority to the default RCU kthreads (RT
class with priority of 1).
This patch checks if RCU torture is built into the kernel and if so,
assigns a higher priority to
From: "Joel Fernandes (Google)"
rcutorture currently increments both successes and error counters for
the rcu_barrier test incase of errors. It should only increment the
error counter incase of errors so make it do so.
Test: Introduced rcu_barrier errors by returning from the barrier
callback wi
On 19-06-18, 07:58, Daniel Lezcano wrote:
> +++ b/drivers/powercap/idle_injection.c
> @@ -0,0 +1,375 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2018 Linaro Limited
> + *
> + * Author: Daniel Lezcano
> + *
> + * The idle injection framework proposes a way to force a cpu to ente
The devm_memremap_pages() facility is tightly integrated with the
kernel's memory hotplug functionality. It injects an altmap argument
deep into the architecture specific vmemmap implementation to allow
allocating from specific reserved pages, and it has Linux specific
assumptions about page struct
On Mon, Jun 18, 2018 at 10:11:13AM +0200, Christoph Hellwig wrote:
> On Sun, Jun 17, 2018 at 01:10:04PM -0700, Dan Williams wrote:
> > I believe kernel behavior regression is a primary concern as now
> > fallocate() and truncate() can randomly fail where they didn't before.
>
> Fail or block foreve
In preparation for consolidating all ZONE_DEVICE enabling via
devm_memremap_pages(), teach it how to handle the constraints of
MEMORY_DEVICE_PRIVATE ranges.
Cc: Christoph Hellwig
Cc: "Jérôme Glisse"
Reported-by: Logan Gunthorpe
Reviewed-by: Logan Gunthorpe
Signed-off-by: Dan Williams
---
ker
The last step before devm_memremap_pages() returns success is to
allocate a release action, devm_memremap_pages_release(), to tear the
entire setup down. However, the result from devm_add_action() is not
checked.
Checking the error from devm_add_action() is not enough. The api
currently relies on
devm semantics arrange for resources to be torn down when
device-driver-probe fails or when device-driver-release completes.
Similar to devm_memremap_pages() there is no need to support an explicit
remove operation when the users properly adhere to devm semantics.
Note that devm_kzalloc() automati
Commit e8d513483300 "memremap: change devm_memremap_pages interface to
use struct dev_pagemap" refactored devm_memremap_pages() to allow a
dev_pagemap instance to be supplied. Passing in a dev_pagemap interface
simplifies the design of pgmap type drivers in that they can rely on
container_of() to l
Now that all producers of dev_pagemap instances in the kernel are
properly converted to EXPORT_SYMBOL_GPL, fix up implicit consumers that
interact with dev_pagemap owners via put_page(). To reiterate,
dev_pagemap producers are EXPORT_SYMBOL_GPL because they adopt and
modify core memory management i
The routines hmm_devmem_add(), and hmm_devmem_add_resource() are
now wrappers around the functionality provided by devm_memremap_pages() to
inject a dev_pagemap instance and hook page-idle events. The
devm_memremap_pages() interface is base infrastructure for HMM which has
more and deeper ties into
Given the fact that devm_memremap_pages() requires a percpu_ref that is
torn down by devm_memremap_pages_release() the current support for
mapping RAM is broken.
This has been broken since forever and there is no use case to map RAM
in this way, so just kill the support and make it an explicit err
Changes since v2 [1]:
* Rebased on v4.18-rc1
* Collect Logan's reviewed-by for "mm, devm_memremap_pages: Add
MEMORY_DEVICE_PRIVATE support"
* Convert __put_devmap_managed_page and devmap_managed_key to
EXPORT_SYMBOL otherwise put_page() becomes limited to GPL-only
modules.
* Clarify some of t
Hi,
there seems a regression regarding the probe of ACPI PnP devices.
The detailed logs are found in openSUSE bugzilla:
https://bugzilla.opensuse.org/show_bug.cgi?id=1098074
In short, since 4.17, the laptop keyboard is lost on ASUS K501UW.
Comparing the kernel messages and other logs indicates
* H. Nikolaus Schaller [180619 04:54]:
> >> I had seen the call sequence
> >>
> >> create_pinctrl()-> pinctrl_dt_to_map() -> pcs_dt_node_to_map() ->
> >> pinctrl_generic_add_group()
> >>
> >> w/o any lock inside.
So the sequence above has mutex added around adding the pin
controller specific f
On Tue, 19 Jun 2018 17:31:25 +1200
Chris Packham wrote:
> Micron MT29F1G08ABAFAWP-ITE:F supports an on-die ECC with 8 bits
> per 512 bytes. Add support for this combination.
>
> Signed-off-by: Chris Packham
> ---
> This seems deceptively easy so I've probably missed something. I have
> tested w
In v4.18-rc1, /proc/$pid/cmdline is missing final null byte which used
to be there in v4.17 and older kernels:
4.17.1:
tweed:~ # cat /proc/self/cmdline | od -t c
000 c a t \0 / p r o c / s e l f / c
020 m d l i n e \0
027
4.18-rc1:
lion:~ #
On 19/06/18 07:28, Keerthy wrote:
The default restore context function enables or disables
the clock based on the enable_count. This is done in cases
where the clock context is lost and based on the enable_count
the clock either needs to be enabled/disabled. This particularly
helps restore the st
Initially, the cpu_cooling device for ARM was changed by adding a new
policy inserting idle cycles. The intel_powerclamp driver does a
similar action.
Instead of implementing idle injections privately in the cpu_cooling
device, move the idle injection code in a dedicated framework and give
the opp
On Tue, 19 Jun 2018 17:31:22 +1200
Chris Packham wrote:
> Some Micron NAND chips (MT29F1G08ABAFAWP-ITE:F) report 00 00 for the
> revision number field of the ONFI parameter page. Rather than rejecting
> these outright assume ONFI version 1.0 if the revision number is 00 00.
>
> Signed-off-by: Ch
On Tue, 19 Jun 2018 17:31:21 +1200
Chris Packham wrote:
> This is called after the ONFI parameter page checksum is verified
> and allows us to override the contents of the parameter page.
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Chris Packham
Reviewed-by: Boris Brezillon
> ---
> C
On Tue, Jun 19, 2018 at 09:39:02AM +0800, Jin, Yao wrote:
>
>
> On 6/18/2018 6:45 PM, Peter Zijlstra wrote:
> > On Mon, Jun 18, 2018 at 02:55:32PM +0800, Jin, Yao wrote:
> > > Thanks for providing the patch. I understand this approach.
> > >
> > > In my opinion, the skid window is from counter o
On 06/19/2018 01:38 AM, Karim Eshapa wrote:
> Backward cleanups for all resources allocated in probing
> in case of failure at any regestering or allocation step.
Hi,
Thanks for the patch.
Resources that are allocated with devm_ are freed automatically in case of
an error, so this patch should n
On Tue, 19 Jun 2018 17:31:20 +1200
Chris Packham wrote:
> From the controllers point of view this is the same as no or
> software only ECC.
>
> Signed-off-by: Chris Packham
Reviewed-by: Boris Brezillon
> ---
> Changes in v2:
> - New
>
> drivers/mtd/nand/raw/marvell_nand.c | 1 +
> 1 file c
On 18 June 2018 at 13:41, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.51 release.
> There are 189 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Response
On Mon, 18 Jun 2018 22:41:03 +0200
Martin Kaiser wrote:
> The v21 version of the NAND flash controller contains a Spare Area Size
> Register (SPAS) at offset 0x10. Its setting defaults to the maximum
> spare area size of 218 bytes. The size that is set in this register is
> used by the controller
On 18-06-18, 13:28, Daniel Lezcano wrote:
> for this specific case, we can use the park() callback to set should_run
> to false, no ?
Yep, that can be one option. Or just iterate through all the CPUs in the mask.
--
viresh
On 6/19/18 12:36 PM, Cong Wang wrote:
> On Mon, Jun 18, 2018 at 2:16 AM, Xunlei Pang wrote:
>> I noticed the group frequently got throttled even it consumed
>> low cpu usage, this caused some jitters on the response time
>> to some of our business containers enabling cpu quota.
>>
>> It's very eas
Volodymyr Babchuk writes:
> From: Volodymyr Babchuk
>
> On virtualized systems it is possible that OP-TEE will provide
> only dynamic shared memory support. So it is fine to boot
> without static SHM enabled if dymanic one is supported.
>
> Signed-off-by: Volodymyr Babchuk
> ---
> drivers/te
On Tue, 19 Jun 2018 17:31:24 +1200
Chris Packham wrote:
> Add ONFI_FEATURE_ON_DIE_ECC to the set/get features list for Micron
> NAND flash.
>
Fixes: 789157e41a06 ("mtd: rawnand: allow vendors to declare (un)supported
features")
Cc:
No need to send a new version, I'll add that when queuing the
From: Sayali Lokhande
Add support to use the new compatible string "qcom,sdhci-msm-v5".
Based on the msm variant, pick the relevant variant data and
use it for register read/write to msm specific registers.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
Reviewed-by: Evan Green
From: Sayali Lokhande
For SDCC version 5.0.0 and higher, new compatible string
"qcom,sdhci-msm-v5" is added.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 7 ++-
1 file changed, 6 insertions(+
In addition to offsets of certain registers changing, the registers in
core_mem have been shifted to HC mem as well. To access these
registers, define msm version specific functions. These functions can
be loaded into the function pointers at the time of probe based on
the msm version detected.
Al
From: Sayali Lokhande
For SDCC version 5.0.0, MCI registers are removed from SDCC
interface and some registers are moved to HC.
Define a new data structure where we can statically define
the address offsets for the registers in different SDCC versions.
Signed-off-by: Sayali Lokhande
Signed-off-
With SDCC5, the MCI register space got removed and the offset/order of
several registers have changed. Based on SDCC version used and the register,
we need to pick the base address and offset.
Depends on patch series: "[PATCH V5 0/2] mmc: sdhci-msm: Configuring IO_PAD
support for sdhci-msm"
Chan
This is called after the ONFI parameter page checksum is verified
and allows us to override the contents of the parameter page.
Suggested-by: Boris Brezillon
Signed-off-by: Chris Packham
---
Changes in v2:
- New
drivers/mtd/nand/raw/nand_base.c | 4
include/linux/mtd/rawnand.h | 1 +
>From the controllers point of view this is the same as no or
software only ECC.
Signed-off-by: Chris Packham
---
Changes in v2:
- New
drivers/mtd/nand/raw/marvell_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/raw/marvell_nand.c
b/drivers/mtd/nand/raw/marvell_nand
Some Micron NAND chips (MT29F1G08ABAFAWP-ITE:F) report 00 00 for the
revision number field of the ONFI parameter page. Rather than rejecting
these outright assume ONFI version 1.0 if the revision number is 00 00.
Signed-off-by: Chris Packham
---
This is now qualified on vendor == MICRON. I haven'
Hi,
I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
to one of our boards which uses the Marvell NFCv2 controller.
This particular chip is a bit odd in that the datasheet states support
for ONFI 1.0 but the revision number field is 00 00. It also is marked
ABAFA but report
Micron MT29F1G08ABAFAWP-ITE:F supports an on-die ECC with 8 bits
per 512 bytes. Add support for this combination.
Signed-off-by: Chris Packham
---
This seems deceptively easy so I've probably missed something. I have
tested with running some of the ubifs stress tests from mtd-utils and
things see
The MT29F1G08ABAFAWP-ITE:F chip has 2048 byte pages and requires a
minimum ECC strength of 8-bits. Allow for this combination of
requirements using the marvell_nand controller.
Signed-off-by: Chris Packham
---
I've tried to follow the recommended AN-379 from Marvell. They do seem
to have informat
Add ONFI_FEATURE_ON_DIE_ECC to the set/get features list for Micron
NAND flash.
Signed-off-by: Chris Packham
---
Changes in v2:
- New
drivers/mtd/nand/raw/nand_micron.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_micron.c
b/drivers/mtd/nand/raw/nand_micron.c
On Tue, Jun 19, 2018 at 6:42 AM, Steven Rostedt wrote:
> On Mon, 18 Jun 2018 13:58:09 +0900
> Byungchul Park wrote:
>
>> Hello Steven,
>>
>> I've changed the code a little bit to avoid a compile warning caused by
>> 'const' args of find_cpu(). Can I keep your Reviewed-by?
>>
>> BEFORE:
>> static
On Mon 18 Jun 06:37 PDT 2018, Raju P L S S S N wrote:
> diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
> index 39d3a05..cb6300f 100644
> --- a/drivers/soc/qcom/Makefile
> +++ b/drivers/soc/qcom/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> +CFLAGS_rpmh-rsc.o
A lot of memory can be consumed by the events generated for the huge or
unlimited queues if there is either no or slow listener. This can cause
system level memory pressure or OOMs. So, it's better to account the
fsnotify kmem caches to the memcg of the listener.
There are seven fsnotify kmem ca
The buffer_head can consume a significant amount of system memory and
is directly related to the amount of page cache. In our production
environment we have observed that a lot of machines are spending a
significant amount of memory as buffer_head and can not be left as
system memory overhead.
Cha
Introduce the memcg variant for kmalloc[_node] and
kmem_cache_alloc[_node]. For kmem_cache_alloc, the kernel switches the
root kmem cache with the memcg specific kmem cache for __GFP_ACCOUNT
allocations to charge those allocations to the memcg. However, the memcg
to charge is extracted from the cur
This patchset introduces memcg variant memory allocation functions. The
caller can explicitly pass the memcg to charge for kmem allocations.
Currently the kernel, for __GFP_ACCOUNT memory allocation requests,
extract the memcg of the current task to charge for the kmem allocation.
This patch serie
Thanks Bart,
applied to the configfs tree for 4.19.
On Mon, Jun 18, 2018 at 9:08 PM Jason A. Donenfeld wrote:
>
> On Tue, Jun 19, 2018 at 5:59 AM Shakeel Butt wrote:
> > Hi Jason, yes please do send me the test suite with the kernel config.
>
> $ git clone https://git.zx2c4.com/WireGuard
> $ cd WireGuard/src
> $ [[ $(gcc -v 2>&1) =~ gcc\ version\
Modern assemblers may take the ISA into account when resolving local
symbols. This can result in bad address calculations when using badr
in the wrong location since the offset + 1 may be added twice, resulting
in an even address target for THUMB instructions. This in turn results
in an exception a
Export pnv_idle_states and nr_pnv_idle_states so that its accessible to
cpuidle driver. Use properties from pnv_idle_states structure for powernv
cpuidle_init.
Signed-off-by: Akshay Adiga
---
arch/powerpc/include/asm/cpuidle.h | 2 ++
drivers/cpuidle/cpuidle-powernv.c | 49
On Sun, Jun 17, 2018 at 11:31:41AM +0300, Avi Kivity wrote:
> This reverts commit 4d572d9f46507be8cfe326aa5bc3698babcbdfa7. It is
> superceded by the more general
> 2739b807b0885a09996659be82f813af219c7360 ("aio: only return events
> requested in poll_mask() for IOCB_CMD_POLL"). Unfortunately, hch
Device-tree parsing happens in twice, once while deciding idle state to
be used for hotplug and once during cpuidle init. Hence, parsing the
device tree and caching it will reduce code duplication. Parsing code
has been moved to pnv_parse_cpuidle_dt() from pnv_probe_idle_states().
Setting up thing
On 18-06-18, 16:46, Rohit kumar wrote:
> +struct sdm845_snd_data {
> + struct snd_soc_card *card;
> + struct regulator *vdd_supply;
> + struct snd_soc_dai_link dai_link[];
> +};
> +
> +static struct mutex pri_mi2s_res_lock;
> +static struct mutex quat_tdm_res_lock;
any reason why the
On Mon, May 21, 2018 at 03:25:04PM +0100, Quentin Perret wrote:
> + if (cpumask_test_cpu(prev_cpu, &p->cpus_allowed))
> + prev_energy = best_energy = compute_energy(p, prev_cpu);
> + else
> + prev_energy = best_energy = ULONG_MAX;
> +
> + for_each_freq_domain(
On Mon, Jun 18, 2018 at 09:47:48PM -0700, Christoph Hellwig wrote:
> On Tue, Jun 19, 2018 at 02:05:23PM +1000, NeilBrown wrote:
> > From: NeilBrown
> > Date: Tue, 19 Jun 2018 13:59:16 +1000
> > Subject: [PATCH] kbuild/xfs: example modobj-m conversion
> >
> > This is a demonstration patch to show
So the TIP tree was named for “Thomas, Ingo, Peter”. Need to add an “A” for
Andy. Maybe it should be the PITA tree :-)
-Tony
> On Jun 18, 2018, at 14:41, Andy Lutomirski wrote:
>
> And update my email address.
>
> Cc: Ingo Molnar
> Cc: Thomas Gleixner
> Cc: "H. Peter Anvin"
> Cc: Linus Tor
On Mon, Jun 4, 2018 at 10:47 PM, Souptick Joarder wrote:
> Use new return type vm_fault_t for fault handler. For
> now, this is just documenting that the function returns
> a VM_FAULT value rather than an errno. Once all instances
> are converted, vm_fault_t will become a distinct type.
>
> Ref->
On Tue, Jun 19, 2018 at 6:08 AM, Jason A. Donenfeld wrote:
> On Tue, Jun 19, 2018 at 5:59 AM Shakeel Butt wrote:
>> Hi Jason, yes please do send me the test suite with the kernel config.
>
> $ git clone https://git.zx2c4.com/WireGuard
> $ cd WireGuard/src
> $ [[ $(gcc -v 2>&1) =~ gcc\ version\ 8\
Hi Chris,
On Tue, 19 Jun 2018 01:44:24 +
Chris Packham wrote:
> On 19/06/18 12:35, Chris Packham wrote:
> > On 19/06/18 01:15, Miquel Raynal wrote:
> >> Hi Chris,
> >>
> >> On Mon, 18 Jun 2018 16:52:53 +1200, Chris Packham
> >> wrote:
> >>
> >>> Hi,
> >>>
> >>> I'm looking at adding sup
The early console code for mps2-uart assumes that the serial hardware is
enabled for transmit when the system boots. However, this is not the case
after reset. This results in a hang in mps2_early_putchar() if the serial
transmitter is not enabled by a boot loader or ROM monitor.
Signed-off-by: Gu
Hi all,
Today's linux-next merge of the userns tree got conflicts in:
fs/proc/inode.c
fs/proc/root.c
between commits:
0223e0999be2 ("procfs: Move proc_fill_super() to fs/proc/root.c")
83cd45075c36 ("proc: Add fs_context support to procfs")
from the vfs tree and commit:
cc8cda3af2ba
Hi Tony,
> Am 19.06.2018 um 06:34 schrieb Tony Lindgren :
>
> * H. Nikolaus Schaller [180618 18:33]:
So code just needs group cleanup on failed probing and fixing the mutex
around pinctrl_generic_add_group().
I think we need the mutex because a race still can happen when
>
On Mon, 2018-06-18 at 21:50 -0400, Nicolas Pitre wrote:
> On Tue, 19 Jun 2018, Andy Shevchenko wrote:
[]
> > > + /*
> > > +* Make sure our unicode screen translates into the same glyphs
> > > +* as the actual screen. This is brutal indeed.
> > > +*/
> > > + p = (
On 2018/6/19 3:56, Borislav Petkov wrote:
On Mon, Jun 04, 2018 at 08:16:51AM +, Zhenzhong Duan wrote:
Intel spec says: 'The processor flags in the 48-byte header and the
processor flags field associated with the extended processor signature
structures may have multiple bits set.'
Make sure
On Tue, Jun 19, 2018 at 02:05:23PM +1000, NeilBrown wrote:
> From: NeilBrown
> Date: Tue, 19 Jun 2018 13:59:16 +1000
> Subject: [PATCH] kbuild/xfs: example modobj-m conversion
>
> This is a demonstration patch to show how
> xfs can be changed to make use of the proposed modobj-m=
> functionality,
On Mon, Jun 18, 2018 at 2:16 AM, Xunlei Pang wrote:
> I noticed the group frequently got throttled even it consumed
> low cpu usage, this caused some jitters on the response time
> to some of our business containers enabling cpu quota.
>
> It's very easy to reproduce:
> mkdir /sys/fs/cgroup/cpu/te
On 18-06-18, 13:33, Srinivas Kandagatla wrote:
> This patch fixes below kerneldoc warnings
>
> qcom_smd.c:141: warning: Function parameter or member 'dev' not described in
> 'qcom_smd_edge'
> qcom_smd.c:141: warning: Function parameter or member 'name' not described in
> 'qcom_smd_edge'
> qcom_s
* H. Nikolaus Schaller [180618 18:33]:
> >> So code just needs group cleanup on failed probing and fixing the mutex
> >> around pinctrl_generic_add_group().
> >>
> >> I think we need the mutex because a race still can happen when
> >> create_pinctrl() is calling pcs_dt_node_to_map()
> >> and pi
On 14-06-18, 09:37, Sinan Kaya wrote:
> I'm no longer with QCOM. I am still interested in maintaining or reviewing
> PCI/DMA engine patches. Update email-id to an active one.
Applied, thanks
--
~Vinod
From: Russ Dill
Deep enough power saving mode can result into losing context of the clock
registers also, and they need to be restored once coming back from the power
saving mode. Hence add functions to save/restore clock context.
Signed-off-by: Keerthy
Signed-off-by: Russ Dill
---
drivers/cl
From: Russ Dill
SoCs like AM43XX lose clock registers context during RTC-only
suspend. Hence add functions to save/restore the clock registers
context.
Signed-off-by: Keerthy
Signed-off-by: Russ Dill
---
drivers/clk/ti/clock.h| 2 +
drivers/clk/ti/divider.c | 36 ++
driver
On 05-06-18, 18:59, Janusz Krzysztofik wrote:
> Commit 0198d7bb8a0c ("ASoC: omap-mcbsp: Convert to use the sdma-pcm
> instead of omap-pcm") resulted in broken audio playback on OMAP1510
> (discovered on Amstrad Delta).
>
> When running on OMAP1510, omap-pcm used to obtain DMA offset from
> snd_dma
The default restore context function enables or disables
the clock based on the enable_count. This is done in cases
where the clock context is lost and based on the enable_count
the clock either needs to be enabled/disabled. This particularly
helps restore the state of gate clocks.
Signed-off-by:
Deep enough power saving mode can result into losing context of the clock
registers also, and they need to be restored once coming back from the power
saving mode. Hence add functions to save/restore clock context.
Tested for DS0 on am437x-gp-evm
Based on top of linux-next
Keerthy (2):
clk: cl
Save/restore clk context based on enable_off_mode setting.
The context needs to be saved at the very end of suspend path
and restored at the beginning of resume path.
Signed-off-by: Keerthy
---
arch/arm/mach-omap2/pm33xx-core.c| 15 +++
drivers/soc/ti/pm33xx.c | 13 +
Hi Enric,
On 2018년 06월 18일 18:10, Enric Balletbo Serra wrote:
> Hi Chanwoo,
>
> Missatge de Chanwoo Choi del dia dg., 17 de juny
> 2018 a les 5:23:
>>
>> Hi Enric,
>>
>> 2018-06-16 0:12 GMT+09:00 Enric Balletbo i Serra
>> :
>>> The opp table is not removed when the driver is unloaded neither wh
Hi Tony,
thanks for doing this!
I cannot find the original bug report in linux-gpio, so I'll comment
on this single patch only.
On Fri, Jun 15, 2018 at 04:11:40AM -0700, Tony Lindgren wrote:
> We must use a mutex around the generic_add functions and save the
> function and group selector in ca
This patch fixes wrong name of headphone widget for receiving events
of insert/remove headphone plug from simple-card or audio-graph-card.
If we use wrong widget name then we get warning messages such as
"asoc-audio-graph-card sound: ASoC: DAPM unknown pin Headphones"
when the plug is inserted or
This patch adds GPIO for headphone detection on LD20 global board.
Signed-off-by: Katsuhiro Suzuki
---
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
b/arch/arm64/boot/dts/socionex
This patch adds GPIO for headphone detection on LD11 global board.
Signed-off-by: Katsuhiro Suzuki
---
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
b/arch/arm64/boot/dts/socionex
On Tue, Jun 19, 2018 at 5:59 AM Shakeel Butt wrote:
> Hi Jason, yes please do send me the test suite with the kernel config.
$ git clone https://git.zx2c4.com/WireGuard
$ cd WireGuard/src
$ [[ $(gcc -v 2>&1) =~ gcc\ version\ 8\.1\.0 ]] || echo crash needs 8.1
$ export DEBUG_KERNEL=yes
$ export KE
On Mon, Jun 18 2018, Christoph Hellwig wrote:
> On Mon, Jun 18, 2018 at 02:55:20PM +1000, NeilBrown wrote:
>> This set of patches makes it possible to build a module from
>> code in multiple directories without needing to list files from one
>> directory in the Makefile of another directory.
>>
>
On Mon, Jun 18, 2018 at 7:51 PM Jason A. Donenfeld wrote:
>
> Hello Shakeel,
>
> It may be the case that f9e13c0a5a33d1eaec374d6d4dab53a4f72756a0 has
> introduced a regression. I've bisected a failing test to this commit,
> and after staring at the my code for a long time, I'm unable to find a
> b
This patch allows a "mod.a" to be built in any
directory. A previous patch allows that mod.a
to be included in any module or another mod.a.
This is achieved via a new pair of macros: modobj-y and modobj-m.
Anything in modobj-y is added to obj-y and is otherwise
ignored.
Anything listed in modob
Hi David,
We run CRIU tests for vfs/for-next, and today a few of these test failed. I
found that the problem appears after this patch..
https://travis-ci.org/avagin/linux/jobs/393766778
The reproducer is attached. It creates a process in a new set of namespaces
(user, mount, etc) and then this p
On 6/19/18 2:58 AM, bseg...@google.com wrote:
> Xunlei Pang writes:
>
>> I noticed the group frequently got throttled even it consumed
>> low cpu usage, this caused some jitters on the response time
>> to some of our business containers enabling cpu quota.
>>
>> It's very easy to reproduce:
>> mk
1 - 100 of 1095 matches
Mail list logo
